[linux-2.6-block.git] / drivers / gpio / gpio-xilinx.c

/*
 * Xilinx gpio driver for xps/axi_gpio IP.
 *
 * Copyright 2008 - 2013 Xilinx, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/bitops.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of_platform.h>
#include <linux/of_gpio.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/slab.h>

/* Register Offset Definitions */
#define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
#define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */

#define XGPIO_CHANNEL_OFFSET	0x8

/* Read/Write access to the GPIO registers */
#if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86)
# define xgpio_readreg(offset)		readl(offset)
# define xgpio_writereg(offset, val)	writel(val, offset)
#else
# define xgpio_readreg(offset)		__raw_readl(offset)
# define xgpio_writereg(offset, val)	__raw_writel(val, offset)
#endif

/**
 * struct xgpio_instance - Stores information about GPIO device
 * @mmchip: OF GPIO chip for memory mapped banks
 * @gpio_width: GPIO width for every channel
 * @gpio_state: GPIO state shadow register
 * @gpio_dir: GPIO direction shadow register
 * @gpio_lock: Lock used for synchronization
 */
struct xgpio_instance {
	struct of_mm_gpio_chip mmchip;
	unsigned int gpio_width[2];
	u32 gpio_state[2];
	u32 gpio_dir[2];
	spinlock_t gpio_lock[2];
};

static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
{
	if (gpio >= chip->gpio_width[0])
		return 1;

	return 0;
}

static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio)
{
	if (xgpio_index(chip, gpio))
		return XGPIO_CHANNEL_OFFSET;

	return 0;
}

static inline int xgpio_offset(struct xgpio_instance *chip, int gpio)
{
	if (xgpio_index(chip, gpio))
		return gpio - chip->gpio_width[0];

	return gpio;
}

/**
 * xgpio_get - Read the specified signal of the GPIO device.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 *
 * This function reads the specified signal of the GPIO device.
 *
 * Return:
 * 0 if direction of GPIO signals is set as input otherwise it
 * returns negative error value.
 */
static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);
	u32 val;

	val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET +
			    xgpio_regoffset(chip, gpio));

	return !!(val & BIT(xgpio_offset(chip, gpio)));
}

/**
 * xgpio_set - Write the specified signal of the GPIO device.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 * @val:    Value to be written to specified signal.
 *
 * This function writes the specified value in to the specified signal of the
 * GPIO device.
 */
static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);
	int index =  xgpio_index(chip, gpio);
	int offset =  xgpio_offset(chip, gpio);

	spin_lock_irqsave(&chip->gpio_lock[index], flags);

	/* Write to GPIO signal and set its direction to output */
	if (val)
		chip->gpio_state[index] |= BIT(offset);
	else
		chip->gpio_state[index] &= ~BIT(offset);

	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
		       xgpio_regoffset(chip, gpio), chip->gpio_state[index]);

	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
}

/**
 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 *
 * Return:
 * 0 - if direction of GPIO signals is set as input
 * otherwise it returns negative error value.
 */
static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
	unsigned long flags;
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);
	int index =  xgpio_index(chip, gpio);
	int offset =  xgpio_offset(chip, gpio);

	spin_lock_irqsave(&chip->gpio_lock[index], flags);

	/* Set the GPIO bit in shadow register and set direction as input */
	chip->gpio_dir[index] |= BIT(offset);
	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
		       xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);

	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

	return 0;
}

/**
 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
 * @gc:     Pointer to gpio_chip device structure.
 * @gpio:   GPIO signal number.
 * @val:    Value to be written to specified signal.
 *
 * This function sets the direction of specified GPIO signal as output.
 *
 * Return:
 * If all GPIO signals of GPIO chip is configured as input then it returns
 * error otherwise it returns 0.
 */
static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);
	int index =  xgpio_index(chip, gpio);
	int offset =  xgpio_offset(chip, gpio);

	spin_lock_irqsave(&chip->gpio_lock[index], flags);

	/* Write state of GPIO signal */
	if (val)
		chip->gpio_state[index] |= BIT(offset);
	else
		chip->gpio_state[index] &= ~BIT(offset);
	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
			xgpio_regoffset(chip, gpio), chip->gpio_state[index]);

	/* Clear the GPIO bit in shadow register and set direction as output */
	chip->gpio_dir[index] &= ~BIT(offset);
	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
			xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);

	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

	return 0;
}

/**
 * xgpio_save_regs - Set initial values of GPIO pins
 * @mm_gc: Pointer to memory mapped GPIO chip structure
 */
static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
{
	struct xgpio_instance *chip =
	    container_of(mm_gc, struct xgpio_instance, mmchip);

	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET,	chip->gpio_state[0]);
	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);

	if (!chip->gpio_width[1])
		return;

	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
		       chip->gpio_state[1]);
	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
		       chip->gpio_dir[1]);
}

/**
 * xgpio_remove - Remove method for the GPIO device.
 * @pdev: pointer to the platform device
 *
 * This function remove gpiochips and frees all the allocated resources.
 *
 * Return: 0 always
 */
static int xgpio_remove(struct platform_device *pdev)
{
	struct xgpio_instance *chip = platform_get_drvdata(pdev);

	of_mm_gpiochip_remove(&chip->mmchip);

	return 0;
}

/**
 * xgpio_of_probe - Probe method for the GPIO device.
 * @pdev: pointer to the platform device
 *
 * Return:
 * It returns 0, if the driver is bound to the GPIO device, or
 * a negative value if there is an error.
 */
static int xgpio_probe(struct platform_device *pdev)
{
	struct xgpio_instance *chip;
	int status = 0;
	struct device_node *np = pdev->dev.of_node;
	u32 is_dual;

	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	platform_set_drvdata(pdev, chip);

	/* Update GPIO state shadow register with default value */
	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]);

	/* Update GPIO direction shadow register with default value */
	if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0]))
		chip->gpio_dir[0] = 0xFFFFFFFF;

	/*
	 * Check device node and parent device node for device width
	 * and assume default width of 32
	 */
	if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
		chip->gpio_width[0] = 32;

	spin_lock_init(&chip->gpio_lock[0]);

	if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
		is_dual = 0;

	if (is_dual) {
		/* Update GPIO state shadow register with default value */
		of_property_read_u32(np, "xlnx,dout-default-2",
				     &chip->gpio_state[1]);

		/* Update GPIO direction shadow register with default value */
		if (of_property_read_u32(np, "xlnx,tri-default-2",
					 &chip->gpio_dir[1]))
			chip->gpio_dir[1] = 0xFFFFFFFF;

		/*
		 * Check device node and parent device node for device width
		 * and assume default width of 32
		 */
		if (of_property_read_u32(np, "xlnx,gpio2-width",
					 &chip->gpio_width[1]))
			chip->gpio_width[1] = 32;

		spin_lock_init(&chip->gpio_lock[1]);
	}

	chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
	chip->mmchip.gc.dev = &pdev->dev;
	chip->mmchip.gc.direction_input = xgpio_dir_in;
	chip->mmchip.gc.direction_output = xgpio_dir_out;
	chip->mmchip.gc.get = xgpio_get;
	chip->mmchip.gc.set = xgpio_set;

	chip->mmchip.save_regs = xgpio_save_regs;

	/* Call the OF gpio helper to setup and register the GPIO device */
	status = of_mm_gpiochip_add(np, &chip->mmchip);
	if (status) {
		pr_err("%s: error in probe function with status %d\n",
		       np->full_name, status);
		return status;
	}

	return 0;
}

static const struct of_device_id xgpio_of_match[] = {
	{ .compatible = "xlnx,xps-gpio-1.00.a", },
	{ /* end of list */ },
};

MODULE_DEVICE_TABLE(of, xgpio_of_match);

static struct platform_driver xgpio_plat_driver = {
	.probe		= xgpio_probe,
	.remove		= xgpio_remove,
	.driver		= {
			.name = "gpio-xilinx",
			.of_match_table	= xgpio_of_match,
	},
};

static int __init xgpio_init(void)
{
	return platform_driver_register(&xgpio_plat_driver);
}

subsys_initcall(xgpio_init);

static void __exit xgpio_exit(void)
{
	platform_driver_unregister(&xgpio_plat_driver);
}
module_exit(xgpio_exit);

MODULE_AUTHOR("Xilinx, Inc.");
MODULE_DESCRIPTION("Xilinx GPIO driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
0bcb6069	1	/*
74600ee0	2	* Xilinx gpio driver for xps/axi_gpio IP.
0bcb6069	3	*
74600ee0	4	* Copyright 2008 - 2013 Xilinx, Inc.
0bcb6069 JL	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2
	8	* as published by the Free Software Foundation.
	9	*
	10	* You should have received a copy of the GNU General Public License
	11	* along with this program; if not, write to the Free Software
	12	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	13	*/
	14
74600ee0	15	#include <linux/bitops.h>
0bcb6069 JL	16	#include <linux/init.h>
0bcb6069 JL	17	#include <linux/errno.h>
bb207ef1	18	#include <linux/module.h>
0bcb6069 JL	19	#include <linux/of_device.h>
	20	#include <linux/of_platform.h>
	21	#include <linux/of_gpio.h>
	22	#include <linux/io.h>
	23	#include <linux/gpio.h>
5a0e3ad6	24	#include <linux/slab.h>
0bcb6069 JL	25
	26	/* Register Offset Definitions */
	27	#define XGPIO_DATA_OFFSET (0x0) /* Data register */
	28	#define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
	29
74600ee0 MS	30	#define XGPIO_CHANNEL_OFFSET 0x8
	31
	32	/* Read/Write access to the GPIO registers */
c54c58ba	33	#if defined(CONFIG_ARCH_ZYNQ) \|\| defined(CONFIG_X86)
cc090d61 MS	34	# define xgpio_readreg(offset) readl(offset)
	35	# define xgpio_writereg(offset, val) writel(val, offset)
	36	#else
	37	# define xgpio_readreg(offset) __raw_readl(offset)
	38	# define xgpio_writereg(offset, val) __raw_writel(val, offset)
	39	#endif
74600ee0 MS	40
	41	/**
	42	* struct xgpio_instance - Stores information about GPIO device
4ae798fa	43	* @mmchip: OF GPIO chip for memory mapped banks
3c1b5c9b	44	* @gpio_width: GPIO width for every channel
4ae798fa RRD	45	* @gpio_state: GPIO state shadow register
	46	* @gpio_dir: GPIO direction shadow register
	47	* @gpio_lock: Lock used for synchronization
74600ee0	48	*/
0bcb6069 JL	49	struct xgpio_instance {
0bcb6069 JL	50	struct of_mm_gpio_chip mmchip;
1d6902d3 RRD	51	unsigned int gpio_width[2];
	52	u32 gpio_state[2];
	53	u32 gpio_dir[2];
	54	spinlock_t gpio_lock[2];
749564ff RRD	55	};
749564ff RRD	56
1d6902d3 RRD	57	static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
	58	{
	59	if (gpio >= chip->gpio_width[0])
	60	return 1;
	61
	62	return 0;
	63	}
	64
	65	static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio)
	66	{
	67	if (xgpio_index(chip, gpio))
	68	return XGPIO_CHANNEL_OFFSET;
	69
	70	return 0;
	71	}
	72
	73	static inline int xgpio_offset(struct xgpio_instance *chip, int gpio)
	74	{
	75	if (xgpio_index(chip, gpio))
	76	return gpio - chip->gpio_width[0];
	77
	78	return gpio;
	79	}
0bcb6069 JL	80
	81	/**
	82	* xgpio_get - Read the specified signal of the GPIO device.
	83	* @gc: Pointer to gpio_chip device structure.
	84	* @gpio: GPIO signal number.
	85	*
4ae798fa RRD	86	* This function reads the specified signal of the GPIO device.
	87	*
	88	* Return:
	89	* 0 if direction of GPIO signals is set as input otherwise it
	90	* returns negative error value.
0bcb6069 JL	91	*/
	92	static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
	93	{
	94	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
1d6902d3 RRD	95	struct xgpio_instance *chip =
	96	container_of(mm_gc, struct xgpio_instance, mmchip);
	97	u32 val;
0bcb6069	98
1d6902d3 RRD	99	val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET +
	100	xgpio_regoffset(chip, gpio));
	101
	102	return !!(val & BIT(xgpio_offset(chip, gpio)));
0bcb6069 JL	103	}
	104
	105	/**
	106	* xgpio_set - Write the specified signal of the GPIO device.
	107	* @gc: Pointer to gpio_chip device structure.
	108	* @gpio: GPIO signal number.
	109	* @val: Value to be written to specified signal.
	110	*
	111	* This function writes the specified value in to the specified signal of the
	112	* GPIO device.
	113	*/
	114	static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	115	{
	116	unsigned long flags;
	117	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	118	struct xgpio_instance *chip =
	119	container_of(mm_gc, struct xgpio_instance, mmchip);
1d6902d3 RRD	120	int index = xgpio_index(chip, gpio);
1d6902d3 RRD	121	int offset = xgpio_offset(chip, gpio);
0bcb6069	122
1d6902d3	123	spin_lock_irqsave(&chip->gpio_lock[index], flags);
0bcb6069 JL	124
	125	/* Write to GPIO signal and set its direction to output */
	126	if (val)
1d6902d3	127	chip->gpio_state[index] \|= BIT(offset);
0bcb6069	128	else
1d6902d3	129	chip->gpio_state[index] &= ~BIT(offset);
74600ee0	130
1d6902d3 RRD	131	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
1d6902d3 RRD	132	xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
0bcb6069	133
1d6902d3	134	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
0bcb6069 JL	135	}
	136
	137	/**
	138	* xgpio_dir_in - Set the direction of the specified GPIO signal as input.
	139	* @gc: Pointer to gpio_chip device structure.
	140	* @gpio: GPIO signal number.
	141	*
4ae798fa RRD	142	* Return:
	143	* 0 - if direction of GPIO signals is set as input
	144	* otherwise it returns negative error value.
0bcb6069 JL	145	*/
	146	static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
	147	{
	148	unsigned long flags;
	149	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	150	struct xgpio_instance *chip =
	151	container_of(mm_gc, struct xgpio_instance, mmchip);
1d6902d3 RRD	152	int index = xgpio_index(chip, gpio);
1d6902d3 RRD	153	int offset = xgpio_offset(chip, gpio);
0bcb6069	154
1d6902d3	155	spin_lock_irqsave(&chip->gpio_lock[index], flags);
0bcb6069 JL	156
0bcb6069 JL	157	/* Set the GPIO bit in shadow register and set direction as input */
1d6902d3 RRD	158	chip->gpio_dir[index] \|= BIT(offset);
	159	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
	160	xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
0bcb6069	161
1d6902d3	162	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
0bcb6069 JL	163
	164	return 0;
	165	}
	166
	167	/**
	168	* xgpio_dir_out - Set the direction of the specified GPIO signal as output.
	169	* @gc: Pointer to gpio_chip device structure.
	170	* @gpio: GPIO signal number.
	171	* @val: Value to be written to specified signal.
	172	*
4ae798fa RRD	173	* This function sets the direction of specified GPIO signal as output.
	174	*
	175	* Return:
	176	* If all GPIO signals of GPIO chip is configured as input then it returns
0bcb6069 JL	177	* error otherwise it returns 0.
	178	*/
	179	static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
	180	{
	181	unsigned long flags;
	182	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	183	struct xgpio_instance *chip =
	184	container_of(mm_gc, struct xgpio_instance, mmchip);
1d6902d3 RRD	185	int index = xgpio_index(chip, gpio);
1d6902d3 RRD	186	int offset = xgpio_offset(chip, gpio);
0bcb6069	187
1d6902d3	188	spin_lock_irqsave(&chip->gpio_lock[index], flags);
0bcb6069 JL	189
	190	/* Write state of GPIO signal */
	191	if (val)
1d6902d3	192	chip->gpio_state[index] \|= BIT(offset);
0bcb6069	193	else
1d6902d3 RRD	194	chip->gpio_state[index] &= ~BIT(offset);
	195	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
	196	xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
0bcb6069 JL	197
0bcb6069 JL	198	/* Clear the GPIO bit in shadow register and set direction as output */
1d6902d3 RRD	199	chip->gpio_dir[index] &= ~BIT(offset);
	200	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
	201	xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
0bcb6069	202
1d6902d3	203	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
0bcb6069 JL	204
	205	return 0;
	206	}
	207
	208	/**
	209	* xgpio_save_regs - Set initial values of GPIO pins
4ae798fa	210	* @mm_gc: Pointer to memory mapped GPIO chip structure
0bcb6069 JL	211	*/
	212	static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
	213	{
	214	struct xgpio_instance *chip =
	215	container_of(mm_gc, struct xgpio_instance, mmchip);
	216
1d6902d3 RRD	217	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]);
	218	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
	219
	220	if (!chip->gpio_width[1])
	221	return;
	222
5b2c9121	223	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
1d6902d3	224	chip->gpio_state[1]);
5b2c9121	225	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
1d6902d3	226	chip->gpio_dir[1]);
0bcb6069 JL	227	}
0bcb6069 JL	228
749564ff RRD	229	/**
	230	* xgpio_remove - Remove method for the GPIO device.
	231	* @pdev: pointer to the platform device
	232	*
	233	* This function remove gpiochips and frees all the allocated resources.
3c1b5c9b MS	234	*
3c1b5c9b MS	235	* Return: 0 always
749564ff RRD	236	*/
	237	static int xgpio_remove(struct platform_device *pdev)
	238	{
1d6902d3	239	struct xgpio_instance *chip = platform_get_drvdata(pdev);
749564ff	240
c458e450	241	of_mm_gpiochip_remove(&chip->mmchip);
749564ff RRD	242
	243	return 0;
	244	}
	245
0bcb6069 JL	246	/**
0bcb6069 JL	247	* xgpio_of_probe - Probe method for the GPIO device.
749564ff	248	* @pdev: pointer to the platform device
0bcb6069	249	*
4ae798fa RRD	250	* Return:
	251	* It returns 0, if the driver is bound to the GPIO device, or
	252	* a negative value if there is an error.
0bcb6069	253	*/
749564ff	254	static int xgpio_probe(struct platform_device *pdev)
0bcb6069 JL	255	{
0bcb6069 JL	256	struct xgpio_instance *chip;
0bcb6069	257	int status = 0;
749564ff	258	struct device_node *np = pdev->dev.of_node;
1d6902d3	259	u32 is_dual;
0bcb6069	260
1d6902d3 RRD	261	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
1d6902d3 RRD	262	if (!chip)
0bcb6069	263	return -ENOMEM;
0bcb6069	264
1d6902d3	265	platform_set_drvdata(pdev, chip);
749564ff	266
0bcb6069	267	/* Update GPIO state shadow register with default value */
1d6902d3	268	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]);
0bcb6069 JL	269
0bcb6069 JL	270	/* Update GPIO direction shadow register with default value */
1d6902d3 RRD	271	if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0]))
1d6902d3 RRD	272	chip->gpio_dir[0] = 0xFFFFFFFF;
6f8bf500	273
1b4c5a6e GV	274	/*
	275	* Check device node and parent device node for device width
	276	* and assume default width of 32
	277	*/
1d6902d3 RRD	278	if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
	279	chip->gpio_width[0] = 32;
	280
	281	spin_lock_init(&chip->gpio_lock[0]);
	282
	283	if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
	284	is_dual = 0;
0bcb6069	285
1d6902d3 RRD	286	if (is_dual) {
	287	/* Update GPIO state shadow register with default value */
	288	of_property_read_u32(np, "xlnx,dout-default-2",
	289	&chip->gpio_state[1]);
	290
	291	/* Update GPIO direction shadow register with default value */
	292	if (of_property_read_u32(np, "xlnx,tri-default-2",
	293	&chip->gpio_dir[1]))
	294	chip->gpio_dir[1] = 0xFFFFFFFF;
0bcb6069	295
1d6902d3 RRD	296	/*
	297	* Check device node and parent device node for device width
	298	* and assume default width of 32
	299	*/
	300	if (of_property_read_u32(np, "xlnx,gpio2-width",
	301	&chip->gpio_width[1]))
	302	chip->gpio_width[1] = 32;
	303
	304	spin_lock_init(&chip->gpio_lock[1]);
	305	}
	306
	307	chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
749564ff	308	chip->mmchip.gc.dev = &pdev->dev;
a19e3da5 AV	309	chip->mmchip.gc.direction_input = xgpio_dir_in;
	310	chip->mmchip.gc.direction_output = xgpio_dir_out;
	311	chip->mmchip.gc.get = xgpio_get;
	312	chip->mmchip.gc.set = xgpio_set;
0bcb6069 JL	313
	314	chip->mmchip.save_regs = xgpio_save_regs;
	315
	316	/* Call the OF gpio helper to setup and register the GPIO device */
	317	status = of_mm_gpiochip_add(np, &chip->mmchip);
	318	if (status) {
0bcb6069 JL	319	pr_err("%s: error in probe function with status %d\n",
	320	np->full_name, status);
	321	return status;
	322	}
74600ee0	323
0bcb6069 JL	324	return 0;
	325	}
	326
9992bc95	327	static const struct of_device_id xgpio_of_match[] = {
0bcb6069 JL	328	{ .compatible = "xlnx,xps-gpio-1.00.a", },
	329	{ /* end of list */ },
	330	};
	331
749564ff	332	MODULE_DEVICE_TABLE(of, xgpio_of_match);
0bcb6069	333
749564ff RRD	334	static struct platform_driver xgpio_plat_driver = {
	335	.probe = xgpio_probe,
	336	.remove = xgpio_remove,
	337	.driver = {
	338	.name = "gpio-xilinx",
	339	.of_match_table = xgpio_of_match,
	340	},
	341	};
0bcb6069	342
749564ff RRD	343	static int __init xgpio_init(void)
	344	{
	345	return platform_driver_register(&xgpio_plat_driver);
0bcb6069 JL	346	}
0bcb6069 JL	347
0bcb6069	348	subsys_initcall(xgpio_init);
749564ff RRD	349
	350	static void __exit xgpio_exit(void)
	351	{
	352	platform_driver_unregister(&xgpio_plat_driver);
	353	}
	354	module_exit(xgpio_exit);
0bcb6069 JL	355
	356	MODULE_AUTHOR("Xilinx, Inc.");
	357	MODULE_DESCRIPTION("Xilinx GPIO driver");
	358	MODULE_LICENSE("GPL");