Commit | Line | Data |
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36e2add1 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
7f2691a1 | 2 | /* |
adaaf63e | 3 | * Freescale vf610 GPIO support through PORT and GPIO |
7f2691a1 SA |
4 | * |
5 | * Copyright (c) 2014 Toradex AG. | |
6 | * | |
7 | * Author: Stefan Agner <stefan@agner.ch>. | |
7f2691a1 | 8 | */ |
7f2691a1 | 9 | #include <linux/bitops.h> |
91393622 | 10 | #include <linux/clk.h> |
7f2691a1 | 11 | #include <linux/err.h> |
45e8296c | 12 | #include <linux/gpio/driver.h> |
7f2691a1 SA |
13 | #include <linux/init.h> |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/io.h> | |
16 | #include <linux/ioport.h> | |
17 | #include <linux/irq.h> | |
7f2691a1 SA |
18 | #include <linux/platform_device.h> |
19 | #include <linux/of.h> | |
20 | #include <linux/of_device.h> | |
21 | #include <linux/of_irq.h> | |
22 | ||
23 | #define VF610_GPIO_PER_PORT 32 | |
24 | ||
659d8a62 DA |
25 | struct fsl_gpio_soc_data { |
26 | /* SoCs has a Port Data Direction Register (PDDR) */ | |
27 | bool have_paddr; | |
28 | }; | |
29 | ||
7f2691a1 SA |
30 | struct vf610_gpio_port { |
31 | struct gpio_chip gc; | |
32 | void __iomem *base; | |
33 | void __iomem *gpio_base; | |
659d8a62 | 34 | const struct fsl_gpio_soc_data *sdata; |
7f2691a1 | 35 | u8 irqc[VF610_GPIO_PER_PORT]; |
91393622 D |
36 | struct clk *clk_port; |
37 | struct clk *clk_gpio; | |
7f2691a1 SA |
38 | int irq; |
39 | }; | |
40 | ||
41 | #define GPIO_PDOR 0x00 | |
42 | #define GPIO_PSOR 0x04 | |
43 | #define GPIO_PCOR 0x08 | |
44 | #define GPIO_PTOR 0x0c | |
45 | #define GPIO_PDIR 0x10 | |
659d8a62 | 46 | #define GPIO_PDDR 0x14 |
7f2691a1 SA |
47 | |
48 | #define PORT_PCR(n) ((n) * 0x4) | |
49 | #define PORT_PCR_IRQC_OFFSET 16 | |
50 | ||
51 | #define PORT_ISFR 0xa0 | |
52 | #define PORT_DFER 0xc0 | |
53 | #define PORT_DFCR 0xc4 | |
54 | #define PORT_DFWR 0xc8 | |
55 | ||
56 | #define PORT_INT_OFF 0x0 | |
57 | #define PORT_INT_LOGIC_ZERO 0x8 | |
58 | #define PORT_INT_RISING_EDGE 0x9 | |
59 | #define PORT_INT_FALLING_EDGE 0xa | |
60 | #define PORT_INT_EITHER_EDGE 0xb | |
61 | #define PORT_INT_LOGIC_ONE 0xc | |
62 | ||
fd968115 SA |
63 | static struct irq_chip vf610_gpio_irq_chip; |
64 | ||
659d8a62 DA |
65 | static const struct fsl_gpio_soc_data imx_data = { |
66 | .have_paddr = true, | |
67 | }; | |
68 | ||
7f2691a1 | 69 | static const struct of_device_id vf610_gpio_dt_ids[] = { |
659d8a62 DA |
70 | { .compatible = "fsl,vf610-gpio", .data = NULL, }, |
71 | { .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, }, | |
7f2691a1 SA |
72 | { /* sentinel */ } |
73 | }; | |
74 | ||
75 | static inline void vf610_gpio_writel(u32 val, void __iomem *reg) | |
76 | { | |
77 | writel_relaxed(val, reg); | |
78 | } | |
79 | ||
80 | static inline u32 vf610_gpio_readl(void __iomem *reg) | |
81 | { | |
82 | return readl_relaxed(reg); | |
83 | } | |
84 | ||
7f2691a1 SA |
85 | static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) |
86 | { | |
65389b49 | 87 | struct vf610_gpio_port *port = gpiochip_get_data(gc); |
659d8a62 DA |
88 | unsigned long mask = BIT(gpio); |
89 | void __iomem *addr; | |
90 | ||
91 | if (port->sdata && port->sdata->have_paddr) { | |
92 | mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR); | |
93 | addr = mask ? port->gpio_base + GPIO_PDOR : | |
94 | port->gpio_base + GPIO_PDIR; | |
95 | return !!(vf610_gpio_readl(addr) & BIT(gpio)); | |
96 | } else { | |
97 | return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) | |
98 | & BIT(gpio)); | |
99 | } | |
7f2691a1 SA |
100 | } |
101 | ||
102 | static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |
103 | { | |
65389b49 | 104 | struct vf610_gpio_port *port = gpiochip_get_data(gc); |
7f2691a1 SA |
105 | unsigned long mask = BIT(gpio); |
106 | ||
107 | if (val) | |
108 | vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR); | |
109 | else | |
110 | vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR); | |
111 | } | |
112 | ||
113 | static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | |
114 | { | |
659d8a62 DA |
115 | struct vf610_gpio_port *port = gpiochip_get_data(chip); |
116 | unsigned long mask = BIT(gpio); | |
117 | u32 val; | |
118 | ||
119 | if (port->sdata && port->sdata->have_paddr) { | |
120 | val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR); | |
121 | val &= ~mask; | |
122 | vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR); | |
123 | } | |
124 | ||
7f2691a1 SA |
125 | return pinctrl_gpio_direction_input(chip->base + gpio); |
126 | } | |
127 | ||
128 | static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | |
129 | int value) | |
130 | { | |
659d8a62 DA |
131 | struct vf610_gpio_port *port = gpiochip_get_data(chip); |
132 | unsigned long mask = BIT(gpio); | |
133 | ||
134 | if (port->sdata && port->sdata->have_paddr) | |
135 | vf610_gpio_writel(mask, port->gpio_base + GPIO_PDDR); | |
136 | ||
7f2691a1 SA |
137 | vf610_gpio_set(chip, gpio, value); |
138 | ||
139 | return pinctrl_gpio_direction_output(chip->base + gpio); | |
140 | } | |
141 | ||
bd0b9ac4 | 142 | static void vf610_gpio_irq_handler(struct irq_desc *desc) |
7f2691a1 | 143 | { |
2f930643 | 144 | struct vf610_gpio_port *port = |
65389b49 | 145 | gpiochip_get_data(irq_desc_get_handler_data(desc)); |
7f2691a1 SA |
146 | struct irq_chip *chip = irq_desc_get_chip(desc); |
147 | int pin; | |
148 | unsigned long irq_isfr; | |
149 | ||
150 | chained_irq_enter(chip, desc); | |
151 | ||
152 | irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR); | |
153 | ||
154 | for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) { | |
155 | vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR); | |
156 | ||
f0fbe7bc | 157 | generic_handle_irq(irq_find_mapping(port->gc.irq.domain, pin)); |
7f2691a1 SA |
158 | } |
159 | ||
160 | chained_irq_exit(chip, desc); | |
161 | } | |
162 | ||
163 | static void vf610_gpio_irq_ack(struct irq_data *d) | |
164 | { | |
2f930643 | 165 | struct vf610_gpio_port *port = |
65389b49 | 166 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
7f2691a1 SA |
167 | int gpio = d->hwirq; |
168 | ||
169 | vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR); | |
170 | } | |
171 | ||
172 | static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) | |
173 | { | |
2f930643 | 174 | struct vf610_gpio_port *port = |
65389b49 | 175 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
7f2691a1 SA |
176 | u8 irqc; |
177 | ||
178 | switch (type) { | |
179 | case IRQ_TYPE_EDGE_RISING: | |
180 | irqc = PORT_INT_RISING_EDGE; | |
181 | break; | |
182 | case IRQ_TYPE_EDGE_FALLING: | |
183 | irqc = PORT_INT_FALLING_EDGE; | |
184 | break; | |
185 | case IRQ_TYPE_EDGE_BOTH: | |
186 | irqc = PORT_INT_EITHER_EDGE; | |
187 | break; | |
188 | case IRQ_TYPE_LEVEL_LOW: | |
189 | irqc = PORT_INT_LOGIC_ZERO; | |
190 | break; | |
191 | case IRQ_TYPE_LEVEL_HIGH: | |
192 | irqc = PORT_INT_LOGIC_ONE; | |
193 | break; | |
194 | default: | |
195 | return -EINVAL; | |
196 | } | |
197 | ||
198 | port->irqc[d->hwirq] = irqc; | |
199 | ||
fd968115 | 200 | if (type & IRQ_TYPE_LEVEL_MASK) |
a7147db0 | 201 | irq_set_handler_locked(d, handle_level_irq); |
fd968115 | 202 | else |
a7147db0 | 203 | irq_set_handler_locked(d, handle_edge_irq); |
fd968115 | 204 | |
7f2691a1 SA |
205 | return 0; |
206 | } | |
207 | ||
208 | static void vf610_gpio_irq_mask(struct irq_data *d) | |
209 | { | |
2f930643 | 210 | struct vf610_gpio_port *port = |
65389b49 | 211 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
7f2691a1 SA |
212 | void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); |
213 | ||
214 | vf610_gpio_writel(0, pcr_base); | |
215 | } | |
216 | ||
217 | static void vf610_gpio_irq_unmask(struct irq_data *d) | |
218 | { | |
2f930643 | 219 | struct vf610_gpio_port *port = |
65389b49 | 220 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
7f2691a1 SA |
221 | void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); |
222 | ||
223 | vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, | |
224 | pcr_base); | |
225 | } | |
226 | ||
227 | static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable) | |
228 | { | |
2f930643 | 229 | struct vf610_gpio_port *port = |
65389b49 | 230 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
7f2691a1 SA |
231 | |
232 | if (enable) | |
233 | enable_irq_wake(port->irq); | |
234 | else | |
235 | disable_irq_wake(port->irq); | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | static struct irq_chip vf610_gpio_irq_chip = { | |
241 | .name = "gpio-vf610", | |
242 | .irq_ack = vf610_gpio_irq_ack, | |
243 | .irq_mask = vf610_gpio_irq_mask, | |
244 | .irq_unmask = vf610_gpio_irq_unmask, | |
245 | .irq_set_type = vf610_gpio_irq_set_type, | |
246 | .irq_set_wake = vf610_gpio_irq_set_wake, | |
247 | }; | |
248 | ||
249 | static int vf610_gpio_probe(struct platform_device *pdev) | |
250 | { | |
251 | struct device *dev = &pdev->dev; | |
252 | struct device_node *np = dev->of_node; | |
253 | struct vf610_gpio_port *port; | |
254 | struct resource *iores; | |
255 | struct gpio_chip *gc; | |
256 | int ret; | |
257 | ||
258 | port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); | |
259 | if (!port) | |
260 | return -ENOMEM; | |
261 | ||
23e577eb | 262 | port->sdata = of_device_get_match_data(dev); |
7f2691a1 SA |
263 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
264 | port->base = devm_ioremap_resource(dev, iores); | |
265 | if (IS_ERR(port->base)) | |
266 | return PTR_ERR(port->base); | |
267 | ||
268 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
269 | port->gpio_base = devm_ioremap_resource(dev, iores); | |
270 | if (IS_ERR(port->gpio_base)) | |
271 | return PTR_ERR(port->gpio_base); | |
272 | ||
273 | port->irq = platform_get_irq(pdev, 0); | |
274 | if (port->irq < 0) | |
275 | return port->irq; | |
276 | ||
91393622 D |
277 | port->clk_port = devm_clk_get(&pdev->dev, "port"); |
278 | if (!IS_ERR(port->clk_port)) { | |
279 | ret = clk_prepare_enable(port->clk_port); | |
280 | if (ret) | |
281 | return ret; | |
282 | } else if (port->clk_port == ERR_PTR(-EPROBE_DEFER)) { | |
283 | /* | |
284 | * Percolate deferrals, for anything else, | |
285 | * just live without the clocking. | |
286 | */ | |
287 | return PTR_ERR(port->clk_port); | |
288 | } | |
289 | ||
290 | port->clk_gpio = devm_clk_get(&pdev->dev, "gpio"); | |
291 | if (!IS_ERR(port->clk_gpio)) { | |
292 | ret = clk_prepare_enable(port->clk_gpio); | |
293 | if (ret) { | |
294 | clk_disable_unprepare(port->clk_port); | |
295 | return ret; | |
296 | } | |
297 | } else if (port->clk_gpio == ERR_PTR(-EPROBE_DEFER)) { | |
298 | clk_disable_unprepare(port->clk_port); | |
299 | return PTR_ERR(port->clk_gpio); | |
300 | } | |
301 | ||
302 | platform_set_drvdata(pdev, port); | |
303 | ||
7f2691a1 SA |
304 | gc = &port->gc; |
305 | gc->of_node = np; | |
58383c78 | 306 | gc->parent = dev; |
d32efe37 AL |
307 | gc->label = "vf610-gpio"; |
308 | gc->ngpio = VF610_GPIO_PER_PORT; | |
7f2691a1 SA |
309 | gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; |
310 | ||
203f0daa JG |
311 | gc->request = gpiochip_generic_request; |
312 | gc->free = gpiochip_generic_free; | |
d32efe37 AL |
313 | gc->direction_input = vf610_gpio_direction_input; |
314 | gc->get = vf610_gpio_get; | |
315 | gc->direction_output = vf610_gpio_direction_output; | |
316 | gc->set = vf610_gpio_set; | |
7f2691a1 | 317 | |
65389b49 | 318 | ret = gpiochip_add_data(gc, port); |
7f2691a1 SA |
319 | if (ret < 0) |
320 | return ret; | |
321 | ||
322 | /* Clear the interrupt status register for all GPIO's */ | |
323 | vf610_gpio_writel(~0, port->base + PORT_ISFR); | |
324 | ||
325 | ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0, | |
fd968115 | 326 | handle_edge_irq, IRQ_TYPE_NONE); |
7f2691a1 SA |
327 | if (ret) { |
328 | dev_err(dev, "failed to add irqchip\n"); | |
329 | gpiochip_remove(gc); | |
330 | return ret; | |
331 | } | |
332 | gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq, | |
333 | vf610_gpio_irq_handler); | |
334 | ||
335 | return 0; | |
336 | } | |
337 | ||
91393622 D |
338 | static int vf610_gpio_remove(struct platform_device *pdev) |
339 | { | |
340 | struct vf610_gpio_port *port = platform_get_drvdata(pdev); | |
341 | ||
342 | gpiochip_remove(&port->gc); | |
343 | if (!IS_ERR(port->clk_port)) | |
344 | clk_disable_unprepare(port->clk_port); | |
345 | if (!IS_ERR(port->clk_gpio)) | |
346 | clk_disable_unprepare(port->clk_gpio); | |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
7f2691a1 SA |
351 | static struct platform_driver vf610_gpio_driver = { |
352 | .driver = { | |
353 | .name = "gpio-vf610", | |
7f2691a1 SA |
354 | .of_match_table = vf610_gpio_dt_ids, |
355 | }, | |
356 | .probe = vf610_gpio_probe, | |
91393622 | 357 | .remove = vf610_gpio_remove, |
7f2691a1 SA |
358 | }; |
359 | ||
df950da1 | 360 | builtin_platform_driver(vf610_gpio_driver); |