Merge git://git.infradead.org/intel-iommu
[linux-2.6-block.git] / drivers / gpio / gpio-tc3589x.c
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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
7 */
8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/slab.h>
13#include <linux/gpio.h>
3113e679 14#include <linux/of.h>
d88b25be 15#include <linux/interrupt.h>
c6eda6c5 16#include <linux/mfd/tc3589x.h>
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17
18/*
19 * These registers are modified under the irq bus lock and cached to avoid
20 * unnecessary writes in bus_sync_unlock.
21 */
22enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
23
24#define CACHE_NR_REGS 4
25#define CACHE_NR_BANKS 3
26
20406ebf 27struct tc3589x_gpio {
d88b25be 28 struct gpio_chip chip;
20406ebf 29 struct tc3589x *tc3589x;
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30 struct device *dev;
31 struct mutex irq_lock;
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32 /* Caches of interrupt control registers for bus_lock */
33 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
34 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
35};
36
20406ebf 37static inline struct tc3589x_gpio *to_tc3589x_gpio(struct gpio_chip *chip)
d88b25be 38{
20406ebf 39 return container_of(chip, struct tc3589x_gpio, chip);
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40}
41
20406ebf 42static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
d88b25be 43{
20406ebf
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44 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
45 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
46 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
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47 u8 mask = 1 << (offset % 8);
48 int ret;
49
20406ebf 50 ret = tc3589x_reg_read(tc3589x, reg);
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51 if (ret < 0)
52 return ret;
53
54 return ret & mask;
55}
56
20406ebf 57static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
d88b25be 58{
20406ebf
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59 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
60 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
61 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
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62 unsigned pos = offset % 8;
63 u8 data[] = {!!val << pos, 1 << pos};
64
20406ebf 65 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
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66}
67
20406ebf 68static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
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69 unsigned offset, int val)
70{
20406ebf
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71 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
72 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
73 u8 reg = TC3589x_GPIODIR0 + offset / 8;
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74 unsigned pos = offset % 8;
75
20406ebf 76 tc3589x_gpio_set(chip, offset, val);
d88b25be 77
20406ebf 78 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos);
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79}
80
20406ebf 81static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
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82 unsigned offset)
83{
20406ebf
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84 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
85 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
86 u8 reg = TC3589x_GPIODIR0 + offset / 8;
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87 unsigned pos = offset % 8;
88
20406ebf 89 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0);
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90}
91
d88b25be 92static struct gpio_chip template_chip = {
20406ebf 93 .label = "tc3589x",
d88b25be 94 .owner = THIS_MODULE,
20406ebf
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95 .direction_input = tc3589x_gpio_direction_input,
96 .get = tc3589x_gpio_get,
97 .direction_output = tc3589x_gpio_direction_output,
98 .set = tc3589x_gpio_set,
9fb1f39e 99 .can_sleep = true,
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100};
101
33fcc1b8 102static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
d88b25be 103{
cf42f1cf 104 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0c9fc10d 105 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc);
efe4c949 106 int offset = d->hwirq;
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107 int regoffset = offset / 8;
108 int mask = 1 << (offset % 8);
109
110 if (type == IRQ_TYPE_EDGE_BOTH) {
20406ebf 111 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
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112 return 0;
113 }
114
20406ebf 115 tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
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116
117 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
20406ebf 118 tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
d88b25be 119 else
20406ebf 120 tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
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121
122 if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
20406ebf 123 tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
d88b25be 124 else
20406ebf 125 tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
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126
127 return 0;
128}
129
33fcc1b8 130static void tc3589x_gpio_irq_lock(struct irq_data *d)
d88b25be 131{
cf42f1cf 132 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0c9fc10d 133 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc);
d88b25be 134
20406ebf 135 mutex_lock(&tc3589x_gpio->irq_lock);
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136}
137
33fcc1b8 138static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
d88b25be 139{
cf42f1cf 140 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0c9fc10d 141 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc);
20406ebf 142 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
d88b25be 143 static const u8 regmap[] = {
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144 [REG_IBE] = TC3589x_GPIOIBE0,
145 [REG_IEV] = TC3589x_GPIOIEV0,
146 [REG_IS] = TC3589x_GPIOIS0,
147 [REG_IE] = TC3589x_GPIOIE0,
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148 };
149 int i, j;
150
151 for (i = 0; i < CACHE_NR_REGS; i++) {
152 for (j = 0; j < CACHE_NR_BANKS; j++) {
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153 u8 old = tc3589x_gpio->oldregs[i][j];
154 u8 new = tc3589x_gpio->regs[i][j];
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155
156 if (new == old)
157 continue;
158
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159 tc3589x_gpio->oldregs[i][j] = new;
160 tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
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161 }
162 }
163
20406ebf 164 mutex_unlock(&tc3589x_gpio->irq_lock);
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165}
166
33fcc1b8 167static void tc3589x_gpio_irq_mask(struct irq_data *d)
d88b25be 168{
cf42f1cf 169 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0c9fc10d 170 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc);
efe4c949 171 int offset = d->hwirq;
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172 int regoffset = offset / 8;
173 int mask = 1 << (offset % 8);
174
20406ebf 175 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
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176}
177
33fcc1b8 178static void tc3589x_gpio_irq_unmask(struct irq_data *d)
d88b25be 179{
cf42f1cf 180 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0c9fc10d 181 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc);
efe4c949 182 int offset = d->hwirq;
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183 int regoffset = offset / 8;
184 int mask = 1 << (offset % 8);
185
20406ebf 186 tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
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187}
188
20406ebf
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189static struct irq_chip tc3589x_gpio_irq_chip = {
190 .name = "tc3589x-gpio",
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191 .irq_bus_lock = tc3589x_gpio_irq_lock,
192 .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
193 .irq_mask = tc3589x_gpio_irq_mask,
194 .irq_unmask = tc3589x_gpio_irq_unmask,
195 .irq_set_type = tc3589x_gpio_irq_set_type,
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196};
197
20406ebf 198static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
d88b25be 199{
20406ebf
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200 struct tc3589x_gpio *tc3589x_gpio = dev;
201 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
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202 u8 status[CACHE_NR_BANKS];
203 int ret;
204 int i;
205
20406ebf 206 ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
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207 ARRAY_SIZE(status), status);
208 if (ret < 0)
209 return IRQ_NONE;
210
211 for (i = 0; i < ARRAY_SIZE(status); i++) {
212 unsigned int stat = status[i];
213 if (!stat)
214 continue;
215
216 while (stat) {
217 int bit = __ffs(stat);
218 int line = i * 8 + bit;
cf42f1cf
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219 int irq = irq_find_mapping(tc3589x_gpio->chip.irqdomain,
220 line);
d88b25be 221
e300376d 222 handle_nested_irq(irq);
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223 stat &= ~(1 << bit);
224 }
225
20406ebf 226 tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
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227 }
228
229 return IRQ_HANDLED;
230}
231
3836309d 232static int tc3589x_gpio_probe(struct platform_device *pdev)
d88b25be 233{
20406ebf 234 struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
3113e679 235 struct device_node *np = pdev->dev.of_node;
20406ebf 236 struct tc3589x_gpio *tc3589x_gpio;
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237 int ret;
238 int irq;
239
53e41f55
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240 if (!np) {
241 dev_err(&pdev->dev, "No Device Tree node found\n");
3113e679
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242 return -EINVAL;
243 }
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244
245 irq = platform_get_irq(pdev, 0);
246 if (irq < 0)
247 return irq;
248
033f2752
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249 tc3589x_gpio = devm_kzalloc(&pdev->dev, sizeof(struct tc3589x_gpio),
250 GFP_KERNEL);
20406ebf 251 if (!tc3589x_gpio)
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252 return -ENOMEM;
253
20406ebf 254 mutex_init(&tc3589x_gpio->irq_lock);
d88b25be 255
20406ebf
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256 tc3589x_gpio->dev = &pdev->dev;
257 tc3589x_gpio->tc3589x = tc3589x;
d88b25be 258
20406ebf
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259 tc3589x_gpio->chip = template_chip;
260 tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
261 tc3589x_gpio->chip.dev = &pdev->dev;
90f2d0f7 262 tc3589x_gpio->chip.base = -1;
e90c636b 263 tc3589x_gpio->chip.of_node = np;
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264
265 /* Bring the GPIO module out of reset */
20406ebf
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266 ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
267 TC3589x_RSTCTRL_GPIRST, 0);
d88b25be 268 if (ret < 0)
033f2752 269 return ret;
d88b25be 270
033f2752
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271 ret = devm_request_threaded_irq(&pdev->dev,
272 irq, NULL, tc3589x_gpio_irq,
273 IRQF_ONESHOT, "tc3589x-gpio",
274 tc3589x_gpio);
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275 if (ret) {
276 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
033f2752 277 return ret;
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278 }
279
20406ebf 280 ret = gpiochip_add(&tc3589x_gpio->chip);
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281 if (ret) {
282 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
033f2752 283 return ret;
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284 }
285
cf42f1cf
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286 ret = gpiochip_irqchip_add(&tc3589x_gpio->chip,
287 &tc3589x_gpio_irq_chip,
288 0,
289 handle_simple_irq,
290 IRQ_TYPE_NONE);
291 if (ret) {
292 dev_err(&pdev->dev,
293 "could not connect irqchip to gpiochip\n");
294 return ret;
295 }
296
3f97d5fc
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297 gpiochip_set_chained_irqchip(&tc3589x_gpio->chip,
298 &tc3589x_gpio_irq_chip,
299 irq,
300 NULL);
301
20406ebf 302 platform_set_drvdata(pdev, tc3589x_gpio);
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303
304 return 0;
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305}
306
206210ce 307static int tc3589x_gpio_remove(struct platform_device *pdev)
d88b25be 308{
20406ebf 309 struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
f0a7a98d 310
9f5132ae 311 gpiochip_remove(&tc3589x_gpio->chip);
d88b25be 312
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313 return 0;
314}
315
20406ebf
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316static struct platform_driver tc3589x_gpio_driver = {
317 .driver.name = "tc3589x-gpio",
d88b25be 318 .driver.owner = THIS_MODULE,
20406ebf 319 .probe = tc3589x_gpio_probe,
8283c4ff 320 .remove = tc3589x_gpio_remove,
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321};
322
20406ebf 323static int __init tc3589x_gpio_init(void)
d88b25be 324{
20406ebf 325 return platform_driver_register(&tc3589x_gpio_driver);
d88b25be 326}
20406ebf 327subsys_initcall(tc3589x_gpio_init);
d88b25be 328
20406ebf 329static void __exit tc3589x_gpio_exit(void)
d88b25be 330{
20406ebf 331 platform_driver_unregister(&tc3589x_gpio_driver);
d88b25be 332}
20406ebf 333module_exit(tc3589x_gpio_exit);
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334
335MODULE_LICENSE("GPL v2");
20406ebf 336MODULE_DESCRIPTION("TC3589x GPIO driver");
d88b25be 337MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");