[linux-2.6-block.git] / drivers / gpio / gpio-sx150x.c

/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
 * 02110-1301, USA.
 */
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/i2c/sx150x.h>

#define NO_UPDATE_PENDING	-1

struct sx150x_device_data {
	u8 reg_pullup;
	u8 reg_pulldn;
	u8 reg_drain;
	u8 reg_polarity;
	u8 reg_dir;
	u8 reg_data;
	u8 reg_irq_mask;
	u8 reg_irq_src;
	u8 reg_sense;
	u8 reg_clock;
	u8 reg_misc;
	u8 reg_reset;
	u8 ngpios;
};

struct sx150x_chip {
	struct gpio_chip                 gpio_chip;
	struct i2c_client               *client;
	const struct sx150x_device_data *dev_cfg;
	int                              irq_summary;
	int                              irq_base;
	int				 irq_update;
	u32                              irq_sense;
	u32				 irq_masked;
	u32				 dev_sense;
	u32				 dev_masked;
	struct irq_chip                  irq_chip;
	struct mutex                     lock;
};

static const struct sx150x_device_data sx150x_devices[] = {
	[0] = { /* sx1508q */
		.reg_pullup   = 0x03,
		.reg_pulldn   = 0x04,
		.reg_drain    = 0x05,
		.reg_polarity = 0x06,
		.reg_dir      = 0x07,
		.reg_data     = 0x08,
		.reg_irq_mask = 0x09,
		.reg_irq_src  = 0x0c,
		.reg_sense    = 0x0b,
		.reg_clock    = 0x0f,
		.reg_misc     = 0x10,
		.reg_reset    = 0x7d,
		.ngpios       = 8
	},
	[1] = { /* sx1509q */
		.reg_pullup   = 0x07,
		.reg_pulldn   = 0x09,
		.reg_drain    = 0x0b,
		.reg_polarity = 0x0d,
		.reg_dir      = 0x0f,
		.reg_data     = 0x11,
		.reg_irq_mask = 0x13,
		.reg_irq_src  = 0x19,
		.reg_sense    = 0x17,
		.reg_clock    = 0x1e,
		.reg_misc     = 0x1f,
		.reg_reset    = 0x7d,
		.ngpios       = 16
	},
};

static const struct i2c_device_id sx150x_id[] = {
	{"sx1508q", 0},
	{"sx1509q", 1},
	{}
};
MODULE_DEVICE_TABLE(i2c, sx150x_id);

static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
{
	s32 err = i2c_smbus_write_byte_data(client, reg, val);

	if (err < 0)
		dev_warn(&client->dev,
			"i2c write fail: can't write %02x to %02x: %d\n",
			val, reg, err);
	return err;
}

static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
{
	s32 err = i2c_smbus_read_byte_data(client, reg);

	if (err >= 0)
		*val = err;
	else
		dev_warn(&client->dev,
			"i2c read fail: can't read from %02x: %d\n",
			reg, err);
	return err;
}

static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
{
	return (chip->dev_cfg->ngpios == offset);
}

/*
 * These utility functions solve the common problem of locating and setting
 * configuration bits.  Configuration bits are grouped into registers
 * whose indexes increase downwards.  For example, with eight-bit registers,
 * sixteen gpios would have their config bits grouped in the following order:
 * REGISTER N-1 [ f e d c b a 9 8 ]
 *          N   [ 7 6 5 4 3 2 1 0 ]
 *
 * For multi-bit configurations, the pattern gets wider:
 * REGISTER N-3 [ f f e e d d c c ]
 *          N-2 [ b b a a 9 9 8 8 ]
 *          N-1 [ 7 7 6 6 5 5 4 4 ]
 *          N   [ 3 3 2 2 1 1 0 0 ]
 *
 * Given the address of the starting register 'N', the index of the gpio
 * whose configuration we seek to change, and the width in bits of that
 * configuration, these functions allow us to locate the correct
 * register and mask the correct bits.
 */
static inline void sx150x_find_cfg(u8 offset, u8 width,
				u8 *reg, u8 *mask, u8 *shift)
{
	*reg   -= offset * width / 8;
	*mask   = (1 << width) - 1;
	*shift  = (offset * width) % 8;
	*mask <<= *shift;
}

static s32 sx150x_write_cfg(struct sx150x_chip *chip,
			u8 offset, u8 width, u8 reg, u8 val)
{
	u8  mask;
	u8  data;
	u8  shift;
	s32 err;

	sx150x_find_cfg(offset, width, &reg, &mask, &shift);
	err = sx150x_i2c_read(chip->client, reg, &data);
	if (err < 0)
		return err;

	data &= ~mask;
	data |= (val << shift) & mask;
	return sx150x_i2c_write(chip->client, reg, data);
}

static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
{
	u8  reg = chip->dev_cfg->reg_data;
	u8  mask;
	u8  data;
	u8  shift;
	s32 err;

	sx150x_find_cfg(offset, 1, &reg, &mask, &shift);
	err = sx150x_i2c_read(chip->client, reg, &data);
	if (err >= 0)
		err = (data & mask) != 0 ? 1 : 0;

	return err;
}

static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
{
	sx150x_i2c_write(chip->client,
			chip->dev_cfg->reg_clock,
			(val ? 0x1f : 0x10));
}

static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
{
	sx150x_write_cfg(chip,
			offset,
			1,
			chip->dev_cfg->reg_data,
			(val ? 1 : 0));
}

static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
{
	return sx150x_write_cfg(chip,
				offset,
				1,
				chip->dev_cfg->reg_dir,
				1);
}

static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
{
	int err;

	err = sx150x_write_cfg(chip,
			offset,
			1,
			chip->dev_cfg->reg_data,
			(val ? 1 : 0));
	if (err >= 0)
		err = sx150x_write_cfg(chip,
				offset,
				1,
				chip->dev_cfg->reg_dir,
				0);
	return err;
}

static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
{
	struct sx150x_chip *chip;
	int status = -EINVAL;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	if (!offset_is_oscio(chip, offset)) {
		mutex_lock(&chip->lock);
		status = sx150x_get_io(chip, offset);
		mutex_unlock(&chip->lock);
	}

	return status;
}

static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
{
	struct sx150x_chip *chip;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	mutex_lock(&chip->lock);
	if (offset_is_oscio(chip, offset))
		sx150x_set_oscio(chip, val);
	else
		sx150x_set_io(chip, offset, val);
	mutex_unlock(&chip->lock);
}

static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
{
	struct sx150x_chip *chip;
	int status = -EINVAL;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	if (!offset_is_oscio(chip, offset)) {
		mutex_lock(&chip->lock);
		status = sx150x_io_input(chip, offset);
		mutex_unlock(&chip->lock);
	}
	return status;
}

static int sx150x_gpio_direction_output(struct gpio_chip *gc,
					unsigned offset,
					int val)
{
	struct sx150x_chip *chip;
	int status = 0;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	if (!offset_is_oscio(chip, offset)) {
		mutex_lock(&chip->lock);
		status = sx150x_io_output(chip, offset, val);
		mutex_unlock(&chip->lock);
	}
	return status;
}

static void sx150x_irq_mask(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n = d->hwirq;

	chip->irq_masked |= (1 << n);
	chip->irq_update = n;
}

static void sx150x_irq_unmask(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n = d->hwirq;

	chip->irq_masked &= ~(1 << n);
	chip->irq_update = n;
}

static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n, val = 0;

	if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
		return -EINVAL;

	n = d->hwirq;

	if (flow_type & IRQ_TYPE_EDGE_RISING)
		val |= 0x1;
	if (flow_type & IRQ_TYPE_EDGE_FALLING)
		val |= 0x2;

	chip->irq_sense &= ~(3UL << (n * 2));
	chip->irq_sense |= val << (n * 2);
	chip->irq_update = n;
	return 0;
}

static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
{
	struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
	unsigned nhandled = 0;
	unsigned sub_irq;
	unsigned n;
	s32 err;
	u8 val;
	int i;

	for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
		err = sx150x_i2c_read(chip->client,
				      chip->dev_cfg->reg_irq_src - i,
				      &val);
		if (err < 0)
			continue;

		sx150x_i2c_write(chip->client,
				chip->dev_cfg->reg_irq_src - i,
				val);
		for (n = 0; n < 8; ++n) {
			if (val & (1 << n)) {
				sub_irq = irq_find_mapping(
					chip->gpio_chip.irqdomain,
					(i * 8) + n);
				handle_nested_irq(sub_irq);
				++nhandled;
			}
		}
	}

	return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
}

static void sx150x_irq_bus_lock(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);

	mutex_lock(&chip->lock);
}

static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n;

	if (chip->irq_update == NO_UPDATE_PENDING)
		goto out;

	n = chip->irq_update;
	chip->irq_update = NO_UPDATE_PENDING;

	/* Avoid updates if nothing changed */
	if (chip->dev_sense == chip->irq_sense &&
	    chip->dev_sense == chip->irq_masked)
		goto out;

	chip->dev_sense = chip->irq_sense;
	chip->dev_masked = chip->irq_masked;

	if (chip->irq_masked & (1 << n)) {
		sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
		sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
	} else {
		sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
		sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
				 chip->irq_sense >> (n * 2));
	}
out:
	mutex_unlock(&chip->lock);
}

static void sx150x_init_chip(struct sx150x_chip *chip,
			struct i2c_client *client,
			kernel_ulong_t driver_data,
			struct sx150x_platform_data *pdata)
{
	mutex_init(&chip->lock);

	chip->client                     = client;
	chip->dev_cfg                    = &sx150x_devices[driver_data];
	chip->gpio_chip.dev              = &client->dev;
	chip->gpio_chip.label            = client->name;
	chip->gpio_chip.direction_input  = sx150x_gpio_direction_input;
	chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
	chip->gpio_chip.get              = sx150x_gpio_get;
	chip->gpio_chip.set              = sx150x_gpio_set;
	chip->gpio_chip.base             = pdata->gpio_base;
	chip->gpio_chip.can_sleep        = true;
	chip->gpio_chip.ngpio            = chip->dev_cfg->ngpios;
	if (pdata->oscio_is_gpo)
		++chip->gpio_chip.ngpio;

	chip->irq_chip.name                = client->name;
	chip->irq_chip.irq_mask            = sx150x_irq_mask;
	chip->irq_chip.irq_unmask          = sx150x_irq_unmask;
	chip->irq_chip.irq_set_type        = sx150x_irq_set_type;
	chip->irq_chip.irq_bus_lock        = sx150x_irq_bus_lock;
	chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
	chip->irq_summary                  = -1;
	chip->irq_base                     = -1;
	chip->irq_masked                   = ~0;
	chip->irq_sense                    = 0;
	chip->dev_masked                   = ~0;
	chip->dev_sense                    = 0;
	chip->irq_update		   = NO_UPDATE_PENDING;
}

static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
{
	int err = 0;
	unsigned n;

	for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
		err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
	return err;
}

static int sx150x_reset(struct sx150x_chip *chip)
{
	int err;

	err = i2c_smbus_write_byte_data(chip->client,
					chip->dev_cfg->reg_reset,
					0x12);
	if (err < 0)
		return err;

	err = i2c_smbus_write_byte_data(chip->client,
					chip->dev_cfg->reg_reset,
					0x34);
	return err;
}

static int sx150x_init_hw(struct sx150x_chip *chip,
			struct sx150x_platform_data *pdata)
{
	int err = 0;

	if (pdata->reset_during_probe) {
		err = sx150x_reset(chip);
		if (err < 0)
			return err;
	}

	err = sx150x_i2c_write(chip->client,
			chip->dev_cfg->reg_misc,
			0x01);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
			pdata->io_pullup_ena);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
			pdata->io_pulldn_ena);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_drain,
			pdata->io_open_drain_ena);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity,
			pdata->io_polarity);
	if (err < 0)
		return err;

	if (pdata->oscio_is_gpo)
		sx150x_set_oscio(chip, 0);

	return err;
}

static int sx150x_install_irq_chip(struct sx150x_chip *chip,
				int irq_summary,
				int irq_base)
{
	int err;

	chip->irq_summary = irq_summary;
	chip->irq_base    = irq_base;

	/* Add gpio chip to irq subsystem */
	err = gpiochip_irqchip_add(&chip->gpio_chip,
		&chip->irq_chip, chip->irq_base,
		handle_edge_irq, IRQ_TYPE_EDGE_BOTH);
	if (err) {
		dev_err(&chip->client->dev,
			"could not connect irqchip to gpiochip\n");
		return  err;
	}

	err = devm_request_threaded_irq(&chip->client->dev,
			irq_summary, NULL, sx150x_irq_thread_fn,
			IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING,
			chip->irq_chip.name, chip);
	if (err < 0) {
		chip->irq_summary = -1;
		chip->irq_base    = -1;
	}

	return err;
}

static int sx150x_probe(struct i2c_client *client,
				const struct i2c_device_id *id)
{
	static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
				     I2C_FUNC_SMBUS_WRITE_WORD_DATA;
	struct sx150x_platform_data *pdata;
	struct sx150x_chip *chip;
	int rc;

	pdata = dev_get_platdata(&client->dev);
	if (!pdata)
		return -EINVAL;

	if (!i2c_check_functionality(client->adapter, i2c_funcs))
		return -ENOSYS;

	chip = devm_kzalloc(&client->dev,
		sizeof(struct sx150x_chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	sx150x_init_chip(chip, client, id->driver_data, pdata);
	rc = sx150x_init_hw(chip, pdata);
	if (rc < 0)
		return rc;

	rc = gpiochip_add(&chip->gpio_chip);
	if (rc)
		return rc;

	if (pdata->irq_summary >= 0) {
		rc = sx150x_install_irq_chip(chip,
					pdata->irq_summary,
					pdata->irq_base);
		if (rc < 0)
			goto probe_fail_post_gpiochip_add;
	}

	i2c_set_clientdata(client, chip);

	return 0;
probe_fail_post_gpiochip_add:
	gpiochip_remove(&chip->gpio_chip);
	return rc;
}

static int sx150x_remove(struct i2c_client *client)
{
	struct sx150x_chip *chip;

	chip = i2c_get_clientdata(client);
	gpiochip_remove(&chip->gpio_chip);

	return 0;
}

static struct i2c_driver sx150x_driver = {
	.driver = {
		.name = "sx150x",
		.owner = THIS_MODULE
	},
	.probe    = sx150x_probe,
	.remove   = sx150x_remove,
	.id_table = sx150x_id,
};

static int __init sx150x_init(void)
{
	return i2c_add_driver(&sx150x_driver);
}
subsys_initcall(sx150x_init);

static void __exit sx150x_exit(void)
{
	return i2c_del_driver(&sx150x_driver);
}
module_exit(sx150x_exit);

MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("i2c:sx150x");
Commit	Line	Data
c34f16b7 GB	1	/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
	2	*
	3	* This program is free software; you can redistribute it and/or modify
	4	* it under the terms of the GNU General Public License version 2 and
	5	* only version 2 as published by the Free Software Foundation.
	6	*
	7	* This program is distributed in the hope that it will be useful,
	8	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	9	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	10	* GNU General Public License for more details.
	11	*
	12	* You should have received a copy of the GNU General Public License
	13	* along with this program; if not, write to the Free Software
	14	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
	15	* 02110-1301, USA.
	16	*/
	17	#include <linux/gpio.h>
	18	#include <linux/i2c.h>
	19	#include <linux/init.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/irq.h>
	22	#include <linux/module.h>
	23	#include <linux/mutex.h>
	24	#include <linux/slab.h>
c34f16b7 GB	25	#include <linux/i2c/sx150x.h>
c34f16b7 GB	26
0ff56cd8 TG	27	#define NO_UPDATE_PENDING -1
0ff56cd8 TG	28
c34f16b7 GB	29	struct sx150x_device_data {
	30	u8 reg_pullup;
	31	u8 reg_pulldn;
	32	u8 reg_drain;
	33	u8 reg_polarity;
	34	u8 reg_dir;
	35	u8 reg_data;
	36	u8 reg_irq_mask;
	37	u8 reg_irq_src;
	38	u8 reg_sense;
	39	u8 reg_clock;
	40	u8 reg_misc;
	41	u8 reg_reset;
	42	u8 ngpios;
	43	};
	44
	45	struct sx150x_chip {
	46	struct gpio_chip gpio_chip;
	47	struct i2c_client *client;
	48	const struct sx150x_device_data *dev_cfg;
	49	int irq_summary;
	50	int irq_base;
0ff56cd8	51	int irq_update;
c34f16b7	52	u32 irq_sense;
0ff56cd8 TG	53	u32 irq_masked;
	54	u32 dev_sense;
	55	u32 dev_masked;
c34f16b7 GB	56	struct irq_chip irq_chip;
	57	struct mutex lock;
	58	};
	59
	60	static const struct sx150x_device_data sx150x_devices[] = {
	61	[0] = { /* sx1508q */
	62	.reg_pullup = 0x03,
	63	.reg_pulldn = 0x04,
	64	.reg_drain = 0x05,
	65	.reg_polarity = 0x06,
	66	.reg_dir = 0x07,
	67	.reg_data = 0x08,
	68	.reg_irq_mask = 0x09,
	69	.reg_irq_src = 0x0c,
	70	.reg_sense = 0x0b,
	71	.reg_clock = 0x0f,
	72	.reg_misc = 0x10,
	73	.reg_reset = 0x7d,
	74	.ngpios = 8
	75	},
	76	[1] = { /* sx1509q */
	77	.reg_pullup = 0x07,
	78	.reg_pulldn = 0x09,
	79	.reg_drain = 0x0b,
	80	.reg_polarity = 0x0d,
	81	.reg_dir = 0x0f,
	82	.reg_data = 0x11,
	83	.reg_irq_mask = 0x13,
	84	.reg_irq_src = 0x19,
	85	.reg_sense = 0x17,
	86	.reg_clock = 0x1e,
	87	.reg_misc = 0x1f,
	88	.reg_reset = 0x7d,
	89	.ngpios = 16
	90	},
	91	};
	92
	93	static const struct i2c_device_id sx150x_id[] = {
	94	{"sx1508q", 0},
	95	{"sx1509q", 1},
	96	{}
	97	};
	98	MODULE_DEVICE_TABLE(i2c, sx150x_id);
	99
	100	static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
	101	{
	102	s32 err = i2c_smbus_write_byte_data(client, reg, val);
	103
	104	if (err < 0)
	105	dev_warn(&client->dev,
	106	"i2c write fail: can't write %02x to %02x: %d\n",
	107	val, reg, err);
	108	return err;
	109	}
	110
	111	static s32 sx150x_i2c_read(struct i2c_client client, u8 reg, u8 val)
	112	{
	113	s32 err = i2c_smbus_read_byte_data(client, reg);
	114
	115	if (err >= 0)
	116	*val = err;
	117	else
	118	dev_warn(&client->dev,
	119	"i2c read fail: can't read from %02x: %d\n",
120	reg, err);
121	return err;
122	}
123
124	static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
125	{
126	return (chip->dev_cfg->ngpios == offset);
127	}
128
129	/*
130	* These utility functions solve the common problem of locating and setting
131	* configuration bits. Configuration bits are grouped into registers
132	* whose indexes increase downwards. For example, with eight-bit registers,
133	* sixteen gpios would have their config bits grouped in the following order:
134	* REGISTER N-1 [ f e d c b a 9 8 ]
135	* N [ 7 6 5 4 3 2 1 0 ]
136	*
137	* For multi-bit configurations, the pattern gets wider:
138	* REGISTER N-3 [ f f e e d d c c ]
139	* N-2 [ b b a a 9 9 8 8 ]
140	* N-1 [ 7 7 6 6 5 5 4 4 ]
141	* N [ 3 3 2 2 1 1 0 0 ]
142	*
143	* Given the address of the starting register 'N', the index of the gpio
144	* whose configuration we seek to change, and the width in bits of that
145	* configuration, these functions allow us to locate the correct
146	* register and mask the correct bits.
147	*/
148	static inline void sx150x_find_cfg(u8 offset, u8 width,
149	u8 reg, u8 mask, u8 *shift)
150	{
151	reg -= offset width / 8;
152	*mask = (1 << width) - 1;
153	shift = (offset width) % 8;
154	mask <<= shift;
155	}
156
157	static s32 sx150x_write_cfg(struct sx150x_chip *chip,
158	u8 offset, u8 width, u8 reg, u8 val)
159	{
160	u8 mask;
161	u8 data;
162	u8 shift;
163	s32 err;
164
165	sx150x_find_cfg(offset, width, &reg, &mask, &shift);
166	err = sx150x_i2c_read(chip->client, reg, &data);
167	if (err < 0)
168	return err;
169
170	data &= ~mask;
171	data \|= (val << shift) & mask;
172	return sx150x_i2c_write(chip->client, reg, data);
173	}
174
175	static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
176	{
177	u8 reg = chip->dev_cfg->reg_data;
178	u8 mask;
179	u8 data;
180	u8 shift;
181	s32 err;
182
183	sx150x_find_cfg(offset, 1, &reg, &mask, &shift);
184	err = sx150x_i2c_read(chip->client, reg, &data);
185	if (err >= 0)
186	err = (data & mask) != 0 ? 1 : 0;
187
188	return err;
189	}
190
191	static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
192	{
193	sx150x_i2c_write(chip->client,
194	chip->dev_cfg->reg_clock,
195	(val ? 0x1f : 0x10));
196	}
197
198	static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
199	{
200	sx150x_write_cfg(chip,
201	offset,
202	1,
203	chip->dev_cfg->reg_data,
204	(val ? 1 : 0));
205	}
206
207	static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
208	{
209	return sx150x_write_cfg(chip,
210	offset,
211	1,
212	chip->dev_cfg->reg_dir,
213	1);
214	}
215
216	static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
217	{
218	int err;
219
220	err = sx150x_write_cfg(chip,
221	offset,
222	1,
223	chip->dev_cfg->reg_data,
224	(val ? 1 : 0));
225	if (err >= 0)
226	err = sx150x_write_cfg(chip,
227	offset,
228	1,
229	chip->dev_cfg->reg_dir,
230	0);
231	return err;
232	}
233
234	static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
235	{
236	struct sx150x_chip *chip;
237	int status = -EINVAL;
238
239	chip = container_of(gc, struct sx150x_chip, gpio_chip);
240
241	if (!offset_is_oscio(chip, offset)) {
242	mutex_lock(&chip->lock);
243	status = sx150x_get_io(chip, offset);
244	mutex_unlock(&chip->lock);
245	}
246
247	return status;
248	}
249
250	static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
251	{
252	struct sx150x_chip *chip;
253
254	chip = container_of(gc, struct sx150x_chip, gpio_chip);
255
256	mutex_lock(&chip->lock);
257	if (offset_is_oscio(chip, offset))
258	sx150x_set_oscio(chip, val);
259	else
260	sx150x_set_io(chip, offset, val);
261	mutex_unlock(&chip->lock);
262	}
263
264	static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
265	{
266	struct sx150x_chip *chip;
267	int status = -EINVAL;
268
269	chip = container_of(gc, struct sx150x_chip, gpio_chip);
270
271	if (!offset_is_oscio(chip, offset)) {
272	mutex_lock(&chip->lock);
273	status = sx150x_io_input(chip, offset);
274	mutex_unlock(&chip->lock);
275	}
276	return status;
277	}
278
279	static int sx150x_gpio_direction_output(struct gpio_chip *gc,
280	unsigned offset,
281	int val)
282	{
283	struct sx150x_chip *chip;
284	int status = 0;
285
286	chip = container_of(gc, struct sx150x_chip, gpio_chip);
287
288	if (!offset_is_oscio(chip, offset)) {
289	mutex_lock(&chip->lock);
290	status = sx150x_io_output(chip, offset, val);
291	mutex_unlock(&chip->lock);
292	}
293	return status;
294	}
295
673860c1	296	static void sx150x_irq_mask(struct irq_data *d)
c34f16b7	297	{
a3b93081	298	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
093e9435	299	unsigned n = d->hwirq;
c34f16b7	300
0ff56cd8 TG	301	chip->irq_masked \|= (1 << n);
0ff56cd8 TG	302	chip->irq_update = n;
c34f16b7 GB	303	}
c34f16b7 GB	304
673860c1	305	static void sx150x_irq_unmask(struct irq_data *d)
c34f16b7	306	{
a3b93081	307	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
093e9435	308	unsigned n = d->hwirq;
c34f16b7	309
0ff56cd8 TG	310	chip->irq_masked &= ~(1 << n);
0ff56cd8 TG	311	chip->irq_update = n;
c34f16b7 GB	312	}
c34f16b7 GB	313
673860c1	314	static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
c34f16b7	315	{
a3b93081	316	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	317	unsigned n, val = 0;
	318
	319	if (flow_type & (IRQ_TYPE_LEVEL_HIGH \| IRQ_TYPE_LEVEL_LOW))
	320	return -EINVAL;
	321
093e9435	322	n = d->hwirq;
c34f16b7 GB	323
	324	if (flow_type & IRQ_TYPE_EDGE_RISING)
	325	val \|= 0x1;
	326	if (flow_type & IRQ_TYPE_EDGE_FALLING)
	327	val \|= 0x2;
	328
	329	chip->irq_sense &= ~(3UL << (n * 2));
	330	chip->irq_sense \|= val << (n * 2);
0ff56cd8	331	chip->irq_update = n;
c34f16b7 GB	332	return 0;
	333	}
	334
	335	static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
	336	{
	337	struct sx150x_chip chip = (struct sx150x_chip )dev_id;
	338	unsigned nhandled = 0;
	339	unsigned sub_irq;
	340	unsigned n;
	341	s32 err;
	342	u8 val;
	343	int i;
	344
	345	for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
	346	err = sx150x_i2c_read(chip->client,
	347	chip->dev_cfg->reg_irq_src - i,
	348	&val);
	349	if (err < 0)
	350	continue;
	351
	352	sx150x_i2c_write(chip->client,
	353	chip->dev_cfg->reg_irq_src - i,
	354	val);
	355	for (n = 0; n < 8; ++n) {
	356	if (val & (1 << n)) {
093e9435 WC	357	sub_irq = irq_find_mapping(
	358	chip->gpio_chip.irqdomain,
	359	(i * 8) + n);
c34f16b7 GB	360	handle_nested_irq(sub_irq);
	361	++nhandled;
	362	}
	363	}
	364	}
	365
	366	return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
	367	}
	368
673860c1	369	static void sx150x_irq_bus_lock(struct irq_data *d)
c34f16b7	370	{
a3b93081	371	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	372
	373	mutex_lock(&chip->lock);
	374	}
	375
673860c1	376	static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
c34f16b7	377	{
a3b93081	378	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	379	unsigned n;
c34f16b7 GB	380
0ff56cd8 TG	381	if (chip->irq_update == NO_UPDATE_PENDING)
	382	goto out;
	383
	384	n = chip->irq_update;
	385	chip->irq_update = NO_UPDATE_PENDING;
c34f16b7	386
0ff56cd8 TG	387	/* Avoid updates if nothing changed */
	388	if (chip->dev_sense == chip->irq_sense &&
	389	chip->dev_sense == chip->irq_masked)
	390	goto out;
	391
	392	chip->dev_sense = chip->irq_sense;
	393	chip->dev_masked = chip->irq_masked;
	394
	395	if (chip->irq_masked & (1 << n)) {
	396	sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
	397	sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
	398	} else {
	399	sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
	400	sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
	401	chip->irq_sense >> (n * 2));
	402	}
	403	out:
c34f16b7 GB	404	mutex_unlock(&chip->lock);
	405	}
	406
	407	static void sx150x_init_chip(struct sx150x_chip *chip,
	408	struct i2c_client *client,
	409	kernel_ulong_t driver_data,
	410	struct sx150x_platform_data *pdata)
	411	{
	412	mutex_init(&chip->lock);
	413
	414	chip->client = client;
	415	chip->dev_cfg = &sx150x_devices[driver_data];
093e9435	416	chip->gpio_chip.dev = &client->dev;
c34f16b7 GB	417	chip->gpio_chip.label = client->name;
	418	chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
	419	chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
	420	chip->gpio_chip.get = sx150x_gpio_get;
	421	chip->gpio_chip.set = sx150x_gpio_set;
c34f16b7	422	chip->gpio_chip.base = pdata->gpio_base;
9fb1f39e	423	chip->gpio_chip.can_sleep = true;
c34f16b7 GB	424	chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
	425	if (pdata->oscio_is_gpo)
	426	++chip->gpio_chip.ngpio;
	427
673860c1 LB	428	chip->irq_chip.name = client->name;
	429	chip->irq_chip.irq_mask = sx150x_irq_mask;
	430	chip->irq_chip.irq_unmask = sx150x_irq_unmask;
	431	chip->irq_chip.irq_set_type = sx150x_irq_set_type;
	432	chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
	433	chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
	434	chip->irq_summary = -1;
	435	chip->irq_base = -1;
0ff56cd8	436	chip->irq_masked = ~0;
673860c1	437	chip->irq_sense = 0;
0ff56cd8 TG	438	chip->dev_masked = ~0;
	439	chip->dev_sense = 0;
	440	chip->irq_update = NO_UPDATE_PENDING;
c34f16b7 GB	441	}
	442
	443	static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
	444	{
	445	int err = 0;
	446	unsigned n;
	447
	448	for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
	449	err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
	450	return err;
	451	}
	452
5affb607	453	static int sx150x_reset(struct sx150x_chip *chip)
c34f16b7	454	{
5affb607	455	int err;
c34f16b7	456
5affb607	457	err = i2c_smbus_write_byte_data(chip->client,
c34f16b7	458	chip->dev_cfg->reg_reset,
5affb607	459	0x12);
c34f16b7 GB	460	if (err < 0)
	461	return err;
	462
5affb607 GB	463	err = i2c_smbus_write_byte_data(chip->client,
	464	chip->dev_cfg->reg_reset,
	465	0x34);
	466	return err;
	467	}
	468
	469	static int sx150x_init_hw(struct sx150x_chip *chip,
	470	struct sx150x_platform_data *pdata)
	471	{
	472	int err = 0;
	473
	474	if (pdata->reset_during_probe) {
	475	err = sx150x_reset(chip);
	476	if (err < 0)
	477	return err;
	478	}
	479
c34f16b7 GB	480	err = sx150x_i2c_write(chip->client,
	481	chip->dev_cfg->reg_misc,
	482	0x01);
	483	if (err < 0)
	484	return err;
	485
	486	err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
	487	pdata->io_pullup_ena);
	488	if (err < 0)
	489	return err;
	490
	491	err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
	492	pdata->io_pulldn_ena);
	493	if (err < 0)
	494	return err;
	495
	496	err = sx150x_init_io(chip, chip->dev_cfg->reg_drain,
	497	pdata->io_open_drain_ena);
	498	if (err < 0)
	499	return err;
	500
	501	err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity,
	502	pdata->io_polarity);
	503	if (err < 0)
	504	return err;
	505
	506	if (pdata->oscio_is_gpo)
	507	sx150x_set_oscio(chip, 0);
	508
	509	return err;
	510	}
	511
	512	static int sx150x_install_irq_chip(struct sx150x_chip *chip,
	513	int irq_summary,
	514	int irq_base)
	515	{
	516	int err;
c34f16b7 GB	517
	518	chip->irq_summary = irq_summary;
	519	chip->irq_base = irq_base;
	520
093e9435 WC	521	/* Add gpio chip to irq subsystem */
	522	err = gpiochip_irqchip_add(&chip->gpio_chip,
	523	&chip->irq_chip, chip->irq_base,
	524	handle_edge_irq, IRQ_TYPE_EDGE_BOTH);
	525	if (err) {
	526	dev_err(&chip->client->dev,
	527	"could not connect irqchip to gpiochip\n");
	528	return err;
c34f16b7 GB	529	}
c34f16b7 GB	530
644c8df2	531	err = devm_request_threaded_irq(&chip->client->dev,
093e9435 WC	532	irq_summary, NULL, sx150x_irq_thread_fn,
	533	IRQF_ONESHOT \| IRQF_SHARED \| IRQF_TRIGGER_FALLING,
	534	chip->irq_chip.name, chip);
c34f16b7 GB	535	if (err < 0) {
	536	chip->irq_summary = -1;
	537	chip->irq_base = -1;
	538	}
	539
	540	return err;
	541	}
	542
3836309d	543	static int sx150x_probe(struct i2c_client *client,
c34f16b7 GB	544	const struct i2c_device_id *id)
	545	{
	546	static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA \|
	547	I2C_FUNC_SMBUS_WRITE_WORD_DATA;
	548	struct sx150x_platform_data *pdata;
	549	struct sx150x_chip *chip;
	550	int rc;
	551
e56aee18	552	pdata = dev_get_platdata(&client->dev);
c34f16b7 GB	553	if (!pdata)
	554	return -EINVAL;
	555
	556	if (!i2c_check_functionality(client->adapter, i2c_funcs))
	557	return -ENOSYS;
	558
644c8df2 NB	559	chip = devm_kzalloc(&client->dev,
644c8df2 NB	560	sizeof(struct sx150x_chip), GFP_KERNEL);
c34f16b7 GB	561	if (!chip)
	562	return -ENOMEM;
	563
	564	sx150x_init_chip(chip, client, id->driver_data, pdata);
	565	rc = sx150x_init_hw(chip, pdata);
	566	if (rc < 0)
644c8df2	567	return rc;
c34f16b7 GB	568
c34f16b7 GB	569	rc = gpiochip_add(&chip->gpio_chip);
644c8df2 NB	570	if (rc)
644c8df2 NB	571	return rc;
c34f16b7 GB	572
	573	if (pdata->irq_summary >= 0) {
	574	rc = sx150x_install_irq_chip(chip,
	575	pdata->irq_summary,
	576	pdata->irq_base);
	577	if (rc < 0)
	578	goto probe_fail_post_gpiochip_add;
	579	}
	580
	581	i2c_set_clientdata(client, chip);
	582
	583	return 0;
	584	probe_fail_post_gpiochip_add:
9f5132ae	585	gpiochip_remove(&chip->gpio_chip);
c34f16b7 GB	586	return rc;
	587	}
	588
206210ce	589	static int sx150x_remove(struct i2c_client *client)
c34f16b7 GB	590	{
c34f16b7 GB	591	struct sx150x_chip *chip;
c34f16b7 GB	592
c34f16b7 GB	593	chip = i2c_get_clientdata(client);
9f5132ae	594	gpiochip_remove(&chip->gpio_chip);
c34f16b7	595
c34f16b7 GB	596	return 0;
	597	}
	598
	599	static struct i2c_driver sx150x_driver = {
	600	.driver = {
	601	.name = "sx150x",
	602	.owner = THIS_MODULE
	603	},
	604	.probe = sx150x_probe,
8283c4ff	605	.remove = sx150x_remove,
c34f16b7 GB	606	.id_table = sx150x_id,
	607	};
	608
	609	static int __init sx150x_init(void)
	610	{
	611	return i2c_add_driver(&sx150x_driver);
	612	}
	613	subsys_initcall(sx150x_init);
	614
	615	static void __exit sx150x_exit(void)
	616	{
	617	return i2c_del_driver(&sx150x_driver);
	618	}
	619	module_exit(sx150x_exit);
	620
	621	MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
	622	MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
	623	MODULE_LICENSE("GPL v2");
	624	MODULE_ALIAS("i2c:sx150x");