Commit | Line | Data |
---|---|---|
9952f691 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
3d50a278 LD |
2 | /* |
3 | * TI Palma series PMIC's GPIO driver. | |
4 | * | |
5 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | |
6 | * | |
7 | * Author: Laxman Dewangan <ldewangan@nvidia.com> | |
3d50a278 LD |
8 | */ |
9 | ||
b11a0b3e | 10 | #include <linux/gpio/driver.h> |
3d50a278 | 11 | #include <linux/kernel.h> |
f9f2b5cb | 12 | #include <linux/init.h> |
3d50a278 LD |
13 | #include <linux/mfd/palmas.h> |
14 | #include <linux/of.h> | |
3d50a278 LD |
15 | #include <linux/platform_device.h> |
16 | ||
17 | struct palmas_gpio { | |
18 | struct gpio_chip gpio_chip; | |
19 | struct palmas *palmas; | |
20 | }; | |
21 | ||
ca6af7b9 LD |
22 | struct palmas_device_data { |
23 | int ngpio; | |
24 | }; | |
25 | ||
3d50a278 LD |
26 | static int palmas_gpio_get(struct gpio_chip *gc, unsigned offset) |
27 | { | |
5b68cc2d | 28 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
3d50a278 LD |
29 | struct palmas *palmas = pg->palmas; |
30 | unsigned int val; | |
31 | int ret; | |
ca6af7b9 LD |
32 | unsigned int reg; |
33 | int gpio16 = (offset/8); | |
34 | ||
35 | offset %= 8; | |
36 | reg = (gpio16) ? PALMAS_GPIO_DATA_DIR2 : PALMAS_GPIO_DATA_DIR; | |
3d50a278 | 37 | |
ca6af7b9 | 38 | ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val); |
3d50a278 | 39 | if (ret < 0) { |
58383c78 | 40 | dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret); |
8b628c65 AC |
41 | return ret; |
42 | } | |
43 | ||
ca6af7b9 LD |
44 | if (val & BIT(offset)) |
45 | reg = (gpio16) ? PALMAS_GPIO_DATA_OUT2 : PALMAS_GPIO_DATA_OUT; | |
46 | else | |
47 | reg = (gpio16) ? PALMAS_GPIO_DATA_IN2 : PALMAS_GPIO_DATA_IN; | |
48 | ||
49 | ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val); | |
8b628c65 | 50 | if (ret < 0) { |
58383c78 | 51 | dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret); |
3d50a278 LD |
52 | return ret; |
53 | } | |
54 | return !!(val & BIT(offset)); | |
55 | } | |
56 | ||
57 | static void palmas_gpio_set(struct gpio_chip *gc, unsigned offset, | |
58 | int value) | |
59 | { | |
5b68cc2d | 60 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
3d50a278 LD |
61 | struct palmas *palmas = pg->palmas; |
62 | int ret; | |
ca6af7b9 LD |
63 | unsigned int reg; |
64 | int gpio16 = (offset/8); | |
3d50a278 | 65 | |
ca6af7b9 LD |
66 | offset %= 8; |
67 | if (gpio16) | |
68 | reg = (value) ? | |
69 | PALMAS_GPIO_SET_DATA_OUT2 : PALMAS_GPIO_CLEAR_DATA_OUT2; | |
3d50a278 | 70 | else |
ca6af7b9 LD |
71 | reg = (value) ? |
72 | PALMAS_GPIO_SET_DATA_OUT : PALMAS_GPIO_CLEAR_DATA_OUT; | |
73 | ||
74 | ret = palmas_write(palmas, PALMAS_GPIO_BASE, reg, BIT(offset)); | |
3d50a278 | 75 | if (ret < 0) |
58383c78 | 76 | dev_err(gc->parent, "Reg 0x%02x write failed, %d\n", reg, ret); |
3d50a278 LD |
77 | } |
78 | ||
79 | static int palmas_gpio_output(struct gpio_chip *gc, unsigned offset, | |
80 | int value) | |
81 | { | |
5b68cc2d | 82 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
3d50a278 LD |
83 | struct palmas *palmas = pg->palmas; |
84 | int ret; | |
ca6af7b9 LD |
85 | unsigned int reg; |
86 | int gpio16 = (offset/8); | |
87 | ||
88 | offset %= 8; | |
89 | reg = (gpio16) ? PALMAS_GPIO_DATA_DIR2 : PALMAS_GPIO_DATA_DIR; | |
3d50a278 LD |
90 | |
91 | /* Set the initial value */ | |
92 | palmas_gpio_set(gc, offset, value); | |
93 | ||
ca6af7b9 LD |
94 | ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, |
95 | BIT(offset), BIT(offset)); | |
3d50a278 | 96 | if (ret < 0) |
58383c78 LW |
97 | dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg, |
98 | ret); | |
3d50a278 LD |
99 | return ret; |
100 | } | |
101 | ||
102 | static int palmas_gpio_input(struct gpio_chip *gc, unsigned offset) | |
103 | { | |
5b68cc2d | 104 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
3d50a278 LD |
105 | struct palmas *palmas = pg->palmas; |
106 | int ret; | |
ca6af7b9 LD |
107 | unsigned int reg; |
108 | int gpio16 = (offset/8); | |
109 | ||
110 | offset %= 8; | |
111 | reg = (gpio16) ? PALMAS_GPIO_DATA_DIR2 : PALMAS_GPIO_DATA_DIR; | |
3d50a278 | 112 | |
ca6af7b9 | 113 | ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, BIT(offset), 0); |
3d50a278 | 114 | if (ret < 0) |
58383c78 LW |
115 | dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg, |
116 | ret); | |
3d50a278 LD |
117 | return ret; |
118 | } | |
119 | ||
120 | static int palmas_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
121 | { | |
5b68cc2d | 122 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
3d50a278 LD |
123 | struct palmas *palmas = pg->palmas; |
124 | ||
125 | return palmas_irq_get_virq(palmas, PALMAS_GPIO_0_IRQ + offset); | |
126 | } | |
127 | ||
ca6af7b9 LD |
128 | static const struct palmas_device_data palmas_dev_data = { |
129 | .ngpio = 8, | |
130 | }; | |
131 | ||
132 | static const struct palmas_device_data tps80036_dev_data = { | |
133 | .ngpio = 16, | |
134 | }; | |
135 | ||
722782fe | 136 | static const struct of_device_id of_palmas_gpio_match[] = { |
ca6af7b9 LD |
137 | { .compatible = "ti,palmas-gpio", .data = &palmas_dev_data,}, |
138 | { .compatible = "ti,tps65913-gpio", .data = &palmas_dev_data,}, | |
139 | { .compatible = "ti,tps65914-gpio", .data = &palmas_dev_data,}, | |
140 | { .compatible = "ti,tps80036-gpio", .data = &tps80036_dev_data,}, | |
141 | { }, | |
142 | }; | |
ca6af7b9 | 143 | |
3d50a278 LD |
144 | static int palmas_gpio_probe(struct platform_device *pdev) |
145 | { | |
146 | struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); | |
147 | struct palmas_platform_data *palmas_pdata; | |
148 | struct palmas_gpio *palmas_gpio; | |
149 | int ret; | |
ca6af7b9 LD |
150 | const struct palmas_device_data *dev_data; |
151 | ||
fd46d5c3 | 152 | dev_data = of_device_get_match_data(&pdev->dev); |
ca6af7b9 LD |
153 | if (!dev_data) |
154 | dev_data = &palmas_dev_data; | |
3d50a278 LD |
155 | |
156 | palmas_gpio = devm_kzalloc(&pdev->dev, | |
157 | sizeof(*palmas_gpio), GFP_KERNEL); | |
5605beb2 | 158 | if (!palmas_gpio) |
3d50a278 | 159 | return -ENOMEM; |
3d50a278 LD |
160 | |
161 | palmas_gpio->palmas = palmas; | |
162 | palmas_gpio->gpio_chip.owner = THIS_MODULE; | |
163 | palmas_gpio->gpio_chip.label = dev_name(&pdev->dev); | |
ca6af7b9 | 164 | palmas_gpio->gpio_chip.ngpio = dev_data->ngpio; |
9fb1f39e | 165 | palmas_gpio->gpio_chip.can_sleep = true; |
3d50a278 LD |
166 | palmas_gpio->gpio_chip.direction_input = palmas_gpio_input; |
167 | palmas_gpio->gpio_chip.direction_output = palmas_gpio_output; | |
168 | palmas_gpio->gpio_chip.to_irq = palmas_gpio_to_irq; | |
169 | palmas_gpio->gpio_chip.set = palmas_gpio_set; | |
170 | palmas_gpio->gpio_chip.get = palmas_gpio_get; | |
58383c78 | 171 | palmas_gpio->gpio_chip.parent = &pdev->dev; |
448cf905 | 172 | |
3d50a278 LD |
173 | palmas_pdata = dev_get_platdata(palmas->dev); |
174 | if (palmas_pdata && palmas_pdata->gpio_base) | |
175 | palmas_gpio->gpio_chip.base = palmas_pdata->gpio_base; | |
176 | else | |
177 | palmas_gpio->gpio_chip.base = -1; | |
178 | ||
297bf067 LD |
179 | ret = devm_gpiochip_add_data(&pdev->dev, &palmas_gpio->gpio_chip, |
180 | palmas_gpio); | |
3d50a278 LD |
181 | if (ret < 0) { |
182 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | |
183 | return ret; | |
184 | } | |
185 | ||
3d50a278 LD |
186 | return ret; |
187 | } | |
188 | ||
3d50a278 LD |
189 | static struct platform_driver palmas_gpio_driver = { |
190 | .driver.name = "palmas-gpio", | |
5763318f | 191 | .driver.of_match_table = of_palmas_gpio_match, |
3d50a278 | 192 | .probe = palmas_gpio_probe, |
3d50a278 LD |
193 | }; |
194 | ||
195 | static int __init palmas_gpio_init(void) | |
196 | { | |
197 | return platform_driver_register(&palmas_gpio_driver); | |
198 | } | |
199 | subsys_initcall(palmas_gpio_init); |