Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
935c500c | 2 | /* |
935c500c | 3 | * |
baddc7ca | 4 | * Copyright (C) 2012 John Crispin <john@phrozen.org> |
935c500c JC |
5 | */ |
6 | ||
7 | #include <linux/init.h> | |
a36e9a1c | 8 | #include <linux/module.h> |
935c500c JC |
9 | #include <linux/types.h> |
10 | #include <linux/platform_device.h> | |
11 | #include <linux/mutex.h> | |
0cbbdcf9 | 12 | #include <linux/gpio/driver.h> |
a36e9a1c JC |
13 | #include <linux/of.h> |
14 | #include <linux/of_gpio.h> | |
935c500c | 15 | #include <linux/io.h> |
a36e9a1c | 16 | #include <linux/slab.h> |
935c500c JC |
17 | |
18 | #include <lantiq_soc.h> | |
19 | ||
20 | /* | |
21 | * By attaching hardware latches to the EBU it is possible to create output | |
22 | * only gpios. This driver configures a special memory address, which when | |
23 | * written to outputs 16 bit to the latches. | |
24 | */ | |
25 | ||
26 | #define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */ | |
27 | #define LTQ_EBU_WP 0x80000000 /* write protect bit */ | |
28 | ||
a36e9a1c JC |
29 | struct ltq_mm { |
30 | struct of_mm_gpio_chip mmchip; | |
31 | u16 shadow; /* shadow the latches state */ | |
32 | }; | |
935c500c | 33 | |
a36e9a1c JC |
34 | /** |
35 | * ltq_mm_apply() - write the shadow value to the ebu address. | |
36 | * @chip: Pointer to our private data structure. | |
37 | * | |
38 | * Write the shadow value to the EBU to set the gpios. We need to set the | |
39 | * global EBU lock to make sure that PCI/MTD dont break. | |
40 | */ | |
41 | static void ltq_mm_apply(struct ltq_mm *chip) | |
935c500c JC |
42 | { |
43 | unsigned long flags; | |
44 | ||
45 | spin_lock_irqsave(&ebu_lock, flags); | |
46 | ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1); | |
a36e9a1c | 47 | __raw_writew(chip->shadow, chip->mmchip.regs); |
935c500c JC |
48 | ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); |
49 | spin_unlock_irqrestore(&ebu_lock, flags); | |
50 | } | |
51 | ||
a36e9a1c JC |
52 | /** |
53 | * ltq_mm_set() - gpio_chip->set - set gpios. | |
54 | * @gc: Pointer to gpio_chip device structure. | |
55 | * @gpio: GPIO signal number. | |
56 | * @val: Value to be written to specified signal. | |
57 | * | |
58 | * Set the shadow value and call ltq_mm_apply. | |
59 | */ | |
60 | static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value) | |
935c500c | 61 | { |
6aa7dbfa | 62 | struct ltq_mm *chip = gpiochip_get_data(gc); |
a36e9a1c | 63 | |
935c500c | 64 | if (value) |
a36e9a1c | 65 | chip->shadow |= (1 << offset); |
935c500c | 66 | else |
a36e9a1c JC |
67 | chip->shadow &= ~(1 << offset); |
68 | ltq_mm_apply(chip); | |
935c500c JC |
69 | } |
70 | ||
a36e9a1c JC |
71 | /** |
72 | * ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction. | |
73 | * @gc: Pointer to gpio_chip device structure. | |
74 | * @gpio: GPIO signal number. | |
75 | * @val: Value to be written to specified signal. | |
76 | * | |
77 | * Same as ltq_mm_set, always returns 0. | |
78 | */ | |
79 | static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value) | |
935c500c | 80 | { |
a36e9a1c | 81 | ltq_mm_set(gc, offset, value); |
935c500c JC |
82 | |
83 | return 0; | |
84 | } | |
85 | ||
a36e9a1c JC |
86 | /** |
87 | * ltq_mm_save_regs() - Set initial values of GPIO pins | |
88 | * @mm_gc: pointer to memory mapped GPIO chip structure | |
89 | */ | |
90 | static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc) | |
91 | { | |
95c76170 GR |
92 | struct ltq_mm *chip = |
93 | container_of(mm_gc, struct ltq_mm, mmchip); | |
a36e9a1c JC |
94 | |
95 | /* tell the ebu controller which memory address we will be using */ | |
96 | ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); | |
97 | ||
98 | ltq_mm_apply(chip); | |
99 | } | |
935c500c | 100 | |
a36e9a1c | 101 | static int ltq_mm_probe(struct platform_device *pdev) |
935c500c | 102 | { |
a36e9a1c | 103 | struct ltq_mm *chip; |
68a99b18 | 104 | u32 shadow; |
935c500c | 105 | |
080440a2 | 106 | chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); |
a36e9a1c | 107 | if (!chip) |
935c500c | 108 | return -ENOMEM; |
935c500c | 109 | |
da238221 RRD |
110 | platform_set_drvdata(pdev, chip); |
111 | ||
a36e9a1c | 112 | chip->mmchip.gc.ngpio = 16; |
a36e9a1c JC |
113 | chip->mmchip.gc.direction_output = ltq_mm_dir_out; |
114 | chip->mmchip.gc.set = ltq_mm_set; | |
115 | chip->mmchip.save_regs = ltq_mm_save_regs; | |
935c500c | 116 | |
a36e9a1c | 117 | /* store the shadow value if one was passed by the devicetree */ |
68a99b18 RRD |
118 | if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) |
119 | chip->shadow = shadow; | |
935c500c | 120 | |
6aa7dbfa | 121 | return of_mm_gpiochip_add_data(pdev->dev.of_node, &chip->mmchip, chip); |
935c500c JC |
122 | } |
123 | ||
da238221 RRD |
124 | static int ltq_mm_remove(struct platform_device *pdev) |
125 | { | |
126 | struct ltq_mm *chip = platform_get_drvdata(pdev); | |
127 | ||
128 | of_mm_gpiochip_remove(&chip->mmchip); | |
129 | ||
130 | return 0; | |
131 | } | |
132 | ||
a36e9a1c JC |
133 | static const struct of_device_id ltq_mm_match[] = { |
134 | { .compatible = "lantiq,gpio-mm" }, | |
135 | {}, | |
136 | }; | |
137 | MODULE_DEVICE_TABLE(of, ltq_mm_match); | |
138 | ||
139 | static struct platform_driver ltq_mm_driver = { | |
140 | .probe = ltq_mm_probe, | |
da238221 | 141 | .remove = ltq_mm_remove, |
935c500c | 142 | .driver = { |
a36e9a1c | 143 | .name = "gpio-mm-ltq", |
a36e9a1c | 144 | .of_match_table = ltq_mm_match, |
935c500c JC |
145 | }, |
146 | }; | |
147 | ||
a36e9a1c | 148 | static int __init ltq_mm_init(void) |
935c500c | 149 | { |
a36e9a1c | 150 | return platform_driver_register(<q_mm_driver); |
935c500c JC |
151 | } |
152 | ||
a36e9a1c | 153 | subsys_initcall(ltq_mm_init); |
da238221 RRD |
154 | |
155 | static void __exit ltq_mm_exit(void) | |
156 | { | |
157 | platform_driver_unregister(<q_mm_driver); | |
158 | } | |
159 | module_exit(ltq_mm_exit); |