[linux-2.6-block.git] / drivers / gpio / gpio-merrifield.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Intel Merrifield SoC GPIO driver
 *
 * Copyright (c) 2016, 2023 Intel Corporation.
 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
 */

#include <linux/acpi.h>
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/types.h>

#include "gpio-tangier.h"

/* Intel Merrifield has 192 GPIO pins */
#define MRFLD_NGPIO	192

static const struct tng_gpio_pinrange mrfld_gpio_ranges[] = {
	GPIO_PINRANGE(0, 11, 146),
	GPIO_PINRANGE(12, 13, 144),
	GPIO_PINRANGE(14, 15, 35),
	GPIO_PINRANGE(16, 16, 164),
	GPIO_PINRANGE(17, 18, 105),
	GPIO_PINRANGE(19, 22, 101),
	GPIO_PINRANGE(23, 30, 107),
	GPIO_PINRANGE(32, 43, 67),
	GPIO_PINRANGE(44, 63, 195),
	GPIO_PINRANGE(64, 67, 140),
	GPIO_PINRANGE(68, 69, 165),
	GPIO_PINRANGE(70, 71, 65),
	GPIO_PINRANGE(72, 76, 228),
	GPIO_PINRANGE(77, 86, 37),
	GPIO_PINRANGE(87, 87, 48),
	GPIO_PINRANGE(88, 88, 47),
	GPIO_PINRANGE(89, 96, 49),
	GPIO_PINRANGE(97, 97, 34),
	GPIO_PINRANGE(102, 119, 83),
	GPIO_PINRANGE(120, 123, 79),
	GPIO_PINRANGE(124, 135, 115),
	GPIO_PINRANGE(137, 142, 158),
	GPIO_PINRANGE(154, 163, 24),
	GPIO_PINRANGE(164, 176, 215),
	GPIO_PINRANGE(177, 189, 127),
	GPIO_PINRANGE(190, 191, 178),
};

static const char *mrfld_gpio_get_pinctrl_dev_name(struct tng_gpio *priv)
{
	struct acpi_device *adev;
	const char *name;

	adev = acpi_dev_get_first_match_dev("INTC1002", NULL, -1);
	if (adev) {
		name = devm_kstrdup(priv->dev, acpi_dev_name(adev), GFP_KERNEL);
		acpi_dev_put(adev);
	} else {
		name = "pinctrl-merrifield";
	}

	return name;
}

static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
	struct device *dev = &pdev->dev;
	struct tng_gpio *priv;
	u32 gpio_base, irq_base;
	void __iomem *base;
	int retval;

	retval = pcim_enable_device(pdev);
	if (retval)
		return retval;

	retval = pcim_iomap_regions(pdev, BIT(1) | BIT(0), pci_name(pdev));
	if (retval) {
		dev_err(&pdev->dev, "I/O memory mapping error\n");
		return retval;
	}

	base = pcim_iomap_table(pdev)[1];

	irq_base = readl(base + 0 * sizeof(u32));
	gpio_base = readl(base + 1 * sizeof(u32));

	/* Release the IO mapping, since we already get the info from BAR1 */
	pcim_iounmap_regions(pdev, BIT(1));

	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->dev = &pdev->dev;
	priv->reg_base = pcim_iomap_table(pdev)[0];

	priv->pin_info.pin_ranges = mrfld_gpio_ranges;
	priv->pin_info.nranges = ARRAY_SIZE(mrfld_gpio_ranges);
	priv->pin_info.name = mrfld_gpio_get_pinctrl_dev_name(priv);
	if (!priv->pin_info.name)
		return -ENOMEM;

	priv->info.base = gpio_base;
	priv->info.ngpio = MRFLD_NGPIO;
	priv->info.first = irq_base;

	retval = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
	if (retval < 0)
		return retval;

	priv->irq = pci_irq_vector(pdev, 0);

	priv->wake_regs.gwmr = GWMR_MRFLD;
	priv->wake_regs.gwsr = GWSR_MRFLD;
	priv->wake_regs.gsir = GSIR_MRFLD;

	retval = devm_tng_gpio_probe(dev, priv);
	if (retval)
		return dev_err_probe(dev, retval, "tng_gpio_probe error\n");

	pci_set_drvdata(pdev, priv);
	return 0;
}

static const struct pci_device_id mrfld_gpio_ids[] = {
	{ PCI_VDEVICE(INTEL, 0x1199) },
	{ }
};
MODULE_DEVICE_TABLE(pci, mrfld_gpio_ids);

static struct pci_driver mrfld_gpio_driver = {
	.name		= "gpio-merrifield",
	.id_table	= mrfld_gpio_ids,
	.probe		= mrfld_gpio_probe,
};
module_pci_driver(mrfld_gpio_driver);

MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
MODULE_DESCRIPTION("Intel Merrifield SoC GPIO driver");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(GPIO_TANGIER);
Commit	Line	Data
93374b76	1	// SPDX-License-Identifier: GPL-2.0
ccf6fd6d AS	2	/*
	3	* Intel Merrifield SoC GPIO driver
	4	*
34840be5	5	* Copyright (c) 2016, 2023 Intel Corporation.
ccf6fd6d	6	* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
ccf6fd6d AS	7	*/
ccf6fd6d AS	8
dd1dbf94	9	#include <linux/acpi.h>
ccf6fd6d	10	#include <linux/bitops.h>
34840be5 P	11	#include <linux/device.h>
34840be5 P	12	#include <linux/err.h>
ccf6fd6d AS	13	#include <linux/io.h>
	14	#include <linux/module.h>
	15	#include <linux/pci.h>
34840be5	16	#include <linux/types.h>
ccf6fd6d	17
34840be5	18	#include "gpio-tangier.h"
ccf6fd6d AS	19
	20	/* Intel Merrifield has 192 GPIO pins */
	21	#define MRFLD_NGPIO 192
	22
34840be5	23	static const struct tng_gpio_pinrange mrfld_gpio_ranges[] = {
ccf6fd6d AS	24	GPIO_PINRANGE(0, 11, 146),
	25	GPIO_PINRANGE(12, 13, 144),
	26	GPIO_PINRANGE(14, 15, 35),
	27	GPIO_PINRANGE(16, 16, 164),
	28	GPIO_PINRANGE(17, 18, 105),
	29	GPIO_PINRANGE(19, 22, 101),
	30	GPIO_PINRANGE(23, 30, 107),
	31	GPIO_PINRANGE(32, 43, 67),
	32	GPIO_PINRANGE(44, 63, 195),
	33	GPIO_PINRANGE(64, 67, 140),
	34	GPIO_PINRANGE(68, 69, 165),
	35	GPIO_PINRANGE(70, 71, 65),
	36	GPIO_PINRANGE(72, 76, 228),
	37	GPIO_PINRANGE(77, 86, 37),
	38	GPIO_PINRANGE(87, 87, 48),
	39	GPIO_PINRANGE(88, 88, 47),
	40	GPIO_PINRANGE(89, 96, 49),
	41	GPIO_PINRANGE(97, 97, 34),
	42	GPIO_PINRANGE(102, 119, 83),
	43	GPIO_PINRANGE(120, 123, 79),
	44	GPIO_PINRANGE(124, 135, 115),
	45	GPIO_PINRANGE(137, 142, 158),
	46	GPIO_PINRANGE(154, 163, 24),
	47	GPIO_PINRANGE(164, 176, 215),
	48	GPIO_PINRANGE(177, 189, 127),
	49	GPIO_PINRANGE(190, 191, 178),
	50	};
	51
34840be5	52	static const char mrfld_gpio_get_pinctrl_dev_name(struct tng_gpio priv)
dd1dbf94	53	{
d00d2109 AS	54	struct acpi_device *adev;
	55	const char *name;
	56
	57	adev = acpi_dev_get_first_match_dev("INTC1002", NULL, -1);
	58	if (adev) {
	59	name = devm_kstrdup(priv->dev, acpi_dev_name(adev), GFP_KERNEL);
fe066621	60	acpi_dev_put(adev);
d00d2109 AS	61	} else {
	62	name = "pinctrl-merrifield";
	63	}
	64
	65	return name;
dd1dbf94 AS	66	}
dd1dbf94 AS	67
cd242b33 AS	68	static int mrfld_gpio_probe(struct pci_dev pdev, const struct pci_device_id id)
cd242b33 AS	69	{
34840be5 P	70	struct device *dev = &pdev->dev;
34840be5 P	71	struct tng_gpio *priv;
ccf6fd6d AS	72	u32 gpio_base, irq_base;
ccf6fd6d AS	73	void __iomem *base;
ccf6fd6d AS	74	int retval;
	75
	76	retval = pcim_enable_device(pdev);
	77	if (retval)
	78	return retval;
	79
	80	retval = pcim_iomap_regions(pdev, BIT(1) \| BIT(0), pci_name(pdev));
	81	if (retval) {
	82	dev_err(&pdev->dev, "I/O memory mapping error\n");
	83	return retval;
	84	}
	85
	86	base = pcim_iomap_table(pdev)[1];
	87
7e73aa90 AS	88	irq_base = readl(base + 0 * sizeof(u32));
7e73aa90 AS	89	gpio_base = readl(base + 1 * sizeof(u32));
ccf6fd6d AS	90
	91	/* Release the IO mapping, since we already get the info from BAR1 */
	92	pcim_iounmap_regions(pdev, BIT(1));
	93
	94	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
4b7edaef	95	if (!priv)
ccf6fd6d	96	return -ENOMEM;
ccf6fd6d AS	97
	98	priv->dev = &pdev->dev;
	99	priv->reg_base = pcim_iomap_table(pdev)[0];
	100
34840be5 P	101	priv->pin_info.pin_ranges = mrfld_gpio_ranges;
	102	priv->pin_info.nranges = ARRAY_SIZE(mrfld_gpio_ranges);
	103	priv->pin_info.name = mrfld_gpio_get_pinctrl_dev_name(priv);
	104	if (!priv->pin_info.name)
	105	return -ENOMEM;
ccf6fd6d	106
34840be5 P	107	priv->info.base = gpio_base;
	108	priv->info.ngpio = MRFLD_NGPIO;
	109	priv->info.first = irq_base;
ccf6fd6d	110
6b1c7837 AS	111	retval = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
	112	if (retval < 0)
	113	return retval;
	114
34840be5	115	priv->irq = pci_irq_vector(pdev, 0);
4a5e0f9e	116
34840be5 P	117	priv->wake_regs.gwmr = GWMR_MRFLD;
	118	priv->wake_regs.gwsr = GWSR_MRFLD;
	119	priv->wake_regs.gsir = GSIR_MRFLD;
	120
	121	retval = devm_tng_gpio_probe(dev, priv);
	122	if (retval)
	123	return dev_err_probe(dev, retval, "tng_gpio_probe error\n");
ccf6fd6d	124
cd242b33	125	pci_set_drvdata(pdev, priv);
ccf6fd6d AS	126	return 0;
	127	}
	128
	129	static const struct pci_device_id mrfld_gpio_ids[] = {
	130	{ PCI_VDEVICE(INTEL, 0x1199) },
	131	{ }
	132	};
	133	MODULE_DEVICE_TABLE(pci, mrfld_gpio_ids);
	134
	135	static struct pci_driver mrfld_gpio_driver = {
	136	.name = "gpio-merrifield",
	137	.id_table = mrfld_gpio_ids,
	138	.probe = mrfld_gpio_probe,
	139	};
ccf6fd6d AS	140	module_pci_driver(mrfld_gpio_driver);
	141
	142	MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
	143	MODULE_DESCRIPTION("Intel Merrifield SoC GPIO driver");
	144	MODULE_LICENSE("GPL v2");
34840be5	145	MODULE_IMPORT_NS(GPIO_TANGIER);