Commit | Line | Data |
---|---|---|
e58b9e27 | 1 | /* |
c103de24 | 2 | * MCP23S08 SPI gpio expander driver |
e58b9e27 DB |
3 | */ |
4 | ||
5 | #include <linux/kernel.h> | |
6 | #include <linux/device.h> | |
e58b9e27 | 7 | #include <linux/mutex.h> |
d120c17f | 8 | #include <linux/gpio.h> |
e58b9e27 DB |
9 | #include <linux/spi/spi.h> |
10 | #include <linux/spi/mcp23s08.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0b7bb77f | 12 | #include <asm/byteorder.h> |
e58b9e27 | 13 | |
0b7bb77f PK |
14 | /** |
15 | * MCP types supported by driver | |
16 | */ | |
17 | #define MCP_TYPE_S08 0 | |
18 | #define MCP_TYPE_S17 1 | |
e58b9e27 DB |
19 | |
20 | /* Registers are all 8 bits wide. | |
21 | * | |
22 | * The mcp23s17 has twice as many bits, and can be configured to work | |
23 | * with either 16 bit registers or with two adjacent 8 bit banks. | |
24 | * | |
25 | * Also, there are I2C versions of both chips. | |
26 | */ | |
27 | #define MCP_IODIR 0x00 /* init/reset: all ones */ | |
28 | #define MCP_IPOL 0x01 | |
29 | #define MCP_GPINTEN 0x02 | |
30 | #define MCP_DEFVAL 0x03 | |
31 | #define MCP_INTCON 0x04 | |
32 | #define MCP_IOCON 0x05 | |
33 | # define IOCON_SEQOP (1 << 5) | |
34 | # define IOCON_HAEN (1 << 3) | |
35 | # define IOCON_ODR (1 << 2) | |
36 | # define IOCON_INTPOL (1 << 1) | |
37 | #define MCP_GPPU 0x06 | |
38 | #define MCP_INTF 0x07 | |
39 | #define MCP_INTCAP 0x08 | |
40 | #define MCP_GPIO 0x09 | |
41 | #define MCP_OLAT 0x0a | |
42 | ||
0b7bb77f PK |
43 | struct mcp23s08; |
44 | ||
45 | struct mcp23s08_ops { | |
46 | int (*read)(struct mcp23s08 *mcp, unsigned reg); | |
47 | int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val); | |
48 | int (*read_regs)(struct mcp23s08 *mcp, unsigned reg, | |
49 | u16 *vals, unsigned n); | |
50 | }; | |
51 | ||
e58b9e27 | 52 | struct mcp23s08 { |
e58b9e27 DB |
53 | u8 addr; |
54 | ||
0b7bb77f | 55 | u16 cache[11]; |
e58b9e27 DB |
56 | /* lock protects the cached values */ |
57 | struct mutex lock; | |
e58b9e27 DB |
58 | |
59 | struct gpio_chip chip; | |
60 | ||
0b7bb77f | 61 | const struct mcp23s08_ops *ops; |
d62b98f3 | 62 | void *data; /* ops specific data */ |
e58b9e27 DB |
63 | }; |
64 | ||
0b7bb77f | 65 | /* A given spi_device can represent up to eight mcp23sxx chips |
8f1cc3b1 DB |
66 | * sharing the same chipselect but using different addresses |
67 | * (e.g. chips #0 and #3 might be populated, but not #1 or $2). | |
68 | * Driver data holds all the per-chip data. | |
69 | */ | |
70 | struct mcp23s08_driver_data { | |
71 | unsigned ngpio; | |
0b7bb77f | 72 | struct mcp23s08 *mcp[8]; |
8f1cc3b1 DB |
73 | struct mcp23s08 chip[]; |
74 | }; | |
75 | ||
d62b98f3 PK |
76 | #ifdef CONFIG_SPI_MASTER |
77 | ||
e58b9e27 DB |
78 | static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg) |
79 | { | |
80 | u8 tx[2], rx[1]; | |
81 | int status; | |
82 | ||
83 | tx[0] = mcp->addr | 0x01; | |
84 | tx[1] = reg; | |
d62b98f3 | 85 | status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx); |
e58b9e27 DB |
86 | return (status < 0) ? status : rx[0]; |
87 | } | |
88 | ||
0b7bb77f | 89 | static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
e58b9e27 DB |
90 | { |
91 | u8 tx[3]; | |
92 | ||
93 | tx[0] = mcp->addr; | |
94 | tx[1] = reg; | |
95 | tx[2] = val; | |
d62b98f3 | 96 | return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0); |
e58b9e27 DB |
97 | } |
98 | ||
99 | static int | |
0b7bb77f | 100 | mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
e58b9e27 | 101 | { |
0b7bb77f PK |
102 | u8 tx[2], *tmp; |
103 | int status; | |
e58b9e27 DB |
104 | |
105 | if ((n + reg) > sizeof mcp->cache) | |
106 | return -EINVAL; | |
107 | tx[0] = mcp->addr | 0x01; | |
108 | tx[1] = reg; | |
0b7bb77f PK |
109 | |
110 | tmp = (u8 *)vals; | |
d62b98f3 | 111 | status = spi_write_then_read(mcp->data, tx, sizeof tx, tmp, n); |
0b7bb77f PK |
112 | if (status >= 0) { |
113 | while (n--) | |
114 | vals[n] = tmp[n]; /* expand to 16bit */ | |
115 | } | |
116 | return status; | |
117 | } | |
118 | ||
119 | static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg) | |
120 | { | |
121 | u8 tx[2], rx[2]; | |
122 | int status; | |
123 | ||
124 | tx[0] = mcp->addr | 0x01; | |
125 | tx[1] = reg << 1; | |
d62b98f3 | 126 | status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx); |
0b7bb77f PK |
127 | return (status < 0) ? status : (rx[0] | (rx[1] << 8)); |
128 | } | |
129 | ||
130 | static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) | |
131 | { | |
132 | u8 tx[4]; | |
133 | ||
134 | tx[0] = mcp->addr; | |
135 | tx[1] = reg << 1; | |
136 | tx[2] = val; | |
137 | tx[3] = val >> 8; | |
d62b98f3 | 138 | return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0); |
0b7bb77f PK |
139 | } |
140 | ||
141 | static int | |
142 | mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) | |
143 | { | |
144 | u8 tx[2]; | |
145 | int status; | |
146 | ||
147 | if ((n + reg) > sizeof mcp->cache) | |
148 | return -EINVAL; | |
149 | tx[0] = mcp->addr | 0x01; | |
150 | tx[1] = reg << 1; | |
151 | ||
d62b98f3 | 152 | status = spi_write_then_read(mcp->data, tx, sizeof tx, |
0b7bb77f PK |
153 | (u8 *)vals, n * 2); |
154 | if (status >= 0) { | |
155 | while (n--) | |
156 | vals[n] = __le16_to_cpu((__le16)vals[n]); | |
157 | } | |
158 | ||
159 | return status; | |
e58b9e27 DB |
160 | } |
161 | ||
0b7bb77f PK |
162 | static const struct mcp23s08_ops mcp23s08_ops = { |
163 | .read = mcp23s08_read, | |
164 | .write = mcp23s08_write, | |
165 | .read_regs = mcp23s08_read_regs, | |
166 | }; | |
167 | ||
168 | static const struct mcp23s08_ops mcp23s17_ops = { | |
169 | .read = mcp23s17_read, | |
170 | .write = mcp23s17_write, | |
171 | .read_regs = mcp23s17_read_regs, | |
172 | }; | |
173 | ||
d62b98f3 | 174 | #endif /* CONFIG_SPI_MASTER */ |
0b7bb77f | 175 | |
e58b9e27 DB |
176 | /*----------------------------------------------------------------------*/ |
177 | ||
178 | static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) | |
179 | { | |
180 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
181 | int status; | |
182 | ||
183 | mutex_lock(&mcp->lock); | |
184 | mcp->cache[MCP_IODIR] |= (1 << offset); | |
0b7bb77f | 185 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
e58b9e27 DB |
186 | mutex_unlock(&mcp->lock); |
187 | return status; | |
188 | } | |
189 | ||
190 | static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) | |
191 | { | |
192 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
193 | int status; | |
194 | ||
195 | mutex_lock(&mcp->lock); | |
196 | ||
197 | /* REVISIT reading this clears any IRQ ... */ | |
0b7bb77f | 198 | status = mcp->ops->read(mcp, MCP_GPIO); |
e58b9e27 DB |
199 | if (status < 0) |
200 | status = 0; | |
201 | else { | |
202 | mcp->cache[MCP_GPIO] = status; | |
203 | status = !!(status & (1 << offset)); | |
204 | } | |
205 | mutex_unlock(&mcp->lock); | |
206 | return status; | |
207 | } | |
208 | ||
209 | static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value) | |
210 | { | |
0b7bb77f | 211 | unsigned olat = mcp->cache[MCP_OLAT]; |
e58b9e27 DB |
212 | |
213 | if (value) | |
214 | olat |= mask; | |
215 | else | |
216 | olat &= ~mask; | |
217 | mcp->cache[MCP_OLAT] = olat; | |
0b7bb77f | 218 | return mcp->ops->write(mcp, MCP_OLAT, olat); |
e58b9e27 DB |
219 | } |
220 | ||
221 | static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) | |
222 | { | |
223 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
0b7bb77f | 224 | unsigned mask = 1 << offset; |
e58b9e27 DB |
225 | |
226 | mutex_lock(&mcp->lock); | |
227 | __mcp23s08_set(mcp, mask, value); | |
228 | mutex_unlock(&mcp->lock); | |
229 | } | |
230 | ||
231 | static int | |
232 | mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) | |
233 | { | |
234 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | |
0b7bb77f | 235 | unsigned mask = 1 << offset; |
e58b9e27 DB |
236 | int status; |
237 | ||
238 | mutex_lock(&mcp->lock); | |
239 | status = __mcp23s08_set(mcp, mask, value); | |
240 | if (status == 0) { | |
241 | mcp->cache[MCP_IODIR] &= ~mask; | |
0b7bb77f | 242 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
e58b9e27 DB |
243 | } |
244 | mutex_unlock(&mcp->lock); | |
245 | return status; | |
246 | } | |
247 | ||
248 | /*----------------------------------------------------------------------*/ | |
249 | ||
250 | #ifdef CONFIG_DEBUG_FS | |
251 | ||
252 | #include <linux/seq_file.h> | |
253 | ||
254 | /* | |
255 | * This shows more info than the generic gpio dump code: | |
256 | * pullups, deglitching, open drain drive. | |
257 | */ | |
258 | static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip) | |
259 | { | |
260 | struct mcp23s08 *mcp; | |
261 | char bank; | |
1d1c1d9b | 262 | int t; |
e58b9e27 DB |
263 | unsigned mask; |
264 | ||
265 | mcp = container_of(chip, struct mcp23s08, chip); | |
266 | ||
267 | /* NOTE: we only handle one bank for now ... */ | |
0b7bb77f | 268 | bank = '0' + ((mcp->addr >> 1) & 0x7); |
e58b9e27 DB |
269 | |
270 | mutex_lock(&mcp->lock); | |
0b7bb77f | 271 | t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
e58b9e27 DB |
272 | if (t < 0) { |
273 | seq_printf(s, " I/O ERROR %d\n", t); | |
274 | goto done; | |
275 | } | |
276 | ||
0b7bb77f | 277 | for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) { |
e58b9e27 DB |
278 | const char *label; |
279 | ||
280 | label = gpiochip_is_requested(chip, t); | |
281 | if (!label) | |
282 | continue; | |
283 | ||
284 | seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s", | |
285 | chip->base + t, bank, t, label, | |
286 | (mcp->cache[MCP_IODIR] & mask) ? "in " : "out", | |
287 | (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo", | |
288 | (mcp->cache[MCP_GPPU] & mask) ? " " : "up"); | |
289 | /* NOTE: ignoring the irq-related registers */ | |
290 | seq_printf(s, "\n"); | |
291 | } | |
292 | done: | |
293 | mutex_unlock(&mcp->lock); | |
294 | } | |
295 | ||
296 | #else | |
297 | #define mcp23s08_dbg_show NULL | |
298 | #endif | |
299 | ||
300 | /*----------------------------------------------------------------------*/ | |
301 | ||
d62b98f3 PK |
302 | static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
303 | void *data, unsigned addr, | |
0b7bb77f | 304 | unsigned type, unsigned base, unsigned pullups) |
e58b9e27 | 305 | { |
d62b98f3 | 306 | int status; |
e58b9e27 | 307 | |
e58b9e27 DB |
308 | mutex_init(&mcp->lock); |
309 | ||
d62b98f3 PK |
310 | mcp->data = data; |
311 | mcp->addr = addr; | |
e58b9e27 | 312 | |
e58b9e27 DB |
313 | mcp->chip.direction_input = mcp23s08_direction_input; |
314 | mcp->chip.get = mcp23s08_get; | |
315 | mcp->chip.direction_output = mcp23s08_direction_output; | |
316 | mcp->chip.set = mcp23s08_set; | |
317 | mcp->chip.dbg_show = mcp23s08_dbg_show; | |
318 | ||
d62b98f3 PK |
319 | switch (type) { |
320 | #ifdef CONFIG_SPI_MASTER | |
321 | case MCP_TYPE_S08: | |
0b7bb77f PK |
322 | mcp->ops = &mcp23s08_ops; |
323 | mcp->chip.ngpio = 8; | |
324 | mcp->chip.label = "mcp23s08"; | |
d62b98f3 PK |
325 | break; |
326 | ||
327 | case MCP_TYPE_S17: | |
328 | mcp->ops = &mcp23s17_ops; | |
329 | mcp->chip.ngpio = 16; | |
330 | mcp->chip.label = "mcp23s17"; | |
331 | break; | |
332 | #endif /* CONFIG_SPI_MASTER */ | |
333 | ||
334 | default: | |
335 | dev_err(dev, "invalid device type (%d)\n", type); | |
336 | return -EINVAL; | |
0b7bb77f | 337 | } |
d62b98f3 | 338 | |
8f1cc3b1 | 339 | mcp->chip.base = base; |
e58b9e27 | 340 | mcp->chip.can_sleep = 1; |
d62b98f3 | 341 | mcp->chip.dev = dev; |
d72cbed0 | 342 | mcp->chip.owner = THIS_MODULE; |
e58b9e27 | 343 | |
8f1cc3b1 DB |
344 | /* verify MCP_IOCON.SEQOP = 0, so sequential reads work, |
345 | * and MCP_IOCON.HAEN = 1, so we work with all chips. | |
346 | */ | |
0b7bb77f | 347 | status = mcp->ops->read(mcp, MCP_IOCON); |
e58b9e27 DB |
348 | if (status < 0) |
349 | goto fail; | |
8f1cc3b1 | 350 | if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN)) { |
0b7bb77f PK |
351 | /* mcp23s17 has IOCON twice, make sure they are in sync */ |
352 | status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8)); | |
353 | status |= IOCON_HAEN | (IOCON_HAEN << 8); | |
354 | status = mcp->ops->write(mcp, MCP_IOCON, status); | |
e58b9e27 DB |
355 | if (status < 0) |
356 | goto fail; | |
357 | } | |
358 | ||
359 | /* configure ~100K pullups */ | |
0b7bb77f | 360 | status = mcp->ops->write(mcp, MCP_GPPU, pullups); |
e58b9e27 DB |
361 | if (status < 0) |
362 | goto fail; | |
363 | ||
0b7bb77f | 364 | status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
e58b9e27 DB |
365 | if (status < 0) |
366 | goto fail; | |
367 | ||
368 | /* disable inverter on input */ | |
369 | if (mcp->cache[MCP_IPOL] != 0) { | |
370 | mcp->cache[MCP_IPOL] = 0; | |
0b7bb77f PK |
371 | status = mcp->ops->write(mcp, MCP_IPOL, 0); |
372 | if (status < 0) | |
373 | goto fail; | |
e58b9e27 DB |
374 | } |
375 | ||
376 | /* disable irqs */ | |
377 | if (mcp->cache[MCP_GPINTEN] != 0) { | |
378 | mcp->cache[MCP_GPINTEN] = 0; | |
0b7bb77f | 379 | status = mcp->ops->write(mcp, MCP_GPINTEN, 0); |
8f1cc3b1 DB |
380 | if (status < 0) |
381 | goto fail; | |
e58b9e27 DB |
382 | } |
383 | ||
384 | status = gpiochip_add(&mcp->chip); | |
8f1cc3b1 DB |
385 | fail: |
386 | if (status < 0) | |
d62b98f3 PK |
387 | dev_dbg(dev, "can't setup chip %d, --> %d\n", |
388 | addr, status); | |
8f1cc3b1 DB |
389 | return status; |
390 | } | |
391 | ||
d62b98f3 PK |
392 | #ifdef CONFIG_SPI_MASTER |
393 | ||
8f1cc3b1 DB |
394 | static int mcp23s08_probe(struct spi_device *spi) |
395 | { | |
396 | struct mcp23s08_platform_data *pdata; | |
397 | unsigned addr; | |
398 | unsigned chips = 0; | |
399 | struct mcp23s08_driver_data *data; | |
0b7bb77f | 400 | int status, type; |
8f1cc3b1 DB |
401 | unsigned base; |
402 | ||
0b7bb77f PK |
403 | type = spi_get_device_id(spi)->driver_data; |
404 | ||
8f1cc3b1 | 405 | pdata = spi->dev.platform_data; |
a342d215 BD |
406 | if (!pdata || !gpio_is_valid(pdata->base)) { |
407 | dev_dbg(&spi->dev, "invalid or missing platform data\n"); | |
408 | return -EINVAL; | |
409 | } | |
8f1cc3b1 | 410 | |
0b7bb77f | 411 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
8f1cc3b1 DB |
412 | if (!pdata->chip[addr].is_present) |
413 | continue; | |
414 | chips++; | |
0b7bb77f PK |
415 | if ((type == MCP_TYPE_S08) && (addr > 3)) { |
416 | dev_err(&spi->dev, | |
417 | "mcp23s08 only supports address 0..3\n"); | |
418 | return -EINVAL; | |
419 | } | |
8f1cc3b1 DB |
420 | } |
421 | if (!chips) | |
422 | return -ENODEV; | |
423 | ||
424 | data = kzalloc(sizeof *data + chips * sizeof(struct mcp23s08), | |
425 | GFP_KERNEL); | |
426 | if (!data) | |
427 | return -ENOMEM; | |
428 | spi_set_drvdata(spi, data); | |
429 | ||
430 | base = pdata->base; | |
0b7bb77f | 431 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
8f1cc3b1 DB |
432 | if (!pdata->chip[addr].is_present) |
433 | continue; | |
434 | chips--; | |
435 | data->mcp[addr] = &data->chip[chips]; | |
d62b98f3 PK |
436 | status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi, |
437 | 0x40 | (addr << 1), type, base, | |
0b7bb77f | 438 | pdata->chip[addr].pullups); |
8f1cc3b1 DB |
439 | if (status < 0) |
440 | goto fail; | |
0b7bb77f PK |
441 | |
442 | base += (type == MCP_TYPE_S17) ? 16 : 8; | |
8f1cc3b1 DB |
443 | } |
444 | data->ngpio = base - pdata->base; | |
e58b9e27 DB |
445 | |
446 | /* NOTE: these chips have a relatively sane IRQ framework, with | |
447 | * per-signal masking and level/edge triggering. It's not yet | |
448 | * handled here... | |
449 | */ | |
450 | ||
e58b9e27 DB |
451 | return 0; |
452 | ||
453 | fail: | |
0b7bb77f | 454 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
8f1cc3b1 DB |
455 | int tmp; |
456 | ||
457 | if (!data->mcp[addr]) | |
458 | continue; | |
459 | tmp = gpiochip_remove(&data->mcp[addr]->chip); | |
460 | if (tmp < 0) | |
461 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); | |
462 | } | |
463 | kfree(data); | |
e58b9e27 DB |
464 | return status; |
465 | } | |
466 | ||
467 | static int mcp23s08_remove(struct spi_device *spi) | |
468 | { | |
8f1cc3b1 | 469 | struct mcp23s08_driver_data *data = spi_get_drvdata(spi); |
8f1cc3b1 | 470 | unsigned addr; |
e58b9e27 DB |
471 | int status = 0; |
472 | ||
0b7bb77f | 473 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
8f1cc3b1 DB |
474 | int tmp; |
475 | ||
476 | if (!data->mcp[addr]) | |
477 | continue; | |
478 | ||
479 | tmp = gpiochip_remove(&data->mcp[addr]->chip); | |
480 | if (tmp < 0) { | |
481 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); | |
482 | status = tmp; | |
483 | } | |
484 | } | |
e58b9e27 | 485 | if (status == 0) |
8f1cc3b1 | 486 | kfree(data); |
e58b9e27 DB |
487 | return status; |
488 | } | |
489 | ||
0b7bb77f PK |
490 | static const struct spi_device_id mcp23s08_ids[] = { |
491 | { "mcp23s08", MCP_TYPE_S08 }, | |
492 | { "mcp23s17", MCP_TYPE_S17 }, | |
493 | { }, | |
494 | }; | |
495 | MODULE_DEVICE_TABLE(spi, mcp23s08_ids); | |
496 | ||
e58b9e27 DB |
497 | static struct spi_driver mcp23s08_driver = { |
498 | .probe = mcp23s08_probe, | |
499 | .remove = mcp23s08_remove, | |
0b7bb77f | 500 | .id_table = mcp23s08_ids, |
e58b9e27 DB |
501 | .driver = { |
502 | .name = "mcp23s08", | |
503 | .owner = THIS_MODULE, | |
504 | }, | |
505 | }; | |
506 | ||
d62b98f3 PK |
507 | static int __init mcp23s08_spi_init(void) |
508 | { | |
509 | return spi_register_driver(&mcp23s08_driver); | |
510 | } | |
511 | ||
512 | static void mcp23s08_spi_exit(void) | |
513 | { | |
514 | spi_unregister_driver(&mcp23s08_driver); | |
515 | } | |
516 | ||
517 | #else | |
518 | ||
519 | static int __init mcp23s08_spi_init(void) { return 0; } | |
520 | static void mcp23s08_spi_exit(void) { } | |
521 | ||
522 | #endif /* CONFIG_SPI_MASTER */ | |
523 | ||
e58b9e27 DB |
524 | /*----------------------------------------------------------------------*/ |
525 | ||
526 | static int __init mcp23s08_init(void) | |
527 | { | |
d62b98f3 | 528 | return mcp23s08_spi_init(); |
e58b9e27 | 529 | } |
673c0c00 DB |
530 | /* register after spi postcore initcall and before |
531 | * subsys initcalls that may rely on these GPIOs | |
532 | */ | |
533 | subsys_initcall(mcp23s08_init); | |
e58b9e27 DB |
534 | |
535 | static void __exit mcp23s08_exit(void) | |
536 | { | |
d62b98f3 | 537 | mcp23s08_spi_exit(); |
e58b9e27 DB |
538 | } |
539 | module_exit(mcp23s08_exit); | |
540 | ||
541 | MODULE_LICENSE("GPL"); |