gpio/mxc: add chained_irq_enter/exit() to mx2_gpio_irq_handler
[linux-2.6-block.git] / drivers / gpio / gpio-mcp23s08.c
CommitLineData
e58b9e27 1/*
752ad5e8 2 * MCP23S08 SPI/GPIO gpio expander driver
e58b9e27
DB
3 */
4
5#include <linux/kernel.h>
6#include <linux/device.h>
e58b9e27 7#include <linux/mutex.h>
bb207ef1 8#include <linux/module.h>
d120c17f 9#include <linux/gpio.h>
752ad5e8 10#include <linux/i2c.h>
e58b9e27
DB
11#include <linux/spi/spi.h>
12#include <linux/spi/mcp23s08.h>
5a0e3ad6 13#include <linux/slab.h>
0b7bb77f 14#include <asm/byteorder.h>
97ddb1c8
LP
15#include <linux/of.h>
16#include <linux/of_device.h>
e58b9e27 17
0b7bb77f
PK
18/**
19 * MCP types supported by driver
20 */
21#define MCP_TYPE_S08 0
22#define MCP_TYPE_S17 1
752ad5e8
PK
23#define MCP_TYPE_008 2
24#define MCP_TYPE_017 3
e58b9e27
DB
25
26/* Registers are all 8 bits wide.
27 *
28 * The mcp23s17 has twice as many bits, and can be configured to work
29 * with either 16 bit registers or with two adjacent 8 bit banks.
e58b9e27
DB
30 */
31#define MCP_IODIR 0x00 /* init/reset: all ones */
32#define MCP_IPOL 0x01
33#define MCP_GPINTEN 0x02
34#define MCP_DEFVAL 0x03
35#define MCP_INTCON 0x04
36#define MCP_IOCON 0x05
37# define IOCON_SEQOP (1 << 5)
38# define IOCON_HAEN (1 << 3)
39# define IOCON_ODR (1 << 2)
40# define IOCON_INTPOL (1 << 1)
41#define MCP_GPPU 0x06
42#define MCP_INTF 0x07
43#define MCP_INTCAP 0x08
44#define MCP_GPIO 0x09
45#define MCP_OLAT 0x0a
46
0b7bb77f
PK
47struct mcp23s08;
48
49struct mcp23s08_ops {
50 int (*read)(struct mcp23s08 *mcp, unsigned reg);
51 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
52 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
53 u16 *vals, unsigned n);
54};
55
e58b9e27 56struct mcp23s08 {
e58b9e27
DB
57 u8 addr;
58
0b7bb77f 59 u16 cache[11];
e58b9e27
DB
60 /* lock protects the cached values */
61 struct mutex lock;
e58b9e27
DB
62
63 struct gpio_chip chip;
64
0b7bb77f 65 const struct mcp23s08_ops *ops;
d62b98f3 66 void *data; /* ops specific data */
e58b9e27
DB
67};
68
0b7bb77f 69/* A given spi_device can represent up to eight mcp23sxx chips
8f1cc3b1
DB
70 * sharing the same chipselect but using different addresses
71 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
72 * Driver data holds all the per-chip data.
73 */
74struct mcp23s08_driver_data {
75 unsigned ngpio;
0b7bb77f 76 struct mcp23s08 *mcp[8];
8f1cc3b1
DB
77 struct mcp23s08 chip[];
78};
79
752ad5e8
PK
80/*----------------------------------------------------------------------*/
81
cbf24fad 82#if IS_ENABLED(CONFIG_I2C)
752ad5e8
PK
83
84static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
85{
86 return i2c_smbus_read_byte_data(mcp->data, reg);
87}
88
89static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
90{
91 return i2c_smbus_write_byte_data(mcp->data, reg, val);
92}
93
94static int
95mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
96{
97 while (n--) {
98 int ret = mcp23008_read(mcp, reg++);
99 if (ret < 0)
100 return ret;
101 *vals++ = ret;
102 }
103
104 return 0;
105}
106
107static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
108{
109 return i2c_smbus_read_word_data(mcp->data, reg << 1);
110}
111
112static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
113{
114 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
115}
116
117static int
118mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
119{
120 while (n--) {
121 int ret = mcp23017_read(mcp, reg++);
122 if (ret < 0)
123 return ret;
124 *vals++ = ret;
125 }
126
127 return 0;
128}
129
130static const struct mcp23s08_ops mcp23008_ops = {
131 .read = mcp23008_read,
132 .write = mcp23008_write,
133 .read_regs = mcp23008_read_regs,
134};
135
136static const struct mcp23s08_ops mcp23017_ops = {
137 .read = mcp23017_read,
138 .write = mcp23017_write,
139 .read_regs = mcp23017_read_regs,
140};
141
142#endif /* CONFIG_I2C */
143
144/*----------------------------------------------------------------------*/
145
d62b98f3
PK
146#ifdef CONFIG_SPI_MASTER
147
e58b9e27
DB
148static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
149{
150 u8 tx[2], rx[1];
151 int status;
152
153 tx[0] = mcp->addr | 0x01;
154 tx[1] = reg;
d62b98f3 155 status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx);
e58b9e27
DB
156 return (status < 0) ? status : rx[0];
157}
158
0b7bb77f 159static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
e58b9e27
DB
160{
161 u8 tx[3];
162
163 tx[0] = mcp->addr;
164 tx[1] = reg;
165 tx[2] = val;
d62b98f3 166 return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0);
e58b9e27
DB
167}
168
169static int
0b7bb77f 170mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
e58b9e27 171{
0b7bb77f
PK
172 u8 tx[2], *tmp;
173 int status;
e58b9e27
DB
174
175 if ((n + reg) > sizeof mcp->cache)
176 return -EINVAL;
177 tx[0] = mcp->addr | 0x01;
178 tx[1] = reg;
0b7bb77f
PK
179
180 tmp = (u8 *)vals;
d62b98f3 181 status = spi_write_then_read(mcp->data, tx, sizeof tx, tmp, n);
0b7bb77f
PK
182 if (status >= 0) {
183 while (n--)
184 vals[n] = tmp[n]; /* expand to 16bit */
185 }
186 return status;
187}
188
189static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
190{
191 u8 tx[2], rx[2];
192 int status;
193
194 tx[0] = mcp->addr | 0x01;
195 tx[1] = reg << 1;
d62b98f3 196 status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx);
0b7bb77f
PK
197 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
198}
199
200static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
201{
202 u8 tx[4];
203
204 tx[0] = mcp->addr;
205 tx[1] = reg << 1;
206 tx[2] = val;
207 tx[3] = val >> 8;
d62b98f3 208 return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0);
0b7bb77f
PK
209}
210
211static int
212mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
213{
214 u8 tx[2];
215 int status;
216
217 if ((n + reg) > sizeof mcp->cache)
218 return -EINVAL;
219 tx[0] = mcp->addr | 0x01;
220 tx[1] = reg << 1;
221
d62b98f3 222 status = spi_write_then_read(mcp->data, tx, sizeof tx,
0b7bb77f
PK
223 (u8 *)vals, n * 2);
224 if (status >= 0) {
225 while (n--)
226 vals[n] = __le16_to_cpu((__le16)vals[n]);
227 }
228
229 return status;
e58b9e27
DB
230}
231
0b7bb77f
PK
232static const struct mcp23s08_ops mcp23s08_ops = {
233 .read = mcp23s08_read,
234 .write = mcp23s08_write,
235 .read_regs = mcp23s08_read_regs,
236};
237
238static const struct mcp23s08_ops mcp23s17_ops = {
239 .read = mcp23s17_read,
240 .write = mcp23s17_write,
241 .read_regs = mcp23s17_read_regs,
242};
243
d62b98f3 244#endif /* CONFIG_SPI_MASTER */
0b7bb77f 245
e58b9e27
DB
246/*----------------------------------------------------------------------*/
247
248static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
249{
250 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
251 int status;
252
253 mutex_lock(&mcp->lock);
254 mcp->cache[MCP_IODIR] |= (1 << offset);
0b7bb77f 255 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
e58b9e27
DB
256 mutex_unlock(&mcp->lock);
257 return status;
258}
259
260static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
261{
262 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
263 int status;
264
265 mutex_lock(&mcp->lock);
266
267 /* REVISIT reading this clears any IRQ ... */
0b7bb77f 268 status = mcp->ops->read(mcp, MCP_GPIO);
e58b9e27
DB
269 if (status < 0)
270 status = 0;
271 else {
272 mcp->cache[MCP_GPIO] = status;
273 status = !!(status & (1 << offset));
274 }
275 mutex_unlock(&mcp->lock);
276 return status;
277}
278
279static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
280{
0b7bb77f 281 unsigned olat = mcp->cache[MCP_OLAT];
e58b9e27
DB
282
283 if (value)
284 olat |= mask;
285 else
286 olat &= ~mask;
287 mcp->cache[MCP_OLAT] = olat;
0b7bb77f 288 return mcp->ops->write(mcp, MCP_OLAT, olat);
e58b9e27
DB
289}
290
291static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
292{
293 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
0b7bb77f 294 unsigned mask = 1 << offset;
e58b9e27
DB
295
296 mutex_lock(&mcp->lock);
297 __mcp23s08_set(mcp, mask, value);
298 mutex_unlock(&mcp->lock);
299}
300
301static int
302mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
303{
304 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
0b7bb77f 305 unsigned mask = 1 << offset;
e58b9e27
DB
306 int status;
307
308 mutex_lock(&mcp->lock);
309 status = __mcp23s08_set(mcp, mask, value);
310 if (status == 0) {
311 mcp->cache[MCP_IODIR] &= ~mask;
0b7bb77f 312 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
e58b9e27
DB
313 }
314 mutex_unlock(&mcp->lock);
315 return status;
316}
317
318/*----------------------------------------------------------------------*/
319
320#ifdef CONFIG_DEBUG_FS
321
322#include <linux/seq_file.h>
323
324/*
325 * This shows more info than the generic gpio dump code:
326 * pullups, deglitching, open drain drive.
327 */
328static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
329{
330 struct mcp23s08 *mcp;
331 char bank;
1d1c1d9b 332 int t;
e58b9e27
DB
333 unsigned mask;
334
335 mcp = container_of(chip, struct mcp23s08, chip);
336
337 /* NOTE: we only handle one bank for now ... */
0b7bb77f 338 bank = '0' + ((mcp->addr >> 1) & 0x7);
e58b9e27
DB
339
340 mutex_lock(&mcp->lock);
0b7bb77f 341 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
e58b9e27
DB
342 if (t < 0) {
343 seq_printf(s, " I/O ERROR %d\n", t);
344 goto done;
345 }
346
0b7bb77f 347 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
e58b9e27
DB
348 const char *label;
349
350 label = gpiochip_is_requested(chip, t);
351 if (!label)
352 continue;
353
354 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
355 chip->base + t, bank, t, label,
356 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
357 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
eb1567f7 358 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
e58b9e27
DB
359 /* NOTE: ignoring the irq-related registers */
360 seq_printf(s, "\n");
361 }
362done:
363 mutex_unlock(&mcp->lock);
364}
365
366#else
367#define mcp23s08_dbg_show NULL
368#endif
369
370/*----------------------------------------------------------------------*/
371
d62b98f3
PK
372static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
373 void *data, unsigned addr,
0b7bb77f 374 unsigned type, unsigned base, unsigned pullups)
e58b9e27 375{
d62b98f3 376 int status;
e58b9e27 377
e58b9e27
DB
378 mutex_init(&mcp->lock);
379
d62b98f3
PK
380 mcp->data = data;
381 mcp->addr = addr;
e58b9e27 382
e58b9e27
DB
383 mcp->chip.direction_input = mcp23s08_direction_input;
384 mcp->chip.get = mcp23s08_get;
385 mcp->chip.direction_output = mcp23s08_direction_output;
386 mcp->chip.set = mcp23s08_set;
387 mcp->chip.dbg_show = mcp23s08_dbg_show;
97ddb1c8
LP
388#ifdef CONFIG_OF
389 mcp->chip.of_gpio_n_cells = 2;
390 mcp->chip.of_node = dev->of_node;
391#endif
e58b9e27 392
d62b98f3
PK
393 switch (type) {
394#ifdef CONFIG_SPI_MASTER
395 case MCP_TYPE_S08:
0b7bb77f
PK
396 mcp->ops = &mcp23s08_ops;
397 mcp->chip.ngpio = 8;
398 mcp->chip.label = "mcp23s08";
d62b98f3
PK
399 break;
400
401 case MCP_TYPE_S17:
402 mcp->ops = &mcp23s17_ops;
403 mcp->chip.ngpio = 16;
404 mcp->chip.label = "mcp23s17";
405 break;
406#endif /* CONFIG_SPI_MASTER */
407
cbf24fad 408#if IS_ENABLED(CONFIG_I2C)
752ad5e8
PK
409 case MCP_TYPE_008:
410 mcp->ops = &mcp23008_ops;
411 mcp->chip.ngpio = 8;
412 mcp->chip.label = "mcp23008";
413 break;
414
415 case MCP_TYPE_017:
416 mcp->ops = &mcp23017_ops;
417 mcp->chip.ngpio = 16;
418 mcp->chip.label = "mcp23017";
419 break;
420#endif /* CONFIG_I2C */
421
d62b98f3
PK
422 default:
423 dev_err(dev, "invalid device type (%d)\n", type);
424 return -EINVAL;
0b7bb77f 425 }
d62b98f3 426
8f1cc3b1 427 mcp->chip.base = base;
e58b9e27 428 mcp->chip.can_sleep = 1;
d62b98f3 429 mcp->chip.dev = dev;
d72cbed0 430 mcp->chip.owner = THIS_MODULE;
e58b9e27 431
8f1cc3b1
DB
432 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
433 * and MCP_IOCON.HAEN = 1, so we work with all chips.
434 */
0b7bb77f 435 status = mcp->ops->read(mcp, MCP_IOCON);
e58b9e27
DB
436 if (status < 0)
437 goto fail;
8f1cc3b1 438 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN)) {
0b7bb77f
PK
439 /* mcp23s17 has IOCON twice, make sure they are in sync */
440 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
441 status |= IOCON_HAEN | (IOCON_HAEN << 8);
442 status = mcp->ops->write(mcp, MCP_IOCON, status);
e58b9e27
DB
443 if (status < 0)
444 goto fail;
445 }
446
447 /* configure ~100K pullups */
0b7bb77f 448 status = mcp->ops->write(mcp, MCP_GPPU, pullups);
e58b9e27
DB
449 if (status < 0)
450 goto fail;
451
0b7bb77f 452 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
e58b9e27
DB
453 if (status < 0)
454 goto fail;
455
456 /* disable inverter on input */
457 if (mcp->cache[MCP_IPOL] != 0) {
458 mcp->cache[MCP_IPOL] = 0;
0b7bb77f
PK
459 status = mcp->ops->write(mcp, MCP_IPOL, 0);
460 if (status < 0)
461 goto fail;
e58b9e27
DB
462 }
463
464 /* disable irqs */
465 if (mcp->cache[MCP_GPINTEN] != 0) {
466 mcp->cache[MCP_GPINTEN] = 0;
0b7bb77f 467 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
8f1cc3b1
DB
468 if (status < 0)
469 goto fail;
e58b9e27
DB
470 }
471
472 status = gpiochip_add(&mcp->chip);
8f1cc3b1
DB
473fail:
474 if (status < 0)
d62b98f3
PK
475 dev_dbg(dev, "can't setup chip %d, --> %d\n",
476 addr, status);
8f1cc3b1
DB
477 return status;
478}
479
752ad5e8
PK
480/*----------------------------------------------------------------------*/
481
97ddb1c8
LP
482#ifdef CONFIG_OF
483#ifdef CONFIG_SPI_MASTER
484static struct of_device_id mcp23s08_spi_of_match[] = {
485 {
486 .compatible = "mcp,mcp23s08", .data = (void *) MCP_TYPE_S08,
487 },
488 {
489 .compatible = "mcp,mcp23s17", .data = (void *) MCP_TYPE_S17,
490 },
491 { },
492};
493MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
494#endif
495
496#if IS_ENABLED(CONFIG_I2C)
497static struct of_device_id mcp23s08_i2c_of_match[] = {
498 {
499 .compatible = "mcp,mcp23008", .data = (void *) MCP_TYPE_008,
500 },
501 {
502 .compatible = "mcp,mcp23017", .data = (void *) MCP_TYPE_017,
503 },
504 { },
505};
506MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
507#endif
508#endif /* CONFIG_OF */
509
510
cbf24fad 511#if IS_ENABLED(CONFIG_I2C)
752ad5e8 512
3836309d 513static int mcp230xx_probe(struct i2c_client *client,
752ad5e8
PK
514 const struct i2c_device_id *id)
515{
516 struct mcp23s08_platform_data *pdata;
517 struct mcp23s08 *mcp;
97ddb1c8
LP
518 int status, base, pullups;
519 const struct of_device_id *match;
520
521 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
522 &client->dev);
8a564065
DW
523 pdata = client->dev.platform_data;
524 if (match || !pdata) {
97ddb1c8
LP
525 base = -1;
526 pullups = 0;
527 } else {
8a564065
DW
528 if (!gpio_is_valid(pdata->base)) {
529 dev_dbg(&client->dev, "invalid platform data\n");
97ddb1c8
LP
530 return -EINVAL;
531 }
532 base = pdata->base;
533 pullups = pdata->chip[0].pullups;
752ad5e8
PK
534 }
535
536 mcp = kzalloc(sizeof *mcp, GFP_KERNEL);
537 if (!mcp)
538 return -ENOMEM;
539
540 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
97ddb1c8 541 id->driver_data, base, pullups);
752ad5e8
PK
542 if (status)
543 goto fail;
544
545 i2c_set_clientdata(client, mcp);
546
547 return 0;
548
549fail:
550 kfree(mcp);
551
552 return status;
553}
554
206210ce 555static int mcp230xx_remove(struct i2c_client *client)
752ad5e8
PK
556{
557 struct mcp23s08 *mcp = i2c_get_clientdata(client);
558 int status;
559
560 status = gpiochip_remove(&mcp->chip);
561 if (status == 0)
562 kfree(mcp);
563
564 return status;
565}
566
567static const struct i2c_device_id mcp230xx_id[] = {
568 { "mcp23008", MCP_TYPE_008 },
569 { "mcp23017", MCP_TYPE_017 },
570 { },
571};
572MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
573
574static struct i2c_driver mcp230xx_driver = {
575 .driver = {
576 .name = "mcp230xx",
577 .owner = THIS_MODULE,
97ddb1c8 578 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
752ad5e8
PK
579 },
580 .probe = mcp230xx_probe,
8283c4ff 581 .remove = mcp230xx_remove,
752ad5e8
PK
582 .id_table = mcp230xx_id,
583};
584
585static int __init mcp23s08_i2c_init(void)
586{
587 return i2c_add_driver(&mcp230xx_driver);
588}
589
590static void mcp23s08_i2c_exit(void)
591{
592 i2c_del_driver(&mcp230xx_driver);
593}
594
595#else
596
597static int __init mcp23s08_i2c_init(void) { return 0; }
598static void mcp23s08_i2c_exit(void) { }
599
600#endif /* CONFIG_I2C */
601
602/*----------------------------------------------------------------------*/
603
d62b98f3
PK
604#ifdef CONFIG_SPI_MASTER
605
8f1cc3b1
DB
606static int mcp23s08_probe(struct spi_device *spi)
607{
608 struct mcp23s08_platform_data *pdata;
609 unsigned addr;
610 unsigned chips = 0;
611 struct mcp23s08_driver_data *data;
0b7bb77f 612 int status, type;
97ddb1c8
LP
613 unsigned base = -1,
614 ngpio = 0,
615 pullups[ARRAY_SIZE(pdata->chip)];
616 const struct of_device_id *match;
617 u32 spi_present_mask = 0;
618
619 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
620 if (match) {
621 type = (int)match->data;
622 status = of_property_read_u32(spi->dev.of_node,
623 "mcp,spi-present-mask", &spi_present_mask);
624 if (status) {
625 dev_err(&spi->dev, "DT has no spi-present-mask\n");
626 return -ENODEV;
627 }
628 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
629 dev_err(&spi->dev, "invalid spi-present-mask\n");
630 return -ENODEV;
631 }
8f1cc3b1 632
97ddb1c8
LP
633 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++)
634 pullups[addr] = 0;
635 } else {
636 type = spi_get_device_id(spi)->driver_data;
637 pdata = spi->dev.platform_data;
638 if (!pdata || !gpio_is_valid(pdata->base)) {
639 dev_dbg(&spi->dev,
640 "invalid or missing platform data\n");
0b7bb77f
PK
641 return -EINVAL;
642 }
97ddb1c8
LP
643
644 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
645 if (!pdata->chip[addr].is_present)
646 continue;
647 chips++;
648 if ((type == MCP_TYPE_S08) && (addr > 3)) {
649 dev_err(&spi->dev,
650 "mcp23s08 only supports address 0..3\n");
651 return -EINVAL;
652 }
653 spi_present_mask |= 1 << addr;
654 pullups[addr] = pdata->chip[addr].pullups;
655 }
656
657 if (!chips)
658 return -ENODEV;
659
660 base = pdata->base;
8f1cc3b1 661 }
8f1cc3b1
DB
662
663 data = kzalloc(sizeof *data + chips * sizeof(struct mcp23s08),
664 GFP_KERNEL);
665 if (!data)
666 return -ENOMEM;
667 spi_set_drvdata(spi, data);
668
0b7bb77f 669 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
97ddb1c8 670 if (!(spi_present_mask & (1 << addr)))
8f1cc3b1
DB
671 continue;
672 chips--;
673 data->mcp[addr] = &data->chip[chips];
d62b98f3
PK
674 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
675 0x40 | (addr << 1), type, base,
97ddb1c8 676 pullups[addr]);
8f1cc3b1
DB
677 if (status < 0)
678 goto fail;
0b7bb77f 679
97ddb1c8
LP
680 if (base != -1)
681 base += (type == MCP_TYPE_S17) ? 16 : 8;
682 ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
8f1cc3b1 683 }
97ddb1c8 684 data->ngpio = ngpio;
e58b9e27
DB
685
686 /* NOTE: these chips have a relatively sane IRQ framework, with
687 * per-signal masking and level/edge triggering. It's not yet
688 * handled here...
689 */
690
e58b9e27
DB
691 return 0;
692
693fail:
0b7bb77f 694 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
8f1cc3b1
DB
695 int tmp;
696
697 if (!data->mcp[addr])
698 continue;
699 tmp = gpiochip_remove(&data->mcp[addr]->chip);
700 if (tmp < 0)
701 dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
702 }
703 kfree(data);
e58b9e27
DB
704 return status;
705}
706
707static int mcp23s08_remove(struct spi_device *spi)
708{
8f1cc3b1 709 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
8f1cc3b1 710 unsigned addr;
e58b9e27
DB
711 int status = 0;
712
0b7bb77f 713 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
8f1cc3b1
DB
714 int tmp;
715
716 if (!data->mcp[addr])
717 continue;
718
719 tmp = gpiochip_remove(&data->mcp[addr]->chip);
720 if (tmp < 0) {
721 dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
722 status = tmp;
723 }
724 }
e58b9e27 725 if (status == 0)
8f1cc3b1 726 kfree(data);
e58b9e27
DB
727 return status;
728}
729
0b7bb77f
PK
730static const struct spi_device_id mcp23s08_ids[] = {
731 { "mcp23s08", MCP_TYPE_S08 },
732 { "mcp23s17", MCP_TYPE_S17 },
733 { },
734};
735MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
736
e58b9e27
DB
737static struct spi_driver mcp23s08_driver = {
738 .probe = mcp23s08_probe,
739 .remove = mcp23s08_remove,
0b7bb77f 740 .id_table = mcp23s08_ids,
e58b9e27
DB
741 .driver = {
742 .name = "mcp23s08",
743 .owner = THIS_MODULE,
97ddb1c8 744 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
e58b9e27
DB
745 },
746};
747
d62b98f3
PK
748static int __init mcp23s08_spi_init(void)
749{
750 return spi_register_driver(&mcp23s08_driver);
751}
752
753static void mcp23s08_spi_exit(void)
754{
755 spi_unregister_driver(&mcp23s08_driver);
756}
757
758#else
759
760static int __init mcp23s08_spi_init(void) { return 0; }
761static void mcp23s08_spi_exit(void) { }
762
763#endif /* CONFIG_SPI_MASTER */
764
e58b9e27
DB
765/*----------------------------------------------------------------------*/
766
767static int __init mcp23s08_init(void)
768{
752ad5e8
PK
769 int ret;
770
771 ret = mcp23s08_spi_init();
772 if (ret)
773 goto spi_fail;
774
775 ret = mcp23s08_i2c_init();
776 if (ret)
777 goto i2c_fail;
778
779 return 0;
780
781 i2c_fail:
782 mcp23s08_spi_exit();
783 spi_fail:
784 return ret;
e58b9e27 785}
752ad5e8 786/* register after spi/i2c postcore initcall and before
673c0c00
DB
787 * subsys initcalls that may rely on these GPIOs
788 */
789subsys_initcall(mcp23s08_init);
e58b9e27
DB
790
791static void __exit mcp23s08_exit(void)
792{
d62b98f3 793 mcp23s08_spi_exit();
752ad5e8 794 mcp23s08_i2c_exit();
e58b9e27
DB
795}
796module_exit(mcp23s08_exit);
797
798MODULE_LICENSE("GPL");