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8e8e69d6 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
0da094d8 JB |
2 | /* |
3 | * linux/drivers/gpio/gpio-mb86s7x.c | |
4 | * | |
5 | * Copyright (C) 2015 Fujitsu Semiconductor Limited | |
6 | * Copyright (C) 2015 Linaro Ltd. | |
0da094d8 JB |
7 | */ |
8 | ||
f3d705d5 | 9 | #include <linux/acpi.h> |
0da094d8 JB |
10 | #include <linux/io.h> |
11 | #include <linux/init.h> | |
12 | #include <linux/clk.h> | |
e91d0f05 | 13 | #include <linux/mod_devicetable.h> |
e1289dba | 14 | #include <linux/module.h> |
0da094d8 JB |
15 | #include <linux/err.h> |
16 | #include <linux/errno.h> | |
17 | #include <linux/ioport.h> | |
0da094d8 JB |
18 | #include <linux/gpio/driver.h> |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/spinlock.h> | |
21 | #include <linux/slab.h> | |
22 | ||
77cb907a | 23 | #include "gpiolib-acpi.h" |
f3d705d5 | 24 | |
0da094d8 JB |
25 | /* |
26 | * Only first 8bits of a register correspond to each pin, | |
27 | * so there are 4 registers for 32 pins. | |
28 | */ | |
29 | #define PDR(x) (0x0 + x / 8 * 4) | |
30 | #define DDR(x) (0x10 + x / 8 * 4) | |
31 | #define PFR(x) (0x20 + x / 8 * 4) | |
32 | ||
33 | #define OFFSET(x) BIT((x) % 8) | |
34 | ||
35 | struct mb86s70_gpio_chip { | |
36 | struct gpio_chip gc; | |
37 | void __iomem *base; | |
0da094d8 JB |
38 | spinlock_t lock; |
39 | }; | |
40 | ||
0da094d8 JB |
41 | static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio) |
42 | { | |
01f76b26 | 43 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
0da094d8 JB |
44 | unsigned long flags; |
45 | u32 val; | |
46 | ||
47 | spin_lock_irqsave(&gchip->lock, flags); | |
48 | ||
49 | val = readl(gchip->base + PFR(gpio)); | |
50 | val &= ~OFFSET(gpio); | |
51 | writel(val, gchip->base + PFR(gpio)); | |
52 | ||
53 | spin_unlock_irqrestore(&gchip->lock, flags); | |
54 | ||
55 | return 0; | |
56 | } | |
57 | ||
58 | static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio) | |
59 | { | |
01f76b26 | 60 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
0da094d8 JB |
61 | unsigned long flags; |
62 | u32 val; | |
63 | ||
64 | spin_lock_irqsave(&gchip->lock, flags); | |
65 | ||
66 | val = readl(gchip->base + PFR(gpio)); | |
67 | val |= OFFSET(gpio); | |
68 | writel(val, gchip->base + PFR(gpio)); | |
69 | ||
70 | spin_unlock_irqrestore(&gchip->lock, flags); | |
71 | } | |
72 | ||
73 | static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) | |
74 | { | |
01f76b26 | 75 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
0da094d8 JB |
76 | unsigned long flags; |
77 | unsigned char val; | |
78 | ||
79 | spin_lock_irqsave(&gchip->lock, flags); | |
80 | ||
81 | val = readl(gchip->base + DDR(gpio)); | |
82 | val &= ~OFFSET(gpio); | |
83 | writel(val, gchip->base + DDR(gpio)); | |
84 | ||
85 | spin_unlock_irqrestore(&gchip->lock, flags); | |
86 | ||
87 | return 0; | |
88 | } | |
89 | ||
90 | static int mb86s70_gpio_direction_output(struct gpio_chip *gc, | |
91 | unsigned gpio, int value) | |
92 | { | |
01f76b26 | 93 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
0da094d8 JB |
94 | unsigned long flags; |
95 | unsigned char val; | |
96 | ||
97 | spin_lock_irqsave(&gchip->lock, flags); | |
98 | ||
99 | val = readl(gchip->base + PDR(gpio)); | |
100 | if (value) | |
101 | val |= OFFSET(gpio); | |
102 | else | |
103 | val &= ~OFFSET(gpio); | |
104 | writel(val, gchip->base + PDR(gpio)); | |
105 | ||
106 | val = readl(gchip->base + DDR(gpio)); | |
107 | val |= OFFSET(gpio); | |
108 | writel(val, gchip->base + DDR(gpio)); | |
109 | ||
110 | spin_unlock_irqrestore(&gchip->lock, flags); | |
111 | ||
112 | return 0; | |
113 | } | |
114 | ||
115 | static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio) | |
116 | { | |
01f76b26 | 117 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
0da094d8 JB |
118 | |
119 | return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio)); | |
120 | } | |
121 | ||
122 | static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value) | |
123 | { | |
01f76b26 | 124 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
0da094d8 JB |
125 | unsigned long flags; |
126 | unsigned char val; | |
127 | ||
128 | spin_lock_irqsave(&gchip->lock, flags); | |
129 | ||
130 | val = readl(gchip->base + PDR(gpio)); | |
131 | if (value) | |
132 | val |= OFFSET(gpio); | |
133 | else | |
134 | val &= ~OFFSET(gpio); | |
135 | writel(val, gchip->base + PDR(gpio)); | |
136 | ||
137 | spin_unlock_irqrestore(&gchip->lock, flags); | |
138 | } | |
139 | ||
f3d705d5 AB |
140 | static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) |
141 | { | |
142 | int irq, index; | |
143 | ||
144 | for (index = 0;; index++) { | |
145 | irq = platform_get_irq(to_platform_device(gc->parent), index); | |
db67aa33 AS |
146 | if (irq < 0) |
147 | return irq; | |
148 | if (irq == 0) | |
f3d705d5 AB |
149 | break; |
150 | if (irq_get_irq_data(irq)->hwirq == offset) | |
151 | return irq; | |
152 | } | |
153 | return -EINVAL; | |
154 | } | |
155 | ||
0da094d8 JB |
156 | static int mb86s70_gpio_probe(struct platform_device *pdev) |
157 | { | |
158 | struct mb86s70_gpio_chip *gchip; | |
162b1696 | 159 | struct clk *clk; |
0da094d8 JB |
160 | int ret; |
161 | ||
162 | gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL); | |
163 | if (gchip == NULL) | |
164 | return -ENOMEM; | |
165 | ||
166 | platform_set_drvdata(pdev, gchip); | |
167 | ||
329e23f9 | 168 | gchip->base = devm_platform_ioremap_resource(pdev, 0); |
0da094d8 JB |
169 | if (IS_ERR(gchip->base)) |
170 | return PTR_ERR(gchip->base); | |
171 | ||
162b1696 ZZ |
172 | clk = devm_clk_get_optional_enabled(&pdev->dev, NULL); |
173 | if (IS_ERR(clk)) | |
174 | return PTR_ERR(clk); | |
0da094d8 JB |
175 | |
176 | spin_lock_init(&gchip->lock); | |
177 | ||
178 | gchip->gc.direction_output = mb86s70_gpio_direction_output; | |
179 | gchip->gc.direction_input = mb86s70_gpio_direction_input; | |
180 | gchip->gc.request = mb86s70_gpio_request; | |
181 | gchip->gc.free = mb86s70_gpio_free; | |
182 | gchip->gc.get = mb86s70_gpio_get; | |
183 | gchip->gc.set = mb86s70_gpio_set; | |
db67aa33 | 184 | gchip->gc.to_irq = mb86s70_gpio_to_irq; |
0da094d8 JB |
185 | gchip->gc.label = dev_name(&pdev->dev); |
186 | gchip->gc.ngpio = 32; | |
187 | gchip->gc.owner = THIS_MODULE; | |
58383c78 | 188 | gchip->gc.parent = &pdev->dev; |
0da094d8 JB |
189 | gchip->gc.base = -1; |
190 | ||
01f76b26 | 191 | ret = gpiochip_add_data(&gchip->gc, gchip); |
162b1696 ZZ |
192 | if (ret) |
193 | return dev_err_probe(&pdev->dev, ret, | |
194 | "couldn't register gpio driver\n"); | |
0da094d8 | 195 | |
db67aa33 | 196 | acpi_gpiochip_request_interrupts(&gchip->gc); |
f3d705d5 AB |
197 | |
198 | return 0; | |
0da094d8 JB |
199 | } |
200 | ||
e86c4f1c | 201 | static void mb86s70_gpio_remove(struct platform_device *pdev) |
0da094d8 JB |
202 | { |
203 | struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev); | |
204 | ||
db67aa33 | 205 | acpi_gpiochip_free_interrupts(&gchip->gc); |
0da094d8 | 206 | gpiochip_remove(&gchip->gc); |
0da094d8 JB |
207 | } |
208 | ||
209 | static const struct of_device_id mb86s70_gpio_dt_ids[] = { | |
210 | { .compatible = "fujitsu,mb86s70-gpio" }, | |
211 | { /* sentinel */ } | |
212 | }; | |
e1289dba | 213 | MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids); |
0da094d8 | 214 | |
f3d705d5 AB |
215 | #ifdef CONFIG_ACPI |
216 | static const struct acpi_device_id mb86s70_gpio_acpi_ids[] = { | |
217 | { "SCX0007" }, | |
218 | { /* sentinel */ } | |
219 | }; | |
220 | MODULE_DEVICE_TABLE(acpi, mb86s70_gpio_acpi_ids); | |
221 | #endif | |
222 | ||
0da094d8 JB |
223 | static struct platform_driver mb86s70_gpio_driver = { |
224 | .driver = { | |
225 | .name = "mb86s70-gpio", | |
226 | .of_match_table = mb86s70_gpio_dt_ids, | |
f3d705d5 | 227 | .acpi_match_table = ACPI_PTR(mb86s70_gpio_acpi_ids), |
0da094d8 JB |
228 | }, |
229 | .probe = mb86s70_gpio_probe, | |
e86c4f1c | 230 | .remove_new = mb86s70_gpio_remove, |
0da094d8 | 231 | }; |
e1289dba | 232 | module_platform_driver(mb86s70_gpio_driver); |
0da094d8 | 233 | |
e1289dba AB |
234 | MODULE_DESCRIPTION("MB86S7x GPIO Driver"); |
235 | MODULE_ALIAS("platform:mb86s70-gpio"); | |
236 | MODULE_LICENSE("GPL"); |