Commit | Line | Data |
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b886d83c | 1 | // SPDX-License-Identifier: GPL-2.0-only |
bbcd6d54 | 2 | /* |
c103de24 | 3 | * MAX732x I2C Port Expander with 8/16 I/O |
bbcd6d54 EM |
4 | * |
5 | * Copyright (C) 2007 Marvell International Ltd. | |
6 | * Copyright (C) 2008 Jack Ren <jack.ren@marvell.com> | |
7 | * Copyright (C) 2008 Eric Miao <eric.miao@marvell.com> | |
984f6643 | 8 | * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org> |
bbcd6d54 EM |
9 | * |
10 | * Derived from drivers/gpio/pca953x.c | |
bbcd6d54 EM |
11 | */ |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/string.h> | |
984f6643 | 17 | #include <linux/gpio/driver.h> |
a80a0bbe | 18 | #include <linux/interrupt.h> |
bbcd6d54 | 19 | #include <linux/i2c.h> |
0a848d63 | 20 | #include <linux/platform_data/max732x.h> |
43c4bcf9 | 21 | #include <linux/of.h> |
bbcd6d54 EM |
22 | |
23 | ||
24 | /* | |
25 | * Each port of MAX732x (including MAX7319) falls into one of the | |
26 | * following three types: | |
27 | * | |
28 | * - Push Pull Output | |
29 | * - Input | |
30 | * - Open Drain I/O | |
31 | * | |
32 | * designated by 'O', 'I' and 'P' individually according to MAXIM's | |
a80a0bbe MZ |
33 | * datasheets. 'I' and 'P' ports are interrupt capables, some with |
34 | * a dedicated interrupt mask. | |
bbcd6d54 EM |
35 | * |
36 | * There are two groups of I/O ports, each group usually includes | |
37 | * up to 8 I/O ports, and is accessed by a specific I2C address: | |
38 | * | |
39 | * - Group A : by I2C address 0b'110xxxx | |
40 | * - Group B : by I2C address 0b'101xxxx | |
41 | * | |
42 | * where 'xxxx' is decided by the connections of pin AD2/AD0. The | |
43 | * address used also affects the initial state of output signals. | |
44 | * | |
45 | * Within each group of ports, there are five known combinations of | |
46 | * I/O ports: 4I4O, 4P4O, 8I, 8P, 8O, see the definitions below for | |
a80a0bbe MZ |
47 | * the detailed organization of these ports. Only Goup A is interrupt |
48 | * capable. | |
bbcd6d54 EM |
49 | * |
50 | * GPIO numbers start from 'gpio_base + 0' to 'gpio_base + 8/16', | |
51 | * and GPIOs from GROUP_A are numbered before those from GROUP_B | |
52 | * (if there are two groups). | |
53 | * | |
54 | * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so | |
55 | * they are not supported by this driver. | |
56 | */ | |
57 | ||
58 | #define PORT_NONE 0x0 /* '/' No Port */ | |
59 | #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */ | |
60 | #define PORT_INPUT 0x2 /* 'I' Input Only */ | |
61 | #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */ | |
62 | ||
63 | #define IO_4I4O 0x5AA5 /* O7 O6 I5 I4 I3 I2 O1 O0 */ | |
64 | #define IO_4P4O 0x5FF5 /* O7 O6 P5 P4 P3 P2 O1 O0 */ | |
65 | #define IO_8I 0xAAAA /* I7 I6 I5 I4 I3 I2 I1 I0 */ | |
66 | #define IO_8P 0xFFFF /* P7 P6 P5 P4 P3 P2 P1 P0 */ | |
67 | #define IO_8O 0x5555 /* O7 O6 O5 O4 O3 O2 O1 O0 */ | |
68 | ||
69 | #define GROUP_A(x) ((x) & 0xffff) /* I2C Addr: 0b'110xxxx */ | |
70 | #define GROUP_B(x) ((x) << 16) /* I2C Addr: 0b'101xxxx */ | |
71 | ||
a80a0bbe MZ |
72 | #define INT_NONE 0x0 /* No interrupt capability */ |
73 | #define INT_NO_MASK 0x1 /* Has interrupts, no mask */ | |
74 | #define INT_INDEP_MASK 0x2 /* Has interrupts, independent mask */ | |
75 | #define INT_MERGED_MASK 0x3 /* Has interrupts, merged mask */ | |
76 | ||
77 | #define INT_CAPS(x) (((uint64_t)(x)) << 32) | |
78 | ||
79 | enum { | |
80 | MAX7319, | |
81 | MAX7320, | |
82 | MAX7321, | |
83 | MAX7322, | |
84 | MAX7323, | |
85 | MAX7324, | |
86 | MAX7325, | |
87 | MAX7326, | |
88 | MAX7327, | |
89 | }; | |
90 | ||
91 | static uint64_t max732x_features[] = { | |
92 | [MAX7319] = GROUP_A(IO_8I) | INT_CAPS(INT_MERGED_MASK), | |
93 | [MAX7320] = GROUP_B(IO_8O), | |
94 | [MAX7321] = GROUP_A(IO_8P) | INT_CAPS(INT_NO_MASK), | |
95 | [MAX7322] = GROUP_A(IO_4I4O) | INT_CAPS(INT_MERGED_MASK), | |
96 | [MAX7323] = GROUP_A(IO_4P4O) | INT_CAPS(INT_INDEP_MASK), | |
97 | [MAX7324] = GROUP_A(IO_8I) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
98 | [MAX7325] = GROUP_A(IO_8P) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
99 | [MAX7326] = GROUP_A(IO_4I4O) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
100 | [MAX7327] = GROUP_A(IO_4P4O) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
101 | }; | |
102 | ||
bbcd6d54 | 103 | static const struct i2c_device_id max732x_id[] = { |
a80a0bbe MZ |
104 | { "max7319", MAX7319 }, |
105 | { "max7320", MAX7320 }, | |
106 | { "max7321", MAX7321 }, | |
107 | { "max7322", MAX7322 }, | |
108 | { "max7323", MAX7323 }, | |
109 | { "max7324", MAX7324 }, | |
110 | { "max7325", MAX7325 }, | |
111 | { "max7326", MAX7326 }, | |
112 | { "max7327", MAX7327 }, | |
bbcd6d54 EM |
113 | { }, |
114 | }; | |
115 | MODULE_DEVICE_TABLE(i2c, max732x_id); | |
116 | ||
43c4bcf9 SP |
117 | #ifdef CONFIG_OF |
118 | static const struct of_device_id max732x_of_table[] = { | |
119 | { .compatible = "maxim,max7319" }, | |
120 | { .compatible = "maxim,max7320" }, | |
121 | { .compatible = "maxim,max7321" }, | |
122 | { .compatible = "maxim,max7322" }, | |
123 | { .compatible = "maxim,max7323" }, | |
124 | { .compatible = "maxim,max7324" }, | |
125 | { .compatible = "maxim,max7325" }, | |
126 | { .compatible = "maxim,max7326" }, | |
127 | { .compatible = "maxim,max7327" }, | |
128 | { } | |
129 | }; | |
130 | MODULE_DEVICE_TABLE(of, max732x_of_table); | |
131 | #endif | |
132 | ||
bbcd6d54 EM |
133 | struct max732x_chip { |
134 | struct gpio_chip gpio_chip; | |
135 | ||
136 | struct i2c_client *client; /* "main" client */ | |
137 | struct i2c_client *client_dummy; | |
138 | struct i2c_client *client_group_a; | |
139 | struct i2c_client *client_group_b; | |
140 | ||
141 | unsigned int mask_group_a; | |
142 | unsigned int dir_input; | |
143 | unsigned int dir_output; | |
144 | ||
145 | struct mutex lock; | |
146 | uint8_t reg_out[2]; | |
a80a0bbe MZ |
147 | |
148 | #ifdef CONFIG_GPIO_MAX732X_IRQ | |
479f8a57 | 149 | struct mutex irq_lock; |
479f8a57 SP |
150 | uint8_t irq_mask; |
151 | uint8_t irq_mask_cur; | |
152 | uint8_t irq_trig_raise; | |
153 | uint8_t irq_trig_fall; | |
154 | uint8_t irq_features; | |
a80a0bbe | 155 | #endif |
bbcd6d54 EM |
156 | }; |
157 | ||
a80a0bbe | 158 | static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) |
bbcd6d54 EM |
159 | { |
160 | struct i2c_client *client; | |
161 | int ret; | |
162 | ||
163 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
164 | ret = i2c_smbus_write_byte(client, val); | |
165 | if (ret < 0) { | |
166 | dev_err(&client->dev, "failed writing\n"); | |
167 | return ret; | |
168 | } | |
169 | ||
170 | return 0; | |
171 | } | |
172 | ||
a80a0bbe | 173 | static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val) |
bbcd6d54 EM |
174 | { |
175 | struct i2c_client *client; | |
176 | int ret; | |
177 | ||
178 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
179 | ret = i2c_smbus_read_byte(client); | |
180 | if (ret < 0) { | |
181 | dev_err(&client->dev, "failed reading\n"); | |
182 | return ret; | |
183 | } | |
184 | ||
185 | *val = (uint8_t)ret; | |
186 | return 0; | |
187 | } | |
188 | ||
189 | static inline int is_group_a(struct max732x_chip *chip, unsigned off) | |
190 | { | |
191 | return (1u << off) & chip->mask_group_a; | |
192 | } | |
193 | ||
194 | static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off) | |
195 | { | |
0788b644 | 196 | struct max732x_chip *chip = gpiochip_get_data(gc); |
bbcd6d54 EM |
197 | uint8_t reg_val; |
198 | int ret; | |
199 | ||
a80a0bbe | 200 | ret = max732x_readb(chip, is_group_a(chip, off), ®_val); |
bbcd6d54 | 201 | if (ret < 0) |
f9660087 | 202 | return ret; |
bbcd6d54 | 203 | |
f9660087 | 204 | return !!(reg_val & (1u << (off & 0x7))); |
bbcd6d54 EM |
205 | } |
206 | ||
161af6cd MR |
207 | static void max732x_gpio_set_mask(struct gpio_chip *gc, unsigned off, int mask, |
208 | int val) | |
bbcd6d54 | 209 | { |
0788b644 | 210 | struct max732x_chip *chip = gpiochip_get_data(gc); |
161af6cd | 211 | uint8_t reg_out; |
bbcd6d54 EM |
212 | int ret; |
213 | ||
bbcd6d54 EM |
214 | mutex_lock(&chip->lock); |
215 | ||
216 | reg_out = (off > 7) ? chip->reg_out[1] : chip->reg_out[0]; | |
161af6cd | 217 | reg_out = (reg_out & ~mask) | (val & mask); |
bbcd6d54 | 218 | |
a80a0bbe | 219 | ret = max732x_writeb(chip, is_group_a(chip, off), reg_out); |
bbcd6d54 EM |
220 | if (ret < 0) |
221 | goto out; | |
222 | ||
223 | /* update the shadow register then */ | |
224 | if (off > 7) | |
225 | chip->reg_out[1] = reg_out; | |
226 | else | |
227 | chip->reg_out[0] = reg_out; | |
228 | out: | |
229 | mutex_unlock(&chip->lock); | |
230 | } | |
231 | ||
161af6cd MR |
232 | static void max732x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
233 | { | |
234 | unsigned base = off & ~0x7; | |
235 | uint8_t mask = 1u << (off & 0x7); | |
236 | ||
237 | max732x_gpio_set_mask(gc, base, mask, val << (off & 0x7)); | |
238 | } | |
239 | ||
240 | static void max732x_gpio_set_multiple(struct gpio_chip *gc, | |
241 | unsigned long *mask, unsigned long *bits) | |
242 | { | |
243 | unsigned mask_lo = mask[0] & 0xff; | |
244 | unsigned mask_hi = (mask[0] >> 8) & 0xff; | |
245 | ||
246 | if (mask_lo) | |
247 | max732x_gpio_set_mask(gc, 0, mask_lo, bits[0] & 0xff); | |
248 | if (mask_hi) | |
249 | max732x_gpio_set_mask(gc, 8, mask_hi, (bits[0] >> 8) & 0xff); | |
250 | } | |
251 | ||
bbcd6d54 EM |
252 | static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
253 | { | |
0788b644 | 254 | struct max732x_chip *chip = gpiochip_get_data(gc); |
bbcd6d54 EM |
255 | unsigned int mask = 1u << off; |
256 | ||
bbcd6d54 EM |
257 | if ((mask & chip->dir_input) == 0) { |
258 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
259 | chip->client->name, off); | |
260 | return -EACCES; | |
261 | } | |
262 | ||
a13c1868 MZ |
263 | /* |
264 | * Open-drain pins must be set to high impedance (which is | |
265 | * equivalent to output-high) to be turned into an input. | |
266 | */ | |
267 | if ((mask & chip->dir_output)) | |
268 | max732x_gpio_set_value(gc, off, 1); | |
269 | ||
bbcd6d54 EM |
270 | return 0; |
271 | } | |
272 | ||
273 | static int max732x_gpio_direction_output(struct gpio_chip *gc, | |
274 | unsigned off, int val) | |
275 | { | |
0788b644 | 276 | struct max732x_chip *chip = gpiochip_get_data(gc); |
bbcd6d54 EM |
277 | unsigned int mask = 1u << off; |
278 | ||
bbcd6d54 EM |
279 | if ((mask & chip->dir_output) == 0) { |
280 | dev_dbg(&chip->client->dev, "%s port %d is input only\n", | |
281 | chip->client->name, off); | |
282 | return -EACCES; | |
283 | } | |
284 | ||
285 | max732x_gpio_set_value(gc, off, val); | |
286 | return 0; | |
287 | } | |
288 | ||
a80a0bbe MZ |
289 | #ifdef CONFIG_GPIO_MAX732X_IRQ |
290 | static int max732x_writew(struct max732x_chip *chip, uint16_t val) | |
291 | { | |
292 | int ret; | |
293 | ||
294 | val = cpu_to_le16(val); | |
295 | ||
296 | ret = i2c_master_send(chip->client_group_a, (char *)&val, 2); | |
297 | if (ret < 0) { | |
298 | dev_err(&chip->client_group_a->dev, "failed writing\n"); | |
299 | return ret; | |
300 | } | |
301 | ||
302 | return 0; | |
303 | } | |
304 | ||
305 | static int max732x_readw(struct max732x_chip *chip, uint16_t *val) | |
306 | { | |
307 | int ret; | |
308 | ||
309 | ret = i2c_master_recv(chip->client_group_a, (char *)val, 2); | |
310 | if (ret < 0) { | |
311 | dev_err(&chip->client_group_a->dev, "failed reading\n"); | |
312 | return ret; | |
313 | } | |
314 | ||
315 | *val = le16_to_cpu(*val); | |
316 | return 0; | |
317 | } | |
318 | ||
319 | static void max732x_irq_update_mask(struct max732x_chip *chip) | |
320 | { | |
321 | uint16_t msg; | |
322 | ||
323 | if (chip->irq_mask == chip->irq_mask_cur) | |
324 | return; | |
325 | ||
326 | chip->irq_mask = chip->irq_mask_cur; | |
327 | ||
328 | if (chip->irq_features == INT_NO_MASK) | |
329 | return; | |
330 | ||
331 | mutex_lock(&chip->lock); | |
332 | ||
333 | switch (chip->irq_features) { | |
334 | case INT_INDEP_MASK: | |
335 | msg = (chip->irq_mask << 8) | chip->reg_out[0]; | |
336 | max732x_writew(chip, msg); | |
337 | break; | |
338 | ||
339 | case INT_MERGED_MASK: | |
340 | msg = chip->irq_mask | chip->reg_out[0]; | |
341 | max732x_writeb(chip, 1, (uint8_t)msg); | |
342 | break; | |
343 | } | |
344 | ||
345 | mutex_unlock(&chip->lock); | |
346 | } | |
347 | ||
fbc4667a | 348 | static void max732x_irq_mask(struct irq_data *d) |
a80a0bbe | 349 | { |
984f6643 | 350 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
0788b644 | 351 | struct max732x_chip *chip = gpiochip_get_data(gc); |
a80a0bbe | 352 | |
479f8a57 | 353 | chip->irq_mask_cur &= ~(1 << d->hwirq); |
a80a0bbe MZ |
354 | } |
355 | ||
fbc4667a | 356 | static void max732x_irq_unmask(struct irq_data *d) |
a80a0bbe | 357 | { |
984f6643 | 358 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
0788b644 | 359 | struct max732x_chip *chip = gpiochip_get_data(gc); |
a80a0bbe | 360 | |
479f8a57 | 361 | chip->irq_mask_cur |= 1 << d->hwirq; |
a80a0bbe MZ |
362 | } |
363 | ||
fbc4667a | 364 | static void max732x_irq_bus_lock(struct irq_data *d) |
a80a0bbe | 365 | { |
984f6643 | 366 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
0788b644 | 367 | struct max732x_chip *chip = gpiochip_get_data(gc); |
a80a0bbe MZ |
368 | |
369 | mutex_lock(&chip->irq_lock); | |
370 | chip->irq_mask_cur = chip->irq_mask; | |
371 | } | |
372 | ||
fbc4667a | 373 | static void max732x_irq_bus_sync_unlock(struct irq_data *d) |
a80a0bbe | 374 | { |
984f6643 | 375 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
0788b644 | 376 | struct max732x_chip *chip = gpiochip_get_data(gc); |
09afa276 SP |
377 | uint16_t new_irqs; |
378 | uint16_t level; | |
a80a0bbe MZ |
379 | |
380 | max732x_irq_update_mask(chip); | |
09afa276 SP |
381 | |
382 | new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; | |
383 | while (new_irqs) { | |
384 | level = __ffs(new_irqs); | |
385 | max732x_gpio_direction_input(&chip->gpio_chip, level); | |
386 | new_irqs &= ~(1 << level); | |
387 | } | |
388 | ||
a80a0bbe MZ |
389 | mutex_unlock(&chip->irq_lock); |
390 | } | |
391 | ||
fbc4667a | 392 | static int max732x_irq_set_type(struct irq_data *d, unsigned int type) |
a80a0bbe | 393 | { |
984f6643 | 394 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
0788b644 | 395 | struct max732x_chip *chip = gpiochip_get_data(gc); |
479f8a57 | 396 | uint16_t off = d->hwirq; |
a80a0bbe MZ |
397 | uint16_t mask = 1 << off; |
398 | ||
399 | if (!(mask & chip->dir_input)) { | |
400 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
401 | chip->client->name, off); | |
402 | return -EACCES; | |
403 | } | |
404 | ||
405 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { | |
406 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", | |
fbc4667a | 407 | d->irq, type); |
a80a0bbe MZ |
408 | return -EINVAL; |
409 | } | |
410 | ||
411 | if (type & IRQ_TYPE_EDGE_FALLING) | |
412 | chip->irq_trig_fall |= mask; | |
413 | else | |
414 | chip->irq_trig_fall &= ~mask; | |
415 | ||
416 | if (type & IRQ_TYPE_EDGE_RISING) | |
417 | chip->irq_trig_raise |= mask; | |
418 | else | |
419 | chip->irq_trig_raise &= ~mask; | |
420 | ||
09afa276 | 421 | return 0; |
a80a0bbe MZ |
422 | } |
423 | ||
67ddd32b SP |
424 | static int max732x_irq_set_wake(struct irq_data *data, unsigned int on) |
425 | { | |
426 | struct max732x_chip *chip = irq_data_get_irq_chip_data(data); | |
427 | ||
428 | irq_set_irq_wake(chip->client->irq, on); | |
429 | return 0; | |
430 | } | |
431 | ||
a80a0bbe MZ |
432 | static struct irq_chip max732x_irq_chip = { |
433 | .name = "max732x", | |
fbc4667a LB |
434 | .irq_mask = max732x_irq_mask, |
435 | .irq_unmask = max732x_irq_unmask, | |
436 | .irq_bus_lock = max732x_irq_bus_lock, | |
437 | .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock, | |
438 | .irq_set_type = max732x_irq_set_type, | |
67ddd32b | 439 | .irq_set_wake = max732x_irq_set_wake, |
a80a0bbe MZ |
440 | }; |
441 | ||
442 | static uint8_t max732x_irq_pending(struct max732x_chip *chip) | |
443 | { | |
444 | uint8_t cur_stat; | |
445 | uint8_t old_stat; | |
446 | uint8_t trigger; | |
447 | uint8_t pending; | |
448 | uint16_t status; | |
449 | int ret; | |
450 | ||
451 | ret = max732x_readw(chip, &status); | |
452 | if (ret) | |
453 | return 0; | |
454 | ||
455 | trigger = status >> 8; | |
456 | trigger &= chip->irq_mask; | |
457 | ||
458 | if (!trigger) | |
459 | return 0; | |
460 | ||
461 | cur_stat = status & 0xFF; | |
462 | cur_stat &= chip->irq_mask; | |
463 | ||
464 | old_stat = cur_stat ^ trigger; | |
465 | ||
466 | pending = (old_stat & chip->irq_trig_fall) | | |
467 | (cur_stat & chip->irq_trig_raise); | |
468 | pending &= trigger; | |
469 | ||
470 | return pending; | |
471 | } | |
472 | ||
473 | static irqreturn_t max732x_irq_handler(int irq, void *devid) | |
474 | { | |
475 | struct max732x_chip *chip = devid; | |
476 | uint8_t pending; | |
477 | uint8_t level; | |
478 | ||
479 | pending = max732x_irq_pending(chip); | |
480 | ||
481 | if (!pending) | |
482 | return IRQ_HANDLED; | |
483 | ||
484 | do { | |
485 | level = __ffs(pending); | |
f0fbe7bc | 486 | handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain, |
984f6643 | 487 | level)); |
a80a0bbe MZ |
488 | |
489 | pending &= ~(1 << level); | |
490 | } while (pending); | |
491 | ||
492 | return IRQ_HANDLED; | |
493 | } | |
494 | ||
495 | static int max732x_irq_setup(struct max732x_chip *chip, | |
496 | const struct i2c_device_id *id) | |
497 | { | |
498 | struct i2c_client *client = chip->client; | |
e56aee18 | 499 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe | 500 | int has_irq = max732x_features[id->driver_data] >> 32; |
984f6643 | 501 | int irq_base = 0; |
a80a0bbe MZ |
502 | int ret; |
503 | ||
43c4bcf9 SP |
504 | if (((pdata && pdata->irq_base) || client->irq) |
505 | && has_irq != INT_NONE) { | |
43c4bcf9 | 506 | if (pdata) |
984f6643 | 507 | irq_base = pdata->irq_base; |
a80a0bbe MZ |
508 | chip->irq_features = has_irq; |
509 | mutex_init(&chip->irq_lock); | |
510 | ||
68689dbf SP |
511 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
512 | NULL, max732x_irq_handler, IRQF_ONESHOT | | |
513 | IRQF_TRIGGER_FALLING | IRQF_SHARED, | |
514 | dev_name(&client->dev), chip); | |
a80a0bbe MZ |
515 | if (ret) { |
516 | dev_err(&client->dev, "failed to request irq %d\n", | |
517 | client->irq); | |
984f6643 | 518 | return ret; |
a80a0bbe | 519 | } |
d245b3f9 LW |
520 | ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, |
521 | &max732x_irq_chip, | |
522 | irq_base, | |
523 | handle_simple_irq, | |
524 | IRQ_TYPE_NONE); | |
984f6643 LW |
525 | if (ret) { |
526 | dev_err(&client->dev, | |
527 | "could not connect irqchip to gpiochip\n"); | |
528 | return ret; | |
529 | } | |
d245b3f9 LW |
530 | gpiochip_set_nested_irqchip(&chip->gpio_chip, |
531 | &max732x_irq_chip, | |
532 | client->irq); | |
a80a0bbe MZ |
533 | } |
534 | ||
535 | return 0; | |
a80a0bbe MZ |
536 | } |
537 | ||
a80a0bbe MZ |
538 | #else /* CONFIG_GPIO_MAX732X_IRQ */ |
539 | static int max732x_irq_setup(struct max732x_chip *chip, | |
540 | const struct i2c_device_id *id) | |
541 | { | |
542 | struct i2c_client *client = chip->client; | |
e56aee18 | 543 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe MZ |
544 | int has_irq = max732x_features[id->driver_data] >> 32; |
545 | ||
43c4bcf9 | 546 | if (((pdata && pdata->irq_base) || client->irq) && has_irq != INT_NONE) |
a80a0bbe MZ |
547 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
548 | ||
549 | return 0; | |
550 | } | |
a80a0bbe MZ |
551 | #endif |
552 | ||
3836309d | 553 | static int max732x_setup_gpio(struct max732x_chip *chip, |
bbcd6d54 EM |
554 | const struct i2c_device_id *id, |
555 | unsigned gpio_start) | |
556 | { | |
557 | struct gpio_chip *gc = &chip->gpio_chip; | |
a80a0bbe | 558 | uint32_t id_data = (uint32_t)max732x_features[id->driver_data]; |
bbcd6d54 EM |
559 | int i, port = 0; |
560 | ||
561 | for (i = 0; i < 16; i++, id_data >>= 2) { | |
562 | unsigned int mask = 1 << port; | |
563 | ||
564 | switch (id_data & 0x3) { | |
565 | case PORT_OUTPUT: | |
566 | chip->dir_output |= mask; | |
567 | break; | |
568 | case PORT_INPUT: | |
569 | chip->dir_input |= mask; | |
570 | break; | |
571 | case PORT_OPENDRAIN: | |
572 | chip->dir_output |= mask; | |
573 | chip->dir_input |= mask; | |
574 | break; | |
575 | default: | |
576 | continue; | |
577 | } | |
578 | ||
579 | if (i < 8) | |
580 | chip->mask_group_a |= mask; | |
581 | port++; | |
582 | } | |
583 | ||
584 | if (chip->dir_input) | |
585 | gc->direction_input = max732x_gpio_direction_input; | |
586 | if (chip->dir_output) { | |
587 | gc->direction_output = max732x_gpio_direction_output; | |
588 | gc->set = max732x_gpio_set_value; | |
161af6cd | 589 | gc->set_multiple = max732x_gpio_set_multiple; |
bbcd6d54 EM |
590 | } |
591 | gc->get = max732x_gpio_get_value; | |
9fb1f39e | 592 | gc->can_sleep = true; |
bbcd6d54 EM |
593 | |
594 | gc->base = gpio_start; | |
595 | gc->ngpio = port; | |
596 | gc->label = chip->client->name; | |
58383c78 | 597 | gc->parent = &chip->client->dev; |
bbcd6d54 EM |
598 | gc->owner = THIS_MODULE; |
599 | ||
600 | return port; | |
601 | } | |
602 | ||
43c4bcf9 SP |
603 | static struct max732x_platform_data *of_gpio_max732x(struct device *dev) |
604 | { | |
605 | struct max732x_platform_data *pdata; | |
606 | ||
607 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
608 | if (!pdata) | |
609 | return NULL; | |
610 | ||
611 | pdata->gpio_base = -1; | |
612 | ||
613 | return pdata; | |
614 | } | |
615 | ||
3836309d | 616 | static int max732x_probe(struct i2c_client *client, |
bbcd6d54 EM |
617 | const struct i2c_device_id *id) |
618 | { | |
619 | struct max732x_platform_data *pdata; | |
43c4bcf9 | 620 | struct device_node *node; |
bbcd6d54 EM |
621 | struct max732x_chip *chip; |
622 | struct i2c_client *c; | |
623 | uint16_t addr_a, addr_b; | |
624 | int ret, nr_port; | |
625 | ||
e56aee18 | 626 | pdata = dev_get_platdata(&client->dev); |
43c4bcf9 SP |
627 | node = client->dev.of_node; |
628 | ||
629 | if (!pdata && node) | |
630 | pdata = of_gpio_max732x(&client->dev); | |
631 | ||
632 | if (!pdata) { | |
a342d215 BD |
633 | dev_dbg(&client->dev, "no platform data\n"); |
634 | return -EINVAL; | |
635 | } | |
bbcd6d54 | 636 | |
43c4bcf9 | 637 | chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
bbcd6d54 EM |
638 | if (chip == NULL) |
639 | return -ENOMEM; | |
640 | chip->client = client; | |
641 | ||
642 | nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base); | |
58383c78 | 643 | chip->gpio_chip.parent = &client->dev; |
bbcd6d54 EM |
644 | |
645 | addr_a = (client->addr & 0x0f) | 0x60; | |
646 | addr_b = (client->addr & 0x0f) | 0x50; | |
647 | ||
648 | switch (client->addr & 0x70) { | |
649 | case 0x60: | |
650 | chip->client_group_a = client; | |
5535cb68 | 651 | if (nr_port > 8) { |
bbcd6d54 | 652 | c = i2c_new_dummy(client->adapter, addr_b); |
f3a049e7 ZJ |
653 | if (!c) { |
654 | dev_err(&client->dev, | |
655 | "Failed to allocate I2C device\n"); | |
656 | ret = -ENODEV; | |
657 | goto out_failed; | |
658 | } | |
bbcd6d54 EM |
659 | chip->client_group_b = chip->client_dummy = c; |
660 | } | |
661 | break; | |
662 | case 0x50: | |
663 | chip->client_group_b = client; | |
5535cb68 | 664 | if (nr_port > 8) { |
bbcd6d54 | 665 | c = i2c_new_dummy(client->adapter, addr_a); |
f3a049e7 ZJ |
666 | if (!c) { |
667 | dev_err(&client->dev, | |
668 | "Failed to allocate I2C device\n"); | |
669 | ret = -ENODEV; | |
670 | goto out_failed; | |
671 | } | |
bbcd6d54 EM |
672 | chip->client_group_a = chip->client_dummy = c; |
673 | } | |
674 | break; | |
675 | default: | |
676 | dev_err(&client->dev, "invalid I2C address specified %02x\n", | |
677 | client->addr); | |
678 | ret = -EINVAL; | |
679 | goto out_failed; | |
f561b423 KK |
680 | } |
681 | ||
682 | if (nr_port > 8 && !chip->client_dummy) { | |
683 | dev_err(&client->dev, | |
684 | "Failed to allocate second group I2C device\n"); | |
685 | ret = -ENODEV; | |
686 | goto out_failed; | |
bbcd6d54 EM |
687 | } |
688 | ||
689 | mutex_init(&chip->lock); | |
690 | ||
78de5d52 NK |
691 | ret = max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]); |
692 | if (ret) | |
693 | goto out_failed; | |
694 | if (nr_port > 8) { | |
695 | ret = max732x_readb(chip, is_group_a(chip, 8), &chip->reg_out[1]); | |
696 | if (ret) | |
697 | goto out_failed; | |
698 | } | |
a80a0bbe | 699 | |
0788b644 | 700 | ret = gpiochip_add_data(&chip->gpio_chip, chip); |
a80a0bbe MZ |
701 | if (ret) |
702 | goto out_failed; | |
bbcd6d54 | 703 | |
984f6643 LW |
704 | ret = max732x_irq_setup(chip, id); |
705 | if (ret) { | |
706 | gpiochip_remove(&chip->gpio_chip); | |
bbcd6d54 | 707 | goto out_failed; |
984f6643 | 708 | } |
bbcd6d54 | 709 | |
43c4bcf9 | 710 | if (pdata && pdata->setup) { |
bbcd6d54 EM |
711 | ret = pdata->setup(client, chip->gpio_chip.base, |
712 | chip->gpio_chip.ngpio, pdata->context); | |
713 | if (ret < 0) | |
714 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
715 | } | |
716 | ||
717 | i2c_set_clientdata(client, chip); | |
718 | return 0; | |
719 | ||
720 | out_failed: | |
e1c73a99 | 721 | i2c_unregister_device(chip->client_dummy); |
bbcd6d54 EM |
722 | return ret; |
723 | } | |
724 | ||
206210ce | 725 | static int max732x_remove(struct i2c_client *client) |
bbcd6d54 | 726 | { |
e56aee18 | 727 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
bbcd6d54 | 728 | struct max732x_chip *chip = i2c_get_clientdata(client); |
bbcd6d54 | 729 | |
43c4bcf9 SP |
730 | if (pdata && pdata->teardown) { |
731 | int ret; | |
732 | ||
bbcd6d54 EM |
733 | ret = pdata->teardown(client, chip->gpio_chip.base, |
734 | chip->gpio_chip.ngpio, pdata->context); | |
735 | if (ret < 0) { | |
736 | dev_err(&client->dev, "%s failed, %d\n", | |
737 | "teardown", ret); | |
738 | return ret; | |
739 | } | |
740 | } | |
741 | ||
9f5132ae | 742 | gpiochip_remove(&chip->gpio_chip); |
bbcd6d54 EM |
743 | |
744 | /* unregister any dummy i2c_client */ | |
e1c73a99 | 745 | i2c_unregister_device(chip->client_dummy); |
bbcd6d54 | 746 | |
bbcd6d54 EM |
747 | return 0; |
748 | } | |
749 | ||
750 | static struct i2c_driver max732x_driver = { | |
751 | .driver = { | |
43c4bcf9 | 752 | .name = "max732x", |
43c4bcf9 | 753 | .of_match_table = of_match_ptr(max732x_of_table), |
bbcd6d54 EM |
754 | }, |
755 | .probe = max732x_probe, | |
8283c4ff | 756 | .remove = max732x_remove, |
bbcd6d54 EM |
757 | .id_table = max732x_id, |
758 | }; | |
759 | ||
760 | static int __init max732x_init(void) | |
761 | { | |
762 | return i2c_add_driver(&max732x_driver); | |
763 | } | |
2f8d1197 DB |
764 | /* register after i2c postcore initcall and before |
765 | * subsys initcalls that may rely on these GPIOs | |
766 | */ | |
767 | subsys_initcall(max732x_init); | |
bbcd6d54 EM |
768 | |
769 | static void __exit max732x_exit(void) | |
770 | { | |
771 | i2c_del_driver(&max732x_driver); | |
772 | } | |
773 | module_exit(max732x_exit); | |
774 | ||
775 | MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>"); | |
776 | MODULE_DESCRIPTION("GPIO expander driver for MAX732X"); | |
777 | MODULE_LICENSE("GPL"); |