[linux-block.git] / drivers / gpio / gpio-ljca.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Intel La Jolla Cove Adapter USB-GPIO driver
 *
 * Copyright (c) 2023, Intel Corporation.
 */

#include <linux/acpi.h>
#include <linux/auxiliary_bus.h>
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/dev_printk.h>
#include <linux/gpio/driver.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/kref.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/usb/ljca.h>

/* GPIO commands */
#define LJCA_GPIO_CONFIG		1
#define LJCA_GPIO_READ			2
#define LJCA_GPIO_WRITE			3
#define LJCA_GPIO_INT_EVENT		4
#define LJCA_GPIO_INT_MASK		5
#define LJCA_GPIO_INT_UNMASK		6

#define LJCA_GPIO_CONF_DISABLE		BIT(0)
#define LJCA_GPIO_CONF_INPUT		BIT(1)
#define LJCA_GPIO_CONF_OUTPUT		BIT(2)
#define LJCA_GPIO_CONF_PULLUP		BIT(3)
#define LJCA_GPIO_CONF_PULLDOWN		BIT(4)
#define LJCA_GPIO_CONF_DEFAULT		BIT(5)
#define LJCA_GPIO_CONF_INTERRUPT	BIT(6)
#define LJCA_GPIO_INT_TYPE		BIT(7)

#define LJCA_GPIO_CONF_EDGE		FIELD_PREP(LJCA_GPIO_INT_TYPE, 1)
#define LJCA_GPIO_CONF_LEVEL		FIELD_PREP(LJCA_GPIO_INT_TYPE, 0)

/* Intentional overlap with PULLUP / PULLDOWN */
#define LJCA_GPIO_CONF_SET		BIT(3)
#define LJCA_GPIO_CONF_CLR		BIT(4)

#define LJCA_GPIO_BUF_SIZE		60u

struct ljca_gpio_op {
	u8 index;
	u8 value;
} __packed;

struct ljca_gpio_packet {
	u8 num;
	struct ljca_gpio_op item[] __counted_by(num);
} __packed;

struct ljca_gpio_dev {
	struct ljca_client *ljca;
	struct gpio_chip gc;
	struct ljca_gpio_info *gpio_info;
	DECLARE_BITMAP(unmasked_irqs, LJCA_MAX_GPIO_NUM);
	DECLARE_BITMAP(enabled_irqs, LJCA_MAX_GPIO_NUM);
	DECLARE_BITMAP(reenable_irqs, LJCA_MAX_GPIO_NUM);
	DECLARE_BITMAP(output_enabled, LJCA_MAX_GPIO_NUM);
	u8 *connect_mode;
	/* protect irq bus */
	struct mutex irq_lock;
	struct work_struct work;
	/* protect package transfer to hardware */
	struct mutex trans_lock;

	u8 obuf[LJCA_GPIO_BUF_SIZE];
	u8 ibuf[LJCA_GPIO_BUF_SIZE];
};

static int ljca_gpio_config(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id,
			    u8 config)
{
	struct ljca_gpio_packet *packet =
				(struct ljca_gpio_packet *)ljca_gpio->obuf;
	int ret;

	mutex_lock(&ljca_gpio->trans_lock);
	packet->item[0].index = gpio_id;
	packet->item[0].value = config | ljca_gpio->connect_mode[gpio_id];
	packet->num = 1;

	ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_CONFIG, (u8 *)packet,
			    struct_size(packet, item, packet->num), NULL, 0);
	mutex_unlock(&ljca_gpio->trans_lock);

	return ret < 0 ? ret : 0;
}

static int ljca_gpio_read(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id)
{
	struct ljca_gpio_packet *ack_packet =
				(struct ljca_gpio_packet *)ljca_gpio->ibuf;
	struct ljca_gpio_packet *packet =
				(struct ljca_gpio_packet *)ljca_gpio->obuf;
	int ret;

	mutex_lock(&ljca_gpio->trans_lock);
	packet->num = 1;
	packet->item[0].index = gpio_id;
	ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_READ, (u8 *)packet,
			    struct_size(packet, item, packet->num),
			    ljca_gpio->ibuf, LJCA_GPIO_BUF_SIZE);

	if (ret <= 0 || ack_packet->num != packet->num) {
		dev_err(&ljca_gpio->ljca->auxdev.dev,
			"read package error, gpio_id: %u num: %u ret: %d\n",
			gpio_id, ack_packet->num, ret);
		ret = ret < 0 ? ret : -EIO;
	}
	mutex_unlock(&ljca_gpio->trans_lock);

	return ret < 0 ? ret : ack_packet->item[0].value > 0;
}

static int ljca_gpio_write(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, int value)
{
	struct ljca_gpio_packet *packet =
			(struct ljca_gpio_packet *)ljca_gpio->obuf;
	int ret;

	mutex_lock(&ljca_gpio->trans_lock);
	packet->num = 1;
	packet->item[0].index = gpio_id;
	packet->item[0].value = value & 1;

	ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_WRITE, (u8 *)packet,
			    struct_size(packet, item, packet->num), NULL, 0);
	mutex_unlock(&ljca_gpio->trans_lock);

	return ret < 0 ? ret : 0;
}

static int ljca_gpio_get_value(struct gpio_chip *chip, unsigned int offset)
{
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);

	return ljca_gpio_read(ljca_gpio, offset);
}

static void ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset,
				int val)
{
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	int ret;

	ret = ljca_gpio_write(ljca_gpio, offset, val);
	if (ret)
		dev_err(chip->parent,
			"set value failed offset: %u val: %d ret: %d\n",
			offset, val, ret);
}

static int ljca_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
{
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	u8 config = LJCA_GPIO_CONF_INPUT | LJCA_GPIO_CONF_CLR;
	int ret;

	ret = ljca_gpio_config(ljca_gpio, offset, config);
	if (ret)
		return ret;

	clear_bit(offset, ljca_gpio->output_enabled);

	return 0;
}

static int ljca_gpio_direction_output(struct gpio_chip *chip,
				      unsigned int offset, int val)
{
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	u8 config = LJCA_GPIO_CONF_OUTPUT | LJCA_GPIO_CONF_CLR;
	int ret;

	ret = ljca_gpio_config(ljca_gpio, offset, config);
	if (ret)
		return ret;

	ljca_gpio_set_value(chip, offset, val);
	set_bit(offset, ljca_gpio->output_enabled);

	return 0;
}

static int ljca_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
{
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);

	if (test_bit(offset, ljca_gpio->output_enabled))
		return GPIO_LINE_DIRECTION_OUT;

	return GPIO_LINE_DIRECTION_IN;
}

static int ljca_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
				unsigned long config)
{
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);

	ljca_gpio->connect_mode[offset] = 0;
	switch (pinconf_to_config_param(config)) {
	case PIN_CONFIG_BIAS_PULL_UP:
		ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLUP;
		break;
	case PIN_CONFIG_BIAS_PULL_DOWN:
		ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLDOWN;
		break;
	case PIN_CONFIG_DRIVE_PUSH_PULL:
	case PIN_CONFIG_PERSIST_STATE:
		break;
	default:
		return -ENOTSUPP;
	}

	return 0;
}

static int ljca_gpio_init_valid_mask(struct gpio_chip *chip,
				     unsigned long *valid_mask,
				     unsigned int ngpios)
{
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);

	WARN_ON_ONCE(ngpios != ljca_gpio->gpio_info->num);
	bitmap_copy(valid_mask, ljca_gpio->gpio_info->valid_pin_map, ngpios);

	return 0;
}

static void ljca_gpio_irq_init_valid_mask(struct gpio_chip *chip,
					  unsigned long *valid_mask,
					  unsigned int ngpios)
{
	ljca_gpio_init_valid_mask(chip, valid_mask, ngpios);
}

static int ljca_enable_irq(struct ljca_gpio_dev *ljca_gpio, int gpio_id,
			   bool enable)
{
	struct ljca_gpio_packet *packet =
			(struct ljca_gpio_packet *)ljca_gpio->obuf;
	int ret;

	mutex_lock(&ljca_gpio->trans_lock);
	packet->num = 1;
	packet->item[0].index = gpio_id;
	packet->item[0].value = 0;

	ret = ljca_transfer(ljca_gpio->ljca,
			    enable ? LJCA_GPIO_INT_UNMASK : LJCA_GPIO_INT_MASK,
			    (u8 *)packet, struct_size(packet, item, packet->num),
			    NULL, 0);
	mutex_unlock(&ljca_gpio->trans_lock);

	return ret < 0 ? ret : 0;
}

static void ljca_gpio_async(struct work_struct *work)
{
	struct ljca_gpio_dev *ljca_gpio =
			container_of(work, struct ljca_gpio_dev, work);
	int gpio_id, unmasked;

	for_each_set_bit(gpio_id, ljca_gpio->reenable_irqs, ljca_gpio->gc.ngpio) {
		clear_bit(gpio_id, ljca_gpio->reenable_irqs);
		unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);
		if (unmasked)
			ljca_enable_irq(ljca_gpio, gpio_id, true);
	}
}

static void ljca_gpio_event_cb(void *context, u8 cmd, const void *evt_data,
			       int len)
{
	const struct ljca_gpio_packet *packet = evt_data;
	struct ljca_gpio_dev *ljca_gpio = context;
	int i, irq;

	if (cmd != LJCA_GPIO_INT_EVENT)
		return;

	for (i = 0; i < packet->num; i++) {
		irq = irq_find_mapping(ljca_gpio->gc.irq.domain,
				       packet->item[i].index);
		if (!irq) {
			dev_err(ljca_gpio->gc.parent,
				"gpio_id %u does not mapped to IRQ yet\n",
				packet->item[i].index);
			return;
		}

		generic_handle_domain_irq(ljca_gpio->gc.irq.domain, irq);
		set_bit(packet->item[i].index, ljca_gpio->reenable_irqs);
	}

	schedule_work(&ljca_gpio->work);
}

static void ljca_irq_unmask(struct irq_data *irqd)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	int gpio_id = irqd_to_hwirq(irqd);

	gpiochip_enable_irq(gc, gpio_id);
	set_bit(gpio_id, ljca_gpio->unmasked_irqs);
}

static void ljca_irq_mask(struct irq_data *irqd)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	int gpio_id = irqd_to_hwirq(irqd);

	clear_bit(gpio_id, ljca_gpio->unmasked_irqs);
	gpiochip_disable_irq(gc, gpio_id);
}

static int ljca_irq_set_type(struct irq_data *irqd, unsigned int type)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	int gpio_id = irqd_to_hwirq(irqd);

	ljca_gpio->connect_mode[gpio_id] = LJCA_GPIO_CONF_INTERRUPT;
	switch (type) {
	case IRQ_TYPE_LEVEL_HIGH:
		ljca_gpio->connect_mode[gpio_id] |=
			(LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLUP);
		break;
	case IRQ_TYPE_LEVEL_LOW:
		ljca_gpio->connect_mode[gpio_id] |=
			(LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLDOWN);
		break;
	case IRQ_TYPE_EDGE_BOTH:
		break;
	case IRQ_TYPE_EDGE_RISING:
		ljca_gpio->connect_mode[gpio_id] |=
			(LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLUP);
		break;
	case IRQ_TYPE_EDGE_FALLING:
		ljca_gpio->connect_mode[gpio_id] |=
			(LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLDOWN);
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static void ljca_irq_bus_lock(struct irq_data *irqd)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);

	mutex_lock(&ljca_gpio->irq_lock);
}

static void ljca_irq_bus_unlock(struct irq_data *irqd)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	int gpio_id = irqd_to_hwirq(irqd);
	int enabled, unmasked;

	enabled = test_bit(gpio_id, ljca_gpio->enabled_irqs);
	unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);

	if (enabled != unmasked) {
		if (unmasked) {
			ljca_gpio_config(ljca_gpio, gpio_id, 0);
			ljca_enable_irq(ljca_gpio, gpio_id, true);
			set_bit(gpio_id, ljca_gpio->enabled_irqs);
		} else {
			ljca_enable_irq(ljca_gpio, gpio_id, false);
			clear_bit(gpio_id, ljca_gpio->enabled_irqs);
		}
	}

	mutex_unlock(&ljca_gpio->irq_lock);
}

static const struct irq_chip ljca_gpio_irqchip = {
	.name = "ljca-irq",
	.irq_mask = ljca_irq_mask,
	.irq_unmask = ljca_irq_unmask,
	.irq_set_type = ljca_irq_set_type,
	.irq_bus_lock = ljca_irq_bus_lock,
	.irq_bus_sync_unlock = ljca_irq_bus_unlock,
	.flags = IRQCHIP_IMMUTABLE,
	GPIOCHIP_IRQ_RESOURCE_HELPERS,
};

static int ljca_gpio_probe(struct auxiliary_device *auxdev,
			   const struct auxiliary_device_id *aux_dev_id)
{
	struct ljca_client *ljca = auxiliary_dev_to_ljca_client(auxdev);
	struct ljca_gpio_dev *ljca_gpio;
	struct gpio_irq_chip *girq;
	int ret;

	ljca_gpio = devm_kzalloc(&auxdev->dev, sizeof(*ljca_gpio), GFP_KERNEL);
	if (!ljca_gpio)
		return -ENOMEM;

	ljca_gpio->ljca = ljca;
	ljca_gpio->gpio_info = dev_get_platdata(&auxdev->dev);
	ljca_gpio->connect_mode = devm_kcalloc(&auxdev->dev,
					       ljca_gpio->gpio_info->num,
					       sizeof(*ljca_gpio->connect_mode),
					       GFP_KERNEL);
	if (!ljca_gpio->connect_mode)
		return -ENOMEM;

	mutex_init(&ljca_gpio->irq_lock);
	mutex_init(&ljca_gpio->trans_lock);
	ljca_gpio->gc.direction_input = ljca_gpio_direction_input;
	ljca_gpio->gc.direction_output = ljca_gpio_direction_output;
	ljca_gpio->gc.get_direction = ljca_gpio_get_direction;
	ljca_gpio->gc.get = ljca_gpio_get_value;
	ljca_gpio->gc.set = ljca_gpio_set_value;
	ljca_gpio->gc.set_config = ljca_gpio_set_config;
	ljca_gpio->gc.init_valid_mask = ljca_gpio_init_valid_mask;
	ljca_gpio->gc.can_sleep = true;
	ljca_gpio->gc.parent = &auxdev->dev;

	ljca_gpio->gc.base = -1;
	ljca_gpio->gc.ngpio = ljca_gpio->gpio_info->num;
	ljca_gpio->gc.label = ACPI_COMPANION(&auxdev->dev) ?
			      acpi_dev_name(ACPI_COMPANION(&auxdev->dev)) :
			      dev_name(&auxdev->dev);
	ljca_gpio->gc.owner = THIS_MODULE;

	auxiliary_set_drvdata(auxdev, ljca_gpio);
	ljca_register_event_cb(ljca, ljca_gpio_event_cb, ljca_gpio);

	girq = &ljca_gpio->gc.irq;
	gpio_irq_chip_set_chip(girq, &ljca_gpio_irqchip);
	girq->parent_handler = NULL;
	girq->num_parents = 0;
	girq->parents = NULL;
	girq->default_type = IRQ_TYPE_NONE;
	girq->handler = handle_simple_irq;
	girq->init_valid_mask = ljca_gpio_irq_init_valid_mask;

	INIT_WORK(&ljca_gpio->work, ljca_gpio_async);
	ret = gpiochip_add_data(&ljca_gpio->gc, ljca_gpio);
	if (ret) {
		ljca_unregister_event_cb(ljca);
		mutex_destroy(&ljca_gpio->irq_lock);
		mutex_destroy(&ljca_gpio->trans_lock);
	}

	return ret;
}

static void ljca_gpio_remove(struct auxiliary_device *auxdev)
{
	struct ljca_gpio_dev *ljca_gpio = auxiliary_get_drvdata(auxdev);

	gpiochip_remove(&ljca_gpio->gc);
	ljca_unregister_event_cb(ljca_gpio->ljca);
	cancel_work_sync(&ljca_gpio->work);
	mutex_destroy(&ljca_gpio->irq_lock);
	mutex_destroy(&ljca_gpio->trans_lock);
}

static const struct auxiliary_device_id ljca_gpio_id_table[] = {
	{ "usb_ljca.ljca-gpio", 0 },
	{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(auxiliary, ljca_gpio_id_table);

static struct auxiliary_driver ljca_gpio_driver = {
	.probe = ljca_gpio_probe,
	.remove = ljca_gpio_remove,
	.id_table = ljca_gpio_id_table,
};
module_auxiliary_driver(ljca_gpio_driver);

MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>");
MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>");
MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>");
MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-GPIO driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(LJCA);
Commit	Line	Data
c5a4b6fd YX	1	// SPDX-License-Identifier: GPL-2.0-only
	2	/*
	3	* Intel La Jolla Cove Adapter USB-GPIO driver
	4	*
	5	* Copyright (c) 2023, Intel Corporation.
	6	*/
	7
	8	#include <linux/acpi.h>
1034cc42	9	#include <linux/auxiliary_bus.h>
c5a4b6fd YX	10	#include <linux/bitfield.h>
	11	#include <linux/bitops.h>
	12	#include <linux/dev_printk.h>
	13	#include <linux/gpio/driver.h>
	14	#include <linux/irq.h>
	15	#include <linux/kernel.h>
	16	#include <linux/kref.h>
c5a4b6fd	17	#include <linux/module.h>
c5a4b6fd YX	18	#include <linux/slab.h>
c5a4b6fd YX	19	#include <linux/types.h>
1034cc42	20	#include <linux/usb/ljca.h>
c5a4b6fd YX	21
c5a4b6fd YX	22	/* GPIO commands */
1034cc42 WW	23	#define LJCA_GPIO_CONFIG 1
	24	#define LJCA_GPIO_READ 2
	25	#define LJCA_GPIO_WRITE 3
	26	#define LJCA_GPIO_INT_EVENT 4
	27	#define LJCA_GPIO_INT_MASK 5
	28	#define LJCA_GPIO_INT_UNMASK 6
c5a4b6fd YX	29
	30	#define LJCA_GPIO_CONF_DISABLE BIT(0)
	31	#define LJCA_GPIO_CONF_INPUT BIT(1)
	32	#define LJCA_GPIO_CONF_OUTPUT BIT(2)
	33	#define LJCA_GPIO_CONF_PULLUP BIT(3)
	34	#define LJCA_GPIO_CONF_PULLDOWN BIT(4)
	35	#define LJCA_GPIO_CONF_DEFAULT BIT(5)
	36	#define LJCA_GPIO_CONF_INTERRUPT BIT(6)
	37	#define LJCA_GPIO_INT_TYPE BIT(7)
	38
1034cc42 WW	39	#define LJCA_GPIO_CONF_EDGE FIELD_PREP(LJCA_GPIO_INT_TYPE, 1)
1034cc42 WW	40	#define LJCA_GPIO_CONF_LEVEL FIELD_PREP(LJCA_GPIO_INT_TYPE, 0)
c5a4b6fd YX	41
c5a4b6fd YX	42	/* Intentional overlap with PULLUP / PULLDOWN */
1034cc42 WW	43	#define LJCA_GPIO_CONF_SET BIT(3)
1034cc42 WW	44	#define LJCA_GPIO_CONF_CLR BIT(4)
c5a4b6fd	45
1034cc42 WW	46	#define LJCA_GPIO_BUF_SIZE 60u
	47
	48	struct ljca_gpio_op {
c5a4b6fd YX	49	u8 index;
	50	u8 value;
	51	} __packed;
	52
1034cc42	53	struct ljca_gpio_packet {
c5a4b6fd	54	u8 num;
1034cc42	55	struct ljca_gpio_op item[] __counted_by(num);
c5a4b6fd YX	56	} __packed;
c5a4b6fd YX	57
c5a4b6fd	58	struct ljca_gpio_dev {
1034cc42	59	struct ljca_client *ljca;
c5a4b6fd YX	60	struct gpio_chip gc;
	61	struct ljca_gpio_info *gpio_info;
	62	DECLARE_BITMAP(unmasked_irqs, LJCA_MAX_GPIO_NUM);
	63	DECLARE_BITMAP(enabled_irqs, LJCA_MAX_GPIO_NUM);
	64	DECLARE_BITMAP(reenable_irqs, LJCA_MAX_GPIO_NUM);
1034cc42	65	DECLARE_BITMAP(output_enabled, LJCA_MAX_GPIO_NUM);
c5a4b6fd	66	u8 *connect_mode;
1034cc42	67	/* protect irq bus */
c5a4b6fd YX	68	struct mutex irq_lock;
c5a4b6fd YX	69	struct work_struct work;
1034cc42	70	/* protect package transfer to hardware */
c5a4b6fd YX	71	struct mutex trans_lock;
	72
	73	u8 obuf[LJCA_GPIO_BUF_SIZE];
	74	u8 ibuf[LJCA_GPIO_BUF_SIZE];
	75	};
	76
1034cc42 WW	77	static int ljca_gpio_config(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id,
1034cc42 WW	78	u8 config)
c5a4b6fd	79	{
1034cc42 WW	80	struct ljca_gpio_packet *packet =
1034cc42 WW	81	(struct ljca_gpio_packet *)ljca_gpio->obuf;
c5a4b6fd YX	82	int ret;
	83
	84	mutex_lock(&ljca_gpio->trans_lock);
	85	packet->item[0].index = gpio_id;
	86	packet->item[0].value = config \| ljca_gpio->connect_mode[gpio_id];
	87	packet->num = 1;
	88
1034cc42 WW	89	ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_CONFIG, (u8 *)packet,
1034cc42 WW	90	struct_size(packet, item, packet->num), NULL, 0);
c5a4b6fd	91	mutex_unlock(&ljca_gpio->trans_lock);
1034cc42 WW	92
1034cc42 WW	93	return ret < 0 ? ret : 0;
c5a4b6fd YX	94	}
	95
	96	static int ljca_gpio_read(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id)
	97	{
1034cc42 WW	98	struct ljca_gpio_packet *ack_packet =
	99	(struct ljca_gpio_packet *)ljca_gpio->ibuf;
	100	struct ljca_gpio_packet *packet =
	101	(struct ljca_gpio_packet *)ljca_gpio->obuf;
c5a4b6fd YX	102	int ret;
	103
	104	mutex_lock(&ljca_gpio->trans_lock);
	105	packet->num = 1;
	106	packet->item[0].index = gpio_id;
1034cc42 WW	107	ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_READ, (u8 *)packet,
	108	struct_size(packet, item, packet->num),
	109	ljca_gpio->ibuf, LJCA_GPIO_BUF_SIZE);
	110
	111	if (ret <= 0 \|\| ack_packet->num != packet->num) {
	112	dev_err(&ljca_gpio->ljca->auxdev.dev,
	113	"read package error, gpio_id: %u num: %u ret: %d\n",
	114	gpio_id, ack_packet->num, ret);
	115	ret = ret < 0 ? ret : -EIO;
c5a4b6fd	116	}
c5a4b6fd	117	mutex_unlock(&ljca_gpio->trans_lock);
1034cc42 WW	118
1034cc42 WW	119	return ret < 0 ? ret : ack_packet->item[0].value > 0;
c5a4b6fd YX	120	}
c5a4b6fd YX	121
1034cc42	122	static int ljca_gpio_write(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, int value)
c5a4b6fd	123	{
1034cc42 WW	124	struct ljca_gpio_packet *packet =
1034cc42 WW	125	(struct ljca_gpio_packet *)ljca_gpio->obuf;
c5a4b6fd YX	126	int ret;
	127
	128	mutex_lock(&ljca_gpio->trans_lock);
	129	packet->num = 1;
	130	packet->item[0].index = gpio_id;
	131	packet->item[0].value = value & 1;
	132
1034cc42 WW	133	ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_WRITE, (u8 *)packet,
1034cc42 WW	134	struct_size(packet, item, packet->num), NULL, 0);
c5a4b6fd	135	mutex_unlock(&ljca_gpio->trans_lock);
1034cc42 WW	136
1034cc42 WW	137	return ret < 0 ? ret : 0;
c5a4b6fd YX	138	}
	139
	140	static int ljca_gpio_get_value(struct gpio_chip *chip, unsigned int offset)
	141	{
	142	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	143
	144	return ljca_gpio_read(ljca_gpio, offset);
	145	}
	146
	147	static void ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset,
	148	int val)
	149	{
	150	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	151	int ret;
	152
	153	ret = ljca_gpio_write(ljca_gpio, offset, val);
	154	if (ret)
1034cc42 WW	155	dev_err(chip->parent,
	156	"set value failed offset: %u val: %d ret: %d\n",
	157	offset, val, ret);
c5a4b6fd YX	158	}
c5a4b6fd YX	159
1034cc42	160	static int ljca_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
c5a4b6fd YX	161	{
	162	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	163	u8 config = LJCA_GPIO_CONF_INPUT \| LJCA_GPIO_CONF_CLR;
1034cc42	164	int ret;
c5a4b6fd	165
1034cc42 WW	166	ret = ljca_gpio_config(ljca_gpio, offset, config);
	167	if (ret)
	168	return ret;
	169
	170	clear_bit(offset, ljca_gpio->output_enabled);
	171
	172	return 0;
c5a4b6fd YX	173	}
	174
	175	static int ljca_gpio_direction_output(struct gpio_chip *chip,
	176	unsigned int offset, int val)
	177	{
	178	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	179	u8 config = LJCA_GPIO_CONF_OUTPUT \| LJCA_GPIO_CONF_CLR;
	180	int ret;
	181
1034cc42	182	ret = ljca_gpio_config(ljca_gpio, offset, config);
c5a4b6fd YX	183	if (ret)
	184	return ret;
	185
	186	ljca_gpio_set_value(chip, offset, val);
1034cc42 WW	187	set_bit(offset, ljca_gpio->output_enabled);
1034cc42 WW	188
c5a4b6fd YX	189	return 0;
	190	}
	191
1034cc42 WW	192	static int ljca_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
	193	{
	194	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	195
	196	if (test_bit(offset, ljca_gpio->output_enabled))
	197	return GPIO_LINE_DIRECTION_OUT;
	198
	199	return GPIO_LINE_DIRECTION_IN;
	200	}
	201
c5a4b6fd YX	202	static int ljca_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
	203	unsigned long config)
	204	{
	205	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	206
	207	ljca_gpio->connect_mode[offset] = 0;
	208	switch (pinconf_to_config_param(config)) {
	209	case PIN_CONFIG_BIAS_PULL_UP:
	210	ljca_gpio->connect_mode[offset] \|= LJCA_GPIO_CONF_PULLUP;
	211	break;
	212	case PIN_CONFIG_BIAS_PULL_DOWN:
	213	ljca_gpio->connect_mode[offset] \|= LJCA_GPIO_CONF_PULLDOWN;
	214	break;
	215	case PIN_CONFIG_DRIVE_PUSH_PULL:
	216	case PIN_CONFIG_PERSIST_STATE:
	217	break;
	218	default:
	219	return -ENOTSUPP;
	220	}
	221
	222	return 0;
	223	}
	224
1034cc42 WW	225	static int ljca_gpio_init_valid_mask(struct gpio_chip *chip,
1034cc42 WW	226	unsigned long *valid_mask,
c5a4b6fd YX	227	unsigned int ngpios)
	228	{
	229	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
	230
	231	WARN_ON_ONCE(ngpios != ljca_gpio->gpio_info->num);
	232	bitmap_copy(valid_mask, ljca_gpio->gpio_info->valid_pin_map, ngpios);
	233
	234	return 0;
	235	}
	236
1034cc42 WW	237	static void ljca_gpio_irq_init_valid_mask(struct gpio_chip *chip,
1034cc42 WW	238	unsigned long *valid_mask,
c5a4b6fd YX	239	unsigned int ngpios)
	240	{
	241	ljca_gpio_init_valid_mask(chip, valid_mask, ngpios);
	242	}
	243
1034cc42 WW	244	static int ljca_enable_irq(struct ljca_gpio_dev *ljca_gpio, int gpio_id,
1034cc42 WW	245	bool enable)
c5a4b6fd	246	{
1034cc42 WW	247	struct ljca_gpio_packet *packet =
1034cc42 WW	248	(struct ljca_gpio_packet *)ljca_gpio->obuf;
c5a4b6fd YX	249	int ret;
	250
	251	mutex_lock(&ljca_gpio->trans_lock);
	252	packet->num = 1;
	253	packet->item[0].index = gpio_id;
	254	packet->item[0].value = 0;
	255
1034cc42 WW	256	ret = ljca_transfer(ljca_gpio->ljca,
	257	enable ? LJCA_GPIO_INT_UNMASK : LJCA_GPIO_INT_MASK,
	258	(u8 *)packet, struct_size(packet, item, packet->num),
	259	NULL, 0);
c5a4b6fd	260	mutex_unlock(&ljca_gpio->trans_lock);
1034cc42 WW	261
1034cc42 WW	262	return ret < 0 ? ret : 0;
c5a4b6fd YX	263	}
	264
	265	static void ljca_gpio_async(struct work_struct *work)
	266	{
1034cc42 WW	267	struct ljca_gpio_dev *ljca_gpio =
	268	container_of(work, struct ljca_gpio_dev, work);
	269	int gpio_id, unmasked;
c5a4b6fd YX	270
	271	for_each_set_bit(gpio_id, ljca_gpio->reenable_irqs, ljca_gpio->gc.ngpio) {
	272	clear_bit(gpio_id, ljca_gpio->reenable_irqs);
	273	unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);
	274	if (unmasked)
	275	ljca_enable_irq(ljca_gpio, gpio_id, true);
	276	}
	277	}
	278
1034cc42 WW	279	static void ljca_gpio_event_cb(void context, u8 cmd, const void evt_data,
1034cc42 WW	280	int len)
c5a4b6fd	281	{
1034cc42	282	const struct ljca_gpio_packet *packet = evt_data;
c5a4b6fd	283	struct ljca_gpio_dev *ljca_gpio = context;
1034cc42	284	int i, irq;
c5a4b6fd YX	285
	286	if (cmd != LJCA_GPIO_INT_EVENT)
	287	return;
	288
	289	for (i = 0; i < packet->num; i++) {
1034cc42 WW	290	irq = irq_find_mapping(ljca_gpio->gc.irq.domain,
1034cc42 WW	291	packet->item[i].index);
c5a4b6fd	292	if (!irq) {
1034cc42 WW	293	dev_err(ljca_gpio->gc.parent,
1034cc42 WW	294	"gpio_id %u does not mapped to IRQ yet\n",
c5a4b6fd YX	295	packet->item[i].index);
	296	return;
	297	}
	298
	299	generic_handle_domain_irq(ljca_gpio->gc.irq.domain, irq);
	300	set_bit(packet->item[i].index, ljca_gpio->reenable_irqs);
	301	}
	302
	303	schedule_work(&ljca_gpio->work);
	304	}
	305
	306	static void ljca_irq_unmask(struct irq_data *irqd)
	307	{
	308	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	309	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	310	int gpio_id = irqd_to_hwirq(irqd);
	311
	312	gpiochip_enable_irq(gc, gpio_id);
	313	set_bit(gpio_id, ljca_gpio->unmasked_irqs);
	314	}
	315
	316	static void ljca_irq_mask(struct irq_data *irqd)
	317	{
	318	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	319	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	320	int gpio_id = irqd_to_hwirq(irqd);
	321
	322	clear_bit(gpio_id, ljca_gpio->unmasked_irqs);
	323	gpiochip_disable_irq(gc, gpio_id);
	324	}
	325
	326	static int ljca_irq_set_type(struct irq_data *irqd, unsigned int type)
	327	{
	328	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	329	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	330	int gpio_id = irqd_to_hwirq(irqd);
	331
	332	ljca_gpio->connect_mode[gpio_id] = LJCA_GPIO_CONF_INTERRUPT;
	333	switch (type) {
	334	case IRQ_TYPE_LEVEL_HIGH:
1034cc42 WW	335	ljca_gpio->connect_mode[gpio_id] \|=
1034cc42 WW	336	(LJCA_GPIO_CONF_LEVEL \| LJCA_GPIO_CONF_PULLUP);
c5a4b6fd YX	337	break;
c5a4b6fd YX	338	case IRQ_TYPE_LEVEL_LOW:
1034cc42 WW	339	ljca_gpio->connect_mode[gpio_id] \|=
1034cc42 WW	340	(LJCA_GPIO_CONF_LEVEL \| LJCA_GPIO_CONF_PULLDOWN);
c5a4b6fd YX	341	break;
	342	case IRQ_TYPE_EDGE_BOTH:
	343	break;
	344	case IRQ_TYPE_EDGE_RISING:
1034cc42 WW	345	ljca_gpio->connect_mode[gpio_id] \|=
1034cc42 WW	346	(LJCA_GPIO_CONF_EDGE \| LJCA_GPIO_CONF_PULLUP);
c5a4b6fd YX	347	break;
c5a4b6fd YX	348	case IRQ_TYPE_EDGE_FALLING:
1034cc42 WW	349	ljca_gpio->connect_mode[gpio_id] \|=
1034cc42 WW	350	(LJCA_GPIO_CONF_EDGE \| LJCA_GPIO_CONF_PULLDOWN);
c5a4b6fd YX	351	break;
	352	default:
	353	return -EINVAL;
	354	}
	355
	356	return 0;
	357	}
	358
	359	static void ljca_irq_bus_lock(struct irq_data *irqd)
	360	{
	361	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	362	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	363
	364	mutex_lock(&ljca_gpio->irq_lock);
	365	}
	366
	367	static void ljca_irq_bus_unlock(struct irq_data *irqd)
	368	{
	369	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
	370	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
	371	int gpio_id = irqd_to_hwirq(irqd);
1034cc42	372	int enabled, unmasked;
c5a4b6fd YX	373
	374	enabled = test_bit(gpio_id, ljca_gpio->enabled_irqs);
	375	unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);
	376
	377	if (enabled != unmasked) {
	378	if (unmasked) {
1034cc42	379	ljca_gpio_config(ljca_gpio, gpio_id, 0);
c5a4b6fd YX	380	ljca_enable_irq(ljca_gpio, gpio_id, true);
	381	set_bit(gpio_id, ljca_gpio->enabled_irqs);
	382	} else {
	383	ljca_enable_irq(ljca_gpio, gpio_id, false);
	384	clear_bit(gpio_id, ljca_gpio->enabled_irqs);
	385	}
	386	}
	387
	388	mutex_unlock(&ljca_gpio->irq_lock);
	389	}
	390
	391	static const struct irq_chip ljca_gpio_irqchip = {
	392	.name = "ljca-irq",
	393	.irq_mask = ljca_irq_mask,
	394	.irq_unmask = ljca_irq_unmask,
	395	.irq_set_type = ljca_irq_set_type,
	396	.irq_bus_lock = ljca_irq_bus_lock,
	397	.irq_bus_sync_unlock = ljca_irq_bus_unlock,
	398	.flags = IRQCHIP_IMMUTABLE,
	399	GPIOCHIP_IRQ_RESOURCE_HELPERS,
	400	};
	401
1034cc42 WW	402	static int ljca_gpio_probe(struct auxiliary_device *auxdev,
1034cc42 WW	403	const struct auxiliary_device_id *aux_dev_id)
c5a4b6fd	404	{
1034cc42	405	struct ljca_client *ljca = auxiliary_dev_to_ljca_client(auxdev);
c5a4b6fd YX	406	struct ljca_gpio_dev *ljca_gpio;
	407	struct gpio_irq_chip *girq;
	408	int ret;
	409
1034cc42	410	ljca_gpio = devm_kzalloc(&auxdev->dev, sizeof(*ljca_gpio), GFP_KERNEL);
c5a4b6fd YX	411	if (!ljca_gpio)
	412	return -ENOMEM;
	413
1034cc42 WW	414	ljca_gpio->ljca = ljca;
	415	ljca_gpio->gpio_info = dev_get_platdata(&auxdev->dev);
	416	ljca_gpio->connect_mode = devm_kcalloc(&auxdev->dev,
	417	ljca_gpio->gpio_info->num,
	418	sizeof(*ljca_gpio->connect_mode),
	419	GFP_KERNEL);
c5a4b6fd YX	420	if (!ljca_gpio->connect_mode)
	421	return -ENOMEM;
	422
	423	mutex_init(&ljca_gpio->irq_lock);
	424	mutex_init(&ljca_gpio->trans_lock);
c5a4b6fd YX	425	ljca_gpio->gc.direction_input = ljca_gpio_direction_input;
c5a4b6fd YX	426	ljca_gpio->gc.direction_output = ljca_gpio_direction_output;
1034cc42	427	ljca_gpio->gc.get_direction = ljca_gpio_get_direction;
c5a4b6fd YX	428	ljca_gpio->gc.get = ljca_gpio_get_value;
	429	ljca_gpio->gc.set = ljca_gpio_set_value;
	430	ljca_gpio->gc.set_config = ljca_gpio_set_config;
	431	ljca_gpio->gc.init_valid_mask = ljca_gpio_init_valid_mask;
	432	ljca_gpio->gc.can_sleep = true;
1034cc42	433	ljca_gpio->gc.parent = &auxdev->dev;
c5a4b6fd YX	434
	435	ljca_gpio->gc.base = -1;
	436	ljca_gpio->gc.ngpio = ljca_gpio->gpio_info->num;
1034cc42 WW	437	ljca_gpio->gc.label = ACPI_COMPANION(&auxdev->dev) ?
	438	acpi_dev_name(ACPI_COMPANION(&auxdev->dev)) :
	439	dev_name(&auxdev->dev);
c5a4b6fd YX	440	ljca_gpio->gc.owner = THIS_MODULE;
c5a4b6fd YX	441
1034cc42 WW	442	auxiliary_set_drvdata(auxdev, ljca_gpio);
1034cc42 WW	443	ljca_register_event_cb(ljca, ljca_gpio_event_cb, ljca_gpio);
c5a4b6fd YX	444
	445	girq = &ljca_gpio->gc.irq;
	446	gpio_irq_chip_set_chip(girq, &ljca_gpio_irqchip);
	447	girq->parent_handler = NULL;
	448	girq->num_parents = 0;
	449	girq->parents = NULL;
	450	girq->default_type = IRQ_TYPE_NONE;
	451	girq->handler = handle_simple_irq;
	452	girq->init_valid_mask = ljca_gpio_irq_init_valid_mask;
	453
	454	INIT_WORK(&ljca_gpio->work, ljca_gpio_async);
	455	ret = gpiochip_add_data(&ljca_gpio->gc, ljca_gpio);
	456	if (ret) {
1034cc42	457	ljca_unregister_event_cb(ljca);
c5a4b6fd YX	458	mutex_destroy(&ljca_gpio->irq_lock);
	459	mutex_destroy(&ljca_gpio->trans_lock);
	460	}
	461
	462	return ret;
	463	}
	464
1034cc42	465	static void ljca_gpio_remove(struct auxiliary_device *auxdev)
c5a4b6fd	466	{
1034cc42	467	struct ljca_gpio_dev *ljca_gpio = auxiliary_get_drvdata(auxdev);
c5a4b6fd YX	468
c5a4b6fd YX	469	gpiochip_remove(&ljca_gpio->gc);
1034cc42 WW	470	ljca_unregister_event_cb(ljca_gpio->ljca);
1034cc42 WW	471	cancel_work_sync(&ljca_gpio->work);
c5a4b6fd YX	472	mutex_destroy(&ljca_gpio->irq_lock);
c5a4b6fd YX	473	mutex_destroy(&ljca_gpio->trans_lock);
c5a4b6fd YX	474	}
c5a4b6fd YX	475
1034cc42 WW	476	static const struct auxiliary_device_id ljca_gpio_id_table[] = {
	477	{ "usb_ljca.ljca-gpio", 0 },
	478	{ /* sentinel */ },
c5a4b6fd	479	};
1034cc42	480	MODULE_DEVICE_TABLE(auxiliary, ljca_gpio_id_table);
c5a4b6fd	481
1034cc42	482	static struct auxiliary_driver ljca_gpio_driver = {
c5a4b6fd YX	483	.probe = ljca_gpio_probe,
c5a4b6fd YX	484	.remove = ljca_gpio_remove,
1034cc42	485	.id_table = ljca_gpio_id_table,
c5a4b6fd	486	};
1034cc42	487	module_auxiliary_driver(ljca_gpio_driver);
c5a4b6fd	488
1034cc42 WW	489	MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>");
	490	MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>");
	491	MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>");
c5a4b6fd YX	492	MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-GPIO driver");
	493	MODULE_LICENSE("GPL");
	494	MODULE_IMPORT_NS(LJCA);