gpio: cs5535: use gpiochip data pointer
[linux-2.6-block.git] / drivers / gpio / gpio-da9052.c
CommitLineData
07bfc915 1/*
2 * GPIO Driver for Dialog DA9052 PMICs.
3 *
4 * Copyright(c) 2011 Dialog Semiconductor Ltd.
5 *
6 * Author: David Dajun Chen <dchen@diasemi.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14#include <linux/module.h>
15#include <linux/fs.h>
16#include <linux/uaccess.h>
17#include <linux/platform_device.h>
18#include <linux/gpio.h>
19#include <linux/syscalls.h>
20#include <linux/seq_file.h>
21
22#include <linux/mfd/da9052/da9052.h>
23#include <linux/mfd/da9052/reg.h>
24#include <linux/mfd/da9052/pdata.h>
07bfc915 25
26#define DA9052_INPUT 1
27#define DA9052_OUTPUT_OPENDRAIN 2
28#define DA9052_OUTPUT_PUSHPULL 3
29
30#define DA9052_SUPPLY_VDD_IO1 0
31
32#define DA9052_DEBOUNCING_OFF 0
33#define DA9052_DEBOUNCING_ON 1
34
35#define DA9052_OUTPUT_LOWLEVEL 0
36
37#define DA9052_ACTIVE_LOW 0
38#define DA9052_ACTIVE_HIGH 1
39
40#define DA9052_GPIO_MAX_PORTS_PER_REGISTER 8
41#define DA9052_GPIO_SHIFT_COUNT(no) (no%8)
42#define DA9052_GPIO_MASK_UPPER_NIBBLE 0xF0
43#define DA9052_GPIO_MASK_LOWER_NIBBLE 0x0F
44#define DA9052_GPIO_NIBBLE_SHIFT 4
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45#define DA9052_IRQ_GPI0 16
46#define DA9052_GPIO_ODD_SHIFT 7
47#define DA9052_GPIO_EVEN_SHIFT 3
07bfc915 48
49struct da9052_gpio {
50 struct da9052 *da9052;
51 struct gpio_chip gp;
52};
53
54static inline struct da9052_gpio *to_da9052_gpio(struct gpio_chip *chip)
55{
56 return container_of(chip, struct da9052_gpio, gp);
57}
58
59static unsigned char da9052_gpio_port_odd(unsigned offset)
60{
61 return offset % 2;
62}
63
64static int da9052_gpio_get(struct gpio_chip *gc, unsigned offset)
65{
66 struct da9052_gpio *gpio = to_da9052_gpio(gc);
67 int da9052_port_direction = 0;
68 int ret;
69
70 ret = da9052_reg_read(gpio->da9052,
71 DA9052_GPIO_0_1_REG + (offset >> 1));
72 if (ret < 0)
73 return ret;
74
75 if (da9052_gpio_port_odd(offset)) {
76 da9052_port_direction = ret & DA9052_GPIO_ODD_PORT_PIN;
77 da9052_port_direction >>= 4;
78 } else {
79 da9052_port_direction = ret & DA9052_GPIO_EVEN_PORT_PIN;
80 }
81
82 switch (da9052_port_direction) {
83 case DA9052_INPUT:
84 if (offset < DA9052_GPIO_MAX_PORTS_PER_REGISTER)
85 ret = da9052_reg_read(gpio->da9052,
86 DA9052_STATUS_C_REG);
87 else
88 ret = da9052_reg_read(gpio->da9052,
89 DA9052_STATUS_D_REG);
90 if (ret < 0)
91 return ret;
1f66adfb 92 return !!(ret & (1 << DA9052_GPIO_SHIFT_COUNT(offset)));
07bfc915 93 case DA9052_OUTPUT_PUSHPULL:
94 if (da9052_gpio_port_odd(offset))
1f66adfb 95 return !!(ret & DA9052_GPIO_ODD_PORT_MODE);
07bfc915 96 else
1f66adfb 97 return !!(ret & DA9052_GPIO_EVEN_PORT_MODE);
07bfc915 98 default:
99 return -EINVAL;
100 }
101}
102
103static void da9052_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
104{
105 struct da9052_gpio *gpio = to_da9052_gpio(gc);
07bfc915 106 int ret;
107
108 if (da9052_gpio_port_odd(offset)) {
07bfc915 109 ret = da9052_reg_update(gpio->da9052, (offset >> 1) +
110 DA9052_GPIO_0_1_REG,
111 DA9052_GPIO_ODD_PORT_MODE,
87b9b0e0 112 value << DA9052_GPIO_ODD_SHIFT);
07bfc915 113 if (ret != 0)
114 dev_err(gpio->da9052->dev,
115 "Failed to updated gpio odd reg,%d",
116 ret);
07bfc915 117 } else {
07bfc915 118 ret = da9052_reg_update(gpio->da9052, (offset >> 1) +
119 DA9052_GPIO_0_1_REG,
120 DA9052_GPIO_EVEN_PORT_MODE,
87b9b0e0 121 value << DA9052_GPIO_EVEN_SHIFT);
07bfc915 122 if (ret != 0)
123 dev_err(gpio->da9052->dev,
124 "Failed to updated gpio even reg,%d",
125 ret);
07bfc915 126 }
127}
128
129static int da9052_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
130{
131 struct da9052_gpio *gpio = to_da9052_gpio(gc);
132 unsigned char register_value;
133 int ret;
134
135 /* Format: function - 2 bits type - 1 bit mode - 1 bit */
136 register_value = DA9052_INPUT | DA9052_ACTIVE_LOW << 2 |
137 DA9052_DEBOUNCING_ON << 3;
138
139 if (da9052_gpio_port_odd(offset))
140 ret = da9052_reg_update(gpio->da9052, (offset >> 1) +
141 DA9052_GPIO_0_1_REG,
142 DA9052_GPIO_MASK_UPPER_NIBBLE,
143 (register_value <<
144 DA9052_GPIO_NIBBLE_SHIFT));
145 else
146 ret = da9052_reg_update(gpio->da9052, (offset >> 1) +
147 DA9052_GPIO_0_1_REG,
148 DA9052_GPIO_MASK_LOWER_NIBBLE,
149 register_value);
150
151 return ret;
152}
153
154static int da9052_gpio_direction_output(struct gpio_chip *gc,
155 unsigned offset, int value)
156{
157 struct da9052_gpio *gpio = to_da9052_gpio(gc);
158 unsigned char register_value;
159 int ret;
160
161 /* Format: Function - 2 bits Type - 1 bit Mode - 1 bit */
162 register_value = DA9052_OUTPUT_PUSHPULL | DA9052_SUPPLY_VDD_IO1 << 2 |
163 value << 3;
164
165 if (da9052_gpio_port_odd(offset))
166 ret = da9052_reg_update(gpio->da9052, (offset >> 1) +
167 DA9052_GPIO_0_1_REG,
168 DA9052_GPIO_MASK_UPPER_NIBBLE,
169 (register_value <<
170 DA9052_GPIO_NIBBLE_SHIFT));
171 else
172 ret = da9052_reg_update(gpio->da9052, (offset >> 1) +
173 DA9052_GPIO_0_1_REG,
174 DA9052_GPIO_MASK_LOWER_NIBBLE,
175 register_value);
176
177 return ret;
178}
179
180static int da9052_gpio_to_irq(struct gpio_chip *gc, u32 offset)
181{
182 struct da9052_gpio *gpio = to_da9052_gpio(gc);
183 struct da9052 *da9052 = gpio->da9052;
184
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185 int irq;
186
187 irq = regmap_irq_get_virq(da9052->irq_data, DA9052_IRQ_GPI0 + offset);
188
189 return irq;
07bfc915 190}
191
aeca8ad1 192static struct gpio_chip reference_gp = {
07bfc915 193 .label = "da9052-gpio",
194 .owner = THIS_MODULE,
195 .get = da9052_gpio_get,
196 .set = da9052_gpio_set,
197 .direction_input = da9052_gpio_direction_input,
198 .direction_output = da9052_gpio_direction_output,
199 .to_irq = da9052_gpio_to_irq,
9fb1f39e 200 .can_sleep = true,
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201 .ngpio = 16,
202 .base = -1,
07bfc915 203};
204
3836309d 205static int da9052_gpio_probe(struct platform_device *pdev)
07bfc915 206{
207 struct da9052_gpio *gpio;
208 struct da9052_pdata *pdata;
209 int ret;
210
eb7cf95a 211 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
afeb7b45 212 if (!gpio)
07bfc915 213 return -ENOMEM;
214
215 gpio->da9052 = dev_get_drvdata(pdev->dev.parent);
e56aee18 216 pdata = dev_get_platdata(gpio->da9052->dev);
07bfc915 217
07bfc915 218 gpio->gp = reference_gp;
219 if (pdata && pdata->gpio_base)
220 gpio->gp.base = pdata->gpio_base;
221
222 ret = gpiochip_add(&gpio->gp);
223 if (ret < 0) {
224 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
eb7cf95a 225 return ret;
07bfc915 226 }
227
228 platform_set_drvdata(pdev, gpio);
229
230 return 0;
07bfc915 231}
232
206210ce 233static int da9052_gpio_remove(struct platform_device *pdev)
07bfc915 234{
235 struct da9052_gpio *gpio = platform_get_drvdata(pdev);
07bfc915 236
9f5132ae 237 gpiochip_remove(&gpio->gp);
238 return 0;
07bfc915 239}
240
241static struct platform_driver da9052_gpio_driver = {
242 .probe = da9052_gpio_probe,
8283c4ff 243 .remove = da9052_gpio_remove,
07bfc915 244 .driver = {
245 .name = "da9052-gpio",
07bfc915 246 },
247};
248
6f61415e 249module_platform_driver(da9052_gpio_driver);
07bfc915 250
251MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
252MODULE_DESCRIPTION("DA9052 GPIO Device Driver");
253MODULE_LICENSE("GPL");
254MODULE_ALIAS("platform:da9052-gpio");