Commit | Line | Data |
---|---|---|
80884094 MH |
1 | /* |
2 | * GPIO Chip driver for Analog Devices | |
459773ae | 3 | * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller |
80884094 | 4 | * |
459773ae | 5 | * Copyright 2009-2010 Analog Devices Inc. |
80884094 MH |
6 | * |
7 | * Licensed under the GPL-2 or later. | |
8 | */ | |
9 | ||
10 | #include <linux/module.h> | |
11 | #include <linux/kernel.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
80884094 MH |
13 | #include <linux/init.h> |
14 | #include <linux/i2c.h> | |
d543668a | 15 | #include <linux/gpio/driver.h> |
459773ae MH |
16 | #include <linux/interrupt.h> |
17 | #include <linux/irq.h> | |
9f22af11 | 18 | #include <linux/of_device.h> |
80884094 | 19 | |
c1a46340 | 20 | #include <linux/platform_data/adp5588.h> |
80884094 | 21 | |
459773ae MH |
22 | #define DRV_NAME "adp5588-gpio" |
23 | ||
24 | /* | |
25 | * Early pre 4.0 Silicon required to delay readout by at least 25ms, | |
26 | * since the Event Counter Register updated 25ms after the interrupt | |
27 | * asserted. | |
28 | */ | |
29 | #define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4) | |
80884094 MH |
30 | |
31 | struct adp5588_gpio { | |
32 | struct i2c_client *client; | |
33 | struct gpio_chip gpio_chip; | |
34 | struct mutex lock; /* protect cached dir, dat_out */ | |
459773ae MH |
35 | /* protect serialized access to the interrupt controller bus */ |
36 | struct mutex irq_lock; | |
80884094 MH |
37 | uint8_t dat_out[3]; |
38 | uint8_t dir[3]; | |
459773ae MH |
39 | uint8_t int_lvl[3]; |
40 | uint8_t int_en[3]; | |
41 | uint8_t irq_mask[3]; | |
42 | uint8_t irq_stat[3]; | |
6537886c MH |
43 | uint8_t int_input_en[3]; |
44 | uint8_t int_lvl_cached[3]; | |
80884094 MH |
45 | }; |
46 | ||
47 | static int adp5588_gpio_read(struct i2c_client *client, u8 reg) | |
48 | { | |
49 | int ret = i2c_smbus_read_byte_data(client, reg); | |
50 | ||
51 | if (ret < 0) | |
52 | dev_err(&client->dev, "Read Error\n"); | |
53 | ||
54 | return ret; | |
55 | } | |
56 | ||
57 | static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val) | |
58 | { | |
59 | int ret = i2c_smbus_write_byte_data(client, reg, val); | |
60 | ||
61 | if (ret < 0) | |
62 | dev_err(&client->dev, "Write Error\n"); | |
63 | ||
64 | return ret; | |
65 | } | |
66 | ||
67 | static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) | |
68 | { | |
f69255ce | 69 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
992196f2 JFD |
70 | unsigned bank = ADP5588_BANK(off); |
71 | unsigned bit = ADP5588_BIT(off); | |
72 | int val; | |
80884094 | 73 | |
992196f2 JFD |
74 | mutex_lock(&dev->lock); |
75 | ||
76 | if (dev->dir[bank] & bit) | |
77 | val = dev->dat_out[bank]; | |
78 | else | |
79 | val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank); | |
80 | ||
81 | mutex_unlock(&dev->lock); | |
82 | ||
83 | return !!(val & bit); | |
80884094 MH |
84 | } |
85 | ||
86 | static void adp5588_gpio_set_value(struct gpio_chip *chip, | |
87 | unsigned off, int val) | |
88 | { | |
89 | unsigned bank, bit; | |
f69255ce | 90 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
80884094 | 91 | |
459773ae MH |
92 | bank = ADP5588_BANK(off); |
93 | bit = ADP5588_BIT(off); | |
80884094 MH |
94 | |
95 | mutex_lock(&dev->lock); | |
96 | if (val) | |
97 | dev->dat_out[bank] |= bit; | |
98 | else | |
99 | dev->dat_out[bank] &= ~bit; | |
100 | ||
101 | adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, | |
102 | dev->dat_out[bank]); | |
103 | mutex_unlock(&dev->lock); | |
104 | } | |
105 | ||
106 | static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off) | |
107 | { | |
108 | int ret; | |
109 | unsigned bank; | |
f69255ce | 110 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
80884094 | 111 | |
459773ae | 112 | bank = ADP5588_BANK(off); |
80884094 MH |
113 | |
114 | mutex_lock(&dev->lock); | |
459773ae | 115 | dev->dir[bank] &= ~ADP5588_BIT(off); |
80884094 MH |
116 | ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]); |
117 | mutex_unlock(&dev->lock); | |
118 | ||
119 | return ret; | |
120 | } | |
121 | ||
122 | static int adp5588_gpio_direction_output(struct gpio_chip *chip, | |
123 | unsigned off, int val) | |
124 | { | |
125 | int ret; | |
126 | unsigned bank, bit; | |
f69255ce | 127 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
80884094 | 128 | |
459773ae MH |
129 | bank = ADP5588_BANK(off); |
130 | bit = ADP5588_BIT(off); | |
80884094 MH |
131 | |
132 | mutex_lock(&dev->lock); | |
133 | dev->dir[bank] |= bit; | |
134 | ||
135 | if (val) | |
136 | dev->dat_out[bank] |= bit; | |
137 | else | |
138 | dev->dat_out[bank] &= ~bit; | |
139 | ||
140 | ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, | |
141 | dev->dat_out[bank]); | |
142 | ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, | |
143 | dev->dir[bank]); | |
144 | mutex_unlock(&dev->lock); | |
145 | ||
146 | return ret; | |
147 | } | |
148 | ||
459773ae | 149 | #ifdef CONFIG_GPIO_ADP5588_IRQ |
459773ae | 150 | |
12401eed | 151 | static void adp5588_irq_bus_lock(struct irq_data *d) |
459773ae | 152 | { |
9f22af11 NV |
153 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
154 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
12401eed | 155 | |
459773ae MH |
156 | mutex_lock(&dev->irq_lock); |
157 | } | |
158 | ||
159 | /* | |
160 | * genirq core code can issue chip->mask/unmask from atomic context. | |
161 | * This doesn't work for slow busses where an access needs to sleep. | |
162 | * bus_sync_unlock() is therefore called outside the atomic context, | |
163 | * syncs the current irq mask state with the slow external controller | |
164 | * and unlocks the bus. | |
165 | */ | |
166 | ||
12401eed | 167 | static void adp5588_irq_bus_sync_unlock(struct irq_data *d) |
459773ae | 168 | { |
9f22af11 NV |
169 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
170 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
459773ae MH |
171 | int i; |
172 | ||
6537886c MH |
173 | for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { |
174 | if (dev->int_input_en[i]) { | |
175 | mutex_lock(&dev->lock); | |
176 | dev->dir[i] &= ~dev->int_input_en[i]; | |
177 | dev->int_input_en[i] = 0; | |
178 | adp5588_gpio_write(dev->client, GPIO_DIR1 + i, | |
179 | dev->dir[i]); | |
180 | mutex_unlock(&dev->lock); | |
181 | } | |
182 | ||
183 | if (dev->int_lvl_cached[i] != dev->int_lvl[i]) { | |
184 | dev->int_lvl_cached[i] = dev->int_lvl[i]; | |
185 | adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + i, | |
186 | dev->int_lvl[i]); | |
187 | } | |
188 | ||
459773ae MH |
189 | if (dev->int_en[i] ^ dev->irq_mask[i]) { |
190 | dev->int_en[i] = dev->irq_mask[i]; | |
191 | adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i, | |
192 | dev->int_en[i]); | |
193 | } | |
6537886c | 194 | } |
459773ae MH |
195 | |
196 | mutex_unlock(&dev->irq_lock); | |
197 | } | |
198 | ||
12401eed | 199 | static void adp5588_irq_mask(struct irq_data *d) |
459773ae | 200 | { |
9f22af11 NV |
201 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
202 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
459773ae | 203 | |
9f22af11 | 204 | dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq); |
459773ae MH |
205 | } |
206 | ||
12401eed | 207 | static void adp5588_irq_unmask(struct irq_data *d) |
459773ae | 208 | { |
9f22af11 NV |
209 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
210 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
459773ae | 211 | |
9f22af11 | 212 | dev->irq_mask[ADP5588_BANK(d->hwirq)] |= ADP5588_BIT(d->hwirq); |
459773ae MH |
213 | } |
214 | ||
12401eed | 215 | static int adp5588_irq_set_type(struct irq_data *d, unsigned int type) |
459773ae | 216 | { |
9f22af11 NV |
217 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
218 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
219 | uint16_t gpio = d->hwirq; | |
459773ae MH |
220 | unsigned bank, bit; |
221 | ||
222 | if ((type & IRQ_TYPE_EDGE_BOTH)) { | |
223 | dev_err(&dev->client->dev, "irq %d: unsupported type %d\n", | |
12401eed | 224 | d->irq, type); |
459773ae MH |
225 | return -EINVAL; |
226 | } | |
227 | ||
228 | bank = ADP5588_BANK(gpio); | |
229 | bit = ADP5588_BIT(gpio); | |
230 | ||
231 | if (type & IRQ_TYPE_LEVEL_HIGH) | |
232 | dev->int_lvl[bank] |= bit; | |
233 | else if (type & IRQ_TYPE_LEVEL_LOW) | |
234 | dev->int_lvl[bank] &= ~bit; | |
235 | else | |
236 | return -EINVAL; | |
237 | ||
6537886c | 238 | dev->int_input_en[bank] |= bit; |
459773ae MH |
239 | |
240 | return 0; | |
241 | } | |
242 | ||
243 | static struct irq_chip adp5588_irq_chip = { | |
244 | .name = "adp5588", | |
12401eed LB |
245 | .irq_mask = adp5588_irq_mask, |
246 | .irq_unmask = adp5588_irq_unmask, | |
247 | .irq_bus_lock = adp5588_irq_bus_lock, | |
248 | .irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock, | |
249 | .irq_set_type = adp5588_irq_set_type, | |
459773ae MH |
250 | }; |
251 | ||
252 | static int adp5588_gpio_read_intstat(struct i2c_client *client, u8 *buf) | |
253 | { | |
254 | int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf); | |
255 | ||
256 | if (ret < 0) | |
257 | dev_err(&client->dev, "Read INT_STAT Error\n"); | |
258 | ||
259 | return ret; | |
260 | } | |
261 | ||
262 | static irqreturn_t adp5588_irq_handler(int irq, void *devid) | |
263 | { | |
264 | struct adp5588_gpio *dev = devid; | |
265 | unsigned status, bank, bit, pending; | |
266 | int ret; | |
267 | status = adp5588_gpio_read(dev->client, INT_STAT); | |
268 | ||
269 | if (status & ADP5588_GPI_INT) { | |
270 | ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat); | |
271 | if (ret < 0) | |
272 | memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat)); | |
273 | ||
078dc65e | 274 | for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO); |
459773ae MH |
275 | bank++, bit = 0) { |
276 | pending = dev->irq_stat[bank] & dev->irq_mask[bank]; | |
277 | ||
278 | while (pending) { | |
279 | if (pending & (1 << bit)) { | |
9f22af11 NV |
280 | handle_nested_irq( |
281 | irq_find_mapping( | |
282 | dev->gpio_chip.irq.domain, | |
283 | (bank << 3) + bit)); | |
459773ae | 284 | pending &= ~(1 << bit); |
459773ae MH |
285 | } |
286 | bit++; | |
287 | } | |
288 | } | |
289 | } | |
290 | ||
291 | adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */ | |
292 | ||
293 | return IRQ_HANDLED; | |
294 | } | |
295 | ||
296 | static int adp5588_irq_setup(struct adp5588_gpio *dev) | |
297 | { | |
298 | struct i2c_client *client = dev->client; | |
9f22af11 | 299 | int ret; |
e56aee18 JH |
300 | struct adp5588_gpio_platform_data *pdata = |
301 | dev_get_platdata(&client->dev); | |
9f22af11 | 302 | int irq_base = pdata ? pdata->irq_base : 0; |
459773ae MH |
303 | |
304 | adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC); | |
305 | adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */ | |
306 | adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */ | |
307 | ||
459773ae MH |
308 | mutex_init(&dev->irq_lock); |
309 | ||
9f22af11 NV |
310 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
311 | NULL, adp5588_irq_handler, IRQF_ONESHOT | |
312 | | IRQF_TRIGGER_FALLING | IRQF_SHARED, | |
313 | dev_name(&client->dev), dev); | |
459773ae MH |
314 | if (ret) { |
315 | dev_err(&client->dev, "failed to request irq %d\n", | |
316 | client->irq); | |
9f22af11 NV |
317 | return ret; |
318 | } | |
319 | ret = gpiochip_irqchip_add_nested(&dev->gpio_chip, | |
320 | &adp5588_irq_chip, irq_base, | |
321 | handle_simple_irq, | |
322 | IRQ_TYPE_NONE); | |
323 | if (ret) { | |
324 | dev_err(&client->dev, | |
325 | "could not connect irqchip to gpiochip\n"); | |
326 | return ret; | |
459773ae | 327 | } |
9f22af11 NV |
328 | gpiochip_set_nested_irqchip(&dev->gpio_chip, |
329 | &adp5588_irq_chip, | |
330 | client->irq); | |
459773ae | 331 | |
459773ae MH |
332 | adp5588_gpio_write(client, CFG, |
333 | ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_GPI_INT); | |
334 | ||
335 | return 0; | |
459773ae MH |
336 | } |
337 | ||
338 | #else | |
339 | static int adp5588_irq_setup(struct adp5588_gpio *dev) | |
340 | { | |
341 | struct i2c_client *client = dev->client; | |
342 | dev_warn(&client->dev, "interrupt support not compiled in\n"); | |
343 | ||
344 | return 0; | |
345 | } | |
346 | ||
459773ae MH |
347 | #endif /* CONFIG_GPIO_ADP5588_IRQ */ |
348 | ||
9f22af11 | 349 | static int adp5588_gpio_probe(struct i2c_client *client) |
80884094 | 350 | { |
e56aee18 JH |
351 | struct adp5588_gpio_platform_data *pdata = |
352 | dev_get_platdata(&client->dev); | |
80884094 MH |
353 | struct adp5588_gpio *dev; |
354 | struct gpio_chip *gc; | |
355 | int ret, i, revid; | |
9f22af11 | 356 | unsigned int pullup_dis_mask = 0; |
80884094 MH |
357 | |
358 | if (!i2c_check_functionality(client->adapter, | |
359 | I2C_FUNC_SMBUS_BYTE_DATA)) { | |
360 | dev_err(&client->dev, "SMBUS Byte Data not Supported\n"); | |
361 | return -EIO; | |
362 | } | |
363 | ||
7898b31e | 364 | dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL); |
afeb7b45 | 365 | if (!dev) |
80884094 | 366 | return -ENOMEM; |
80884094 MH |
367 | |
368 | dev->client = client; | |
369 | ||
370 | gc = &dev->gpio_chip; | |
371 | gc->direction_input = adp5588_gpio_direction_input; | |
372 | gc->direction_output = adp5588_gpio_direction_output; | |
373 | gc->get = adp5588_gpio_get_value; | |
374 | gc->set = adp5588_gpio_set_value; | |
9fb1f39e | 375 | gc->can_sleep = true; |
9f22af11 NV |
376 | gc->base = -1; |
377 | gc->parent = &client->dev; | |
378 | ||
379 | if (pdata) { | |
380 | gc->base = pdata->gpio_start; | |
381 | gc->names = pdata->names; | |
382 | pullup_dis_mask = pdata->pullup_dis_mask; | |
383 | } | |
80884094 | 384 | |
459773ae | 385 | gc->ngpio = ADP5588_MAXGPIO; |
80884094 MH |
386 | gc->label = client->name; |
387 | gc->owner = THIS_MODULE; | |
388 | ||
389 | mutex_init(&dev->lock); | |
390 | ||
80884094 MH |
391 | ret = adp5588_gpio_read(dev->client, DEV_ID); |
392 | if (ret < 0) | |
9f22af11 | 393 | return ret; |
80884094 MH |
394 | |
395 | revid = ret & ADP5588_DEVICE_ID_MASK; | |
396 | ||
459773ae | 397 | for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { |
80884094 MH |
398 | dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i); |
399 | dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i); | |
400 | ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0); | |
401 | ret |= adp5588_gpio_write(client, GPIO_PULL1 + i, | |
9f22af11 | 402 | (pullup_dis_mask >> (8 * i)) & 0xFF); |
459773ae | 403 | ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0); |
80884094 | 404 | if (ret) |
9f22af11 | 405 | return ret; |
80884094 MH |
406 | } |
407 | ||
9f22af11 | 408 | if (client->irq) { |
459773ae MH |
409 | if (WA_DELAYED_READOUT_REVID(revid)) { |
410 | dev_warn(&client->dev, "GPIO int not supported\n"); | |
411 | } else { | |
412 | ret = adp5588_irq_setup(dev); | |
413 | if (ret) | |
9f22af11 | 414 | return ret; |
459773ae MH |
415 | } |
416 | } | |
417 | ||
7c263fe0 | 418 | ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev); |
80884094 | 419 | if (ret) |
9f22af11 | 420 | return ret; |
80884094 | 421 | |
9f22af11 | 422 | if (pdata && pdata->setup) { |
80884094 MH |
423 | ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context); |
424 | if (ret < 0) | |
425 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
426 | } | |
427 | ||
428 | i2c_set_clientdata(client, dev); | |
459773ae | 429 | |
80884094 | 430 | return 0; |
80884094 MH |
431 | } |
432 | ||
206210ce | 433 | static int adp5588_gpio_remove(struct i2c_client *client) |
80884094 | 434 | { |
e56aee18 JH |
435 | struct adp5588_gpio_platform_data *pdata = |
436 | dev_get_platdata(&client->dev); | |
80884094 MH |
437 | struct adp5588_gpio *dev = i2c_get_clientdata(client); |
438 | int ret; | |
439 | ||
9f22af11 | 440 | if (pdata && pdata->teardown) { |
80884094 MH |
441 | ret = pdata->teardown(client, |
442 | dev->gpio_chip.base, dev->gpio_chip.ngpio, | |
443 | pdata->context); | |
444 | if (ret < 0) { | |
445 | dev_err(&client->dev, "teardown failed %d\n", ret); | |
446 | return ret; | |
447 | } | |
448 | } | |
449 | ||
9f22af11 | 450 | if (dev->client->irq) |
459773ae MH |
451 | free_irq(dev->client->irq, dev); |
452 | ||
80884094 MH |
453 | return 0; |
454 | } | |
455 | ||
456 | static const struct i2c_device_id adp5588_gpio_id[] = { | |
457 | {DRV_NAME, 0}, | |
458 | {} | |
459 | }; | |
80884094 MH |
460 | MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id); |
461 | ||
9f22af11 NV |
462 | #ifdef CONFIG_OF |
463 | static const struct of_device_id adp5588_gpio_of_id[] = { | |
464 | { .compatible = "adi," DRV_NAME, }, | |
465 | {}, | |
466 | }; | |
467 | MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id); | |
468 | #endif | |
469 | ||
80884094 MH |
470 | static struct i2c_driver adp5588_gpio_driver = { |
471 | .driver = { | |
9f22af11 NV |
472 | .name = DRV_NAME, |
473 | .of_match_table = of_match_ptr(adp5588_gpio_of_id), | |
474 | }, | |
475 | .probe_new = adp5588_gpio_probe, | |
8283c4ff | 476 | .remove = adp5588_gpio_remove, |
80884094 MH |
477 | .id_table = adp5588_gpio_id, |
478 | }; | |
479 | ||
c8554d32 | 480 | module_i2c_driver(adp5588_gpio_driver); |
80884094 | 481 | |
be887843 | 482 | MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); |
80884094 MH |
483 | MODULE_DESCRIPTION("GPIO ADP5588 Driver"); |
484 | MODULE_LICENSE("GPL"); |