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80503b23 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
80884094 MH |
2 | /* |
3 | * GPIO Chip driver for Analog Devices | |
459773ae | 4 | * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller |
80884094 | 5 | * |
459773ae | 6 | * Copyright 2009-2010 Analog Devices Inc. |
80884094 MH |
7 | */ |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/kernel.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
80884094 MH |
12 | #include <linux/init.h> |
13 | #include <linux/i2c.h> | |
d543668a | 14 | #include <linux/gpio/driver.h> |
459773ae MH |
15 | #include <linux/interrupt.h> |
16 | #include <linux/irq.h> | |
9f22af11 | 17 | #include <linux/of_device.h> |
80884094 | 18 | |
c1a46340 | 19 | #include <linux/platform_data/adp5588.h> |
80884094 | 20 | |
459773ae MH |
21 | #define DRV_NAME "adp5588-gpio" |
22 | ||
23 | /* | |
24 | * Early pre 4.0 Silicon required to delay readout by at least 25ms, | |
25 | * since the Event Counter Register updated 25ms after the interrupt | |
26 | * asserted. | |
27 | */ | |
28 | #define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4) | |
80884094 MH |
29 | |
30 | struct adp5588_gpio { | |
31 | struct i2c_client *client; | |
32 | struct gpio_chip gpio_chip; | |
33 | struct mutex lock; /* protect cached dir, dat_out */ | |
459773ae MH |
34 | /* protect serialized access to the interrupt controller bus */ |
35 | struct mutex irq_lock; | |
80884094 MH |
36 | uint8_t dat_out[3]; |
37 | uint8_t dir[3]; | |
5d643eda NV |
38 | uint8_t int_lvl_low[3]; |
39 | uint8_t int_lvl_high[3]; | |
459773ae MH |
40 | uint8_t int_en[3]; |
41 | uint8_t irq_mask[3]; | |
6537886c | 42 | uint8_t int_input_en[3]; |
80884094 MH |
43 | }; |
44 | ||
45 | static int adp5588_gpio_read(struct i2c_client *client, u8 reg) | |
46 | { | |
47 | int ret = i2c_smbus_read_byte_data(client, reg); | |
48 | ||
49 | if (ret < 0) | |
50 | dev_err(&client->dev, "Read Error\n"); | |
51 | ||
52 | return ret; | |
53 | } | |
54 | ||
55 | static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val) | |
56 | { | |
57 | int ret = i2c_smbus_write_byte_data(client, reg, val); | |
58 | ||
59 | if (ret < 0) | |
60 | dev_err(&client->dev, "Write Error\n"); | |
61 | ||
62 | return ret; | |
63 | } | |
64 | ||
65 | static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) | |
66 | { | |
f69255ce | 67 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
992196f2 JFD |
68 | unsigned bank = ADP5588_BANK(off); |
69 | unsigned bit = ADP5588_BIT(off); | |
70 | int val; | |
80884094 | 71 | |
992196f2 JFD |
72 | mutex_lock(&dev->lock); |
73 | ||
74 | if (dev->dir[bank] & bit) | |
75 | val = dev->dat_out[bank]; | |
76 | else | |
77 | val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank); | |
78 | ||
79 | mutex_unlock(&dev->lock); | |
80 | ||
81 | return !!(val & bit); | |
80884094 MH |
82 | } |
83 | ||
84 | static void adp5588_gpio_set_value(struct gpio_chip *chip, | |
85 | unsigned off, int val) | |
86 | { | |
87 | unsigned bank, bit; | |
f69255ce | 88 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
80884094 | 89 | |
459773ae MH |
90 | bank = ADP5588_BANK(off); |
91 | bit = ADP5588_BIT(off); | |
80884094 MH |
92 | |
93 | mutex_lock(&dev->lock); | |
94 | if (val) | |
95 | dev->dat_out[bank] |= bit; | |
96 | else | |
97 | dev->dat_out[bank] &= ~bit; | |
98 | ||
99 | adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, | |
100 | dev->dat_out[bank]); | |
101 | mutex_unlock(&dev->lock); | |
102 | } | |
103 | ||
104 | static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off) | |
105 | { | |
106 | int ret; | |
107 | unsigned bank; | |
f69255ce | 108 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
80884094 | 109 | |
459773ae | 110 | bank = ADP5588_BANK(off); |
80884094 MH |
111 | |
112 | mutex_lock(&dev->lock); | |
459773ae | 113 | dev->dir[bank] &= ~ADP5588_BIT(off); |
80884094 MH |
114 | ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]); |
115 | mutex_unlock(&dev->lock); | |
116 | ||
117 | return ret; | |
118 | } | |
119 | ||
120 | static int adp5588_gpio_direction_output(struct gpio_chip *chip, | |
121 | unsigned off, int val) | |
122 | { | |
123 | int ret; | |
124 | unsigned bank, bit; | |
f69255ce | 125 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
80884094 | 126 | |
459773ae MH |
127 | bank = ADP5588_BANK(off); |
128 | bit = ADP5588_BIT(off); | |
80884094 MH |
129 | |
130 | mutex_lock(&dev->lock); | |
131 | dev->dir[bank] |= bit; | |
132 | ||
133 | if (val) | |
134 | dev->dat_out[bank] |= bit; | |
135 | else | |
136 | dev->dat_out[bank] &= ~bit; | |
137 | ||
138 | ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, | |
139 | dev->dat_out[bank]); | |
140 | ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, | |
141 | dev->dir[bank]); | |
142 | mutex_unlock(&dev->lock); | |
143 | ||
144 | return ret; | |
145 | } | |
146 | ||
459773ae | 147 | #ifdef CONFIG_GPIO_ADP5588_IRQ |
459773ae | 148 | |
12401eed | 149 | static void adp5588_irq_bus_lock(struct irq_data *d) |
459773ae | 150 | { |
9f22af11 NV |
151 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
152 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
12401eed | 153 | |
459773ae MH |
154 | mutex_lock(&dev->irq_lock); |
155 | } | |
156 | ||
157 | /* | |
158 | * genirq core code can issue chip->mask/unmask from atomic context. | |
159 | * This doesn't work for slow busses where an access needs to sleep. | |
160 | * bus_sync_unlock() is therefore called outside the atomic context, | |
161 | * syncs the current irq mask state with the slow external controller | |
162 | * and unlocks the bus. | |
163 | */ | |
164 | ||
12401eed | 165 | static void adp5588_irq_bus_sync_unlock(struct irq_data *d) |
459773ae | 166 | { |
9f22af11 NV |
167 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
168 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
459773ae MH |
169 | int i; |
170 | ||
6537886c MH |
171 | for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { |
172 | if (dev->int_input_en[i]) { | |
173 | mutex_lock(&dev->lock); | |
174 | dev->dir[i] &= ~dev->int_input_en[i]; | |
175 | dev->int_input_en[i] = 0; | |
176 | adp5588_gpio_write(dev->client, GPIO_DIR1 + i, | |
177 | dev->dir[i]); | |
178 | mutex_unlock(&dev->lock); | |
179 | } | |
180 | ||
459773ae MH |
181 | if (dev->int_en[i] ^ dev->irq_mask[i]) { |
182 | dev->int_en[i] = dev->irq_mask[i]; | |
5d643eda | 183 | adp5588_gpio_write(dev->client, GPI_EM1 + i, |
459773ae MH |
184 | dev->int_en[i]); |
185 | } | |
6537886c | 186 | } |
459773ae MH |
187 | |
188 | mutex_unlock(&dev->irq_lock); | |
189 | } | |
190 | ||
12401eed | 191 | static void adp5588_irq_mask(struct irq_data *d) |
459773ae | 192 | { |
9f22af11 NV |
193 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
194 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
459773ae | 195 | |
9f22af11 | 196 | dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq); |
459773ae MH |
197 | } |
198 | ||
12401eed | 199 | static void adp5588_irq_unmask(struct irq_data *d) |
459773ae | 200 | { |
9f22af11 NV |
201 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
202 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
459773ae | 203 | |
9f22af11 | 204 | dev->irq_mask[ADP5588_BANK(d->hwirq)] |= ADP5588_BIT(d->hwirq); |
459773ae MH |
205 | } |
206 | ||
12401eed | 207 | static int adp5588_irq_set_type(struct irq_data *d, unsigned int type) |
459773ae | 208 | { |
9f22af11 NV |
209 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
210 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
211 | uint16_t gpio = d->hwirq; | |
459773ae MH |
212 | unsigned bank, bit; |
213 | ||
459773ae MH |
214 | bank = ADP5588_BANK(gpio); |
215 | bit = ADP5588_BIT(gpio); | |
216 | ||
5d643eda NV |
217 | dev->int_lvl_low[bank] &= ~bit; |
218 | dev->int_lvl_high[bank] &= ~bit; | |
219 | ||
220 | if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_HIGH) | |
221 | dev->int_lvl_high[bank] |= bit; | |
222 | ||
223 | if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_LOW) | |
224 | dev->int_lvl_low[bank] |= bit; | |
459773ae | 225 | |
6537886c | 226 | dev->int_input_en[bank] |= bit; |
459773ae MH |
227 | |
228 | return 0; | |
229 | } | |
230 | ||
231 | static struct irq_chip adp5588_irq_chip = { | |
232 | .name = "adp5588", | |
12401eed LB |
233 | .irq_mask = adp5588_irq_mask, |
234 | .irq_unmask = adp5588_irq_unmask, | |
235 | .irq_bus_lock = adp5588_irq_bus_lock, | |
236 | .irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock, | |
237 | .irq_set_type = adp5588_irq_set_type, | |
459773ae MH |
238 | }; |
239 | ||
459773ae MH |
240 | static irqreturn_t adp5588_irq_handler(int irq, void *devid) |
241 | { | |
242 | struct adp5588_gpio *dev = devid; | |
5d643eda NV |
243 | int status = adp5588_gpio_read(dev->client, INT_STAT); |
244 | ||
245 | if (status & ADP5588_KE_INT) { | |
246 | int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT); | |
247 | ||
248 | if (ev_cnt > 0) { | |
249 | int i; | |
250 | ||
251 | for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) { | |
252 | int key = adp5588_gpio_read(dev->client, | |
253 | Key_EVENTA + i); | |
254 | /* GPIN events begin at 97, | |
255 | * bit 7 indicates logic level | |
256 | */ | |
257 | int gpio = (key & 0x7f) - 97; | |
258 | int lvl = key & (1 << 7); | |
259 | int bank = ADP5588_BANK(gpio); | |
260 | int bit = ADP5588_BIT(gpio); | |
261 | ||
262 | if ((lvl && dev->int_lvl_high[bank] & bit) || | |
263 | (!lvl && dev->int_lvl_low[bank] & bit)) | |
264 | handle_nested_irq(irq_find_mapping( | |
265 | dev->gpio_chip.irq.domain, gpio)); | |
459773ae MH |
266 | } |
267 | } | |
268 | } | |
269 | ||
270 | adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */ | |
271 | ||
272 | return IRQ_HANDLED; | |
273 | } | |
274 | ||
dfc3a26d LW |
275 | |
276 | static int adp5588_irq_init_hw(struct gpio_chip *gc) | |
277 | { | |
278 | struct adp5588_gpio *dev = gpiochip_get_data(gc); | |
279 | /* Enable IRQs after registering chip */ | |
280 | adp5588_gpio_write(dev->client, CFG, | |
281 | ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_KE_IEN); | |
282 | ||
283 | return 0; | |
284 | } | |
285 | ||
459773ae MH |
286 | static int adp5588_irq_setup(struct adp5588_gpio *dev) |
287 | { | |
288 | struct i2c_client *client = dev->client; | |
9f22af11 | 289 | int ret; |
e56aee18 JH |
290 | struct adp5588_gpio_platform_data *pdata = |
291 | dev_get_platdata(&client->dev); | |
dfc3a26d | 292 | struct gpio_irq_chip *girq; |
459773ae MH |
293 | |
294 | adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC); | |
295 | adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */ | |
459773ae | 296 | |
459773ae MH |
297 | mutex_init(&dev->irq_lock); |
298 | ||
9f22af11 NV |
299 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
300 | NULL, adp5588_irq_handler, IRQF_ONESHOT | |
301 | | IRQF_TRIGGER_FALLING | IRQF_SHARED, | |
302 | dev_name(&client->dev), dev); | |
459773ae MH |
303 | if (ret) { |
304 | dev_err(&client->dev, "failed to request irq %d\n", | |
305 | client->irq); | |
9f22af11 NV |
306 | return ret; |
307 | } | |
459773ae | 308 | |
dfc3a26d LW |
309 | /* This will be registered in the call to devm_gpiochip_add_data() */ |
310 | girq = &dev->gpio_chip.irq; | |
311 | girq->chip = &adp5588_irq_chip; | |
312 | /* This will let us handle the parent IRQ in the driver */ | |
313 | girq->parent_handler = NULL; | |
314 | girq->num_parents = 0; | |
315 | girq->parents = NULL; | |
316 | girq->first = pdata ? pdata->irq_base : 0; | |
317 | girq->default_type = IRQ_TYPE_NONE; | |
318 | girq->handler = handle_simple_irq; | |
319 | girq->init_hw = adp5588_irq_init_hw; | |
320 | girq->threaded = true; | |
459773ae MH |
321 | |
322 | return 0; | |
459773ae MH |
323 | } |
324 | ||
325 | #else | |
326 | static int adp5588_irq_setup(struct adp5588_gpio *dev) | |
327 | { | |
328 | struct i2c_client *client = dev->client; | |
329 | dev_warn(&client->dev, "interrupt support not compiled in\n"); | |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
459773ae MH |
334 | #endif /* CONFIG_GPIO_ADP5588_IRQ */ |
335 | ||
9f22af11 | 336 | static int adp5588_gpio_probe(struct i2c_client *client) |
80884094 | 337 | { |
e56aee18 JH |
338 | struct adp5588_gpio_platform_data *pdata = |
339 | dev_get_platdata(&client->dev); | |
80884094 MH |
340 | struct adp5588_gpio *dev; |
341 | struct gpio_chip *gc; | |
342 | int ret, i, revid; | |
9f22af11 | 343 | unsigned int pullup_dis_mask = 0; |
80884094 MH |
344 | |
345 | if (!i2c_check_functionality(client->adapter, | |
346 | I2C_FUNC_SMBUS_BYTE_DATA)) { | |
347 | dev_err(&client->dev, "SMBUS Byte Data not Supported\n"); | |
348 | return -EIO; | |
349 | } | |
350 | ||
7898b31e | 351 | dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL); |
afeb7b45 | 352 | if (!dev) |
80884094 | 353 | return -ENOMEM; |
80884094 MH |
354 | |
355 | dev->client = client; | |
356 | ||
357 | gc = &dev->gpio_chip; | |
358 | gc->direction_input = adp5588_gpio_direction_input; | |
359 | gc->direction_output = adp5588_gpio_direction_output; | |
360 | gc->get = adp5588_gpio_get_value; | |
361 | gc->set = adp5588_gpio_set_value; | |
9fb1f39e | 362 | gc->can_sleep = true; |
9f22af11 NV |
363 | gc->base = -1; |
364 | gc->parent = &client->dev; | |
365 | ||
366 | if (pdata) { | |
367 | gc->base = pdata->gpio_start; | |
368 | gc->names = pdata->names; | |
369 | pullup_dis_mask = pdata->pullup_dis_mask; | |
370 | } | |
80884094 | 371 | |
459773ae | 372 | gc->ngpio = ADP5588_MAXGPIO; |
80884094 MH |
373 | gc->label = client->name; |
374 | gc->owner = THIS_MODULE; | |
375 | ||
376 | mutex_init(&dev->lock); | |
377 | ||
80884094 MH |
378 | ret = adp5588_gpio_read(dev->client, DEV_ID); |
379 | if (ret < 0) | |
9f22af11 | 380 | return ret; |
80884094 MH |
381 | |
382 | revid = ret & ADP5588_DEVICE_ID_MASK; | |
383 | ||
459773ae | 384 | for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { |
80884094 MH |
385 | dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i); |
386 | dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i); | |
387 | ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0); | |
388 | ret |= adp5588_gpio_write(client, GPIO_PULL1 + i, | |
9f22af11 | 389 | (pullup_dis_mask >> (8 * i)) & 0xFF); |
459773ae | 390 | ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0); |
80884094 | 391 | if (ret) |
9f22af11 | 392 | return ret; |
80884094 MH |
393 | } |
394 | ||
9f22af11 | 395 | if (client->irq) { |
459773ae MH |
396 | if (WA_DELAYED_READOUT_REVID(revid)) { |
397 | dev_warn(&client->dev, "GPIO int not supported\n"); | |
398 | } else { | |
399 | ret = adp5588_irq_setup(dev); | |
400 | if (ret) | |
9f22af11 | 401 | return ret; |
459773ae MH |
402 | } |
403 | } | |
404 | ||
7c263fe0 | 405 | ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev); |
80884094 | 406 | if (ret) |
9f22af11 | 407 | return ret; |
80884094 | 408 | |
9f22af11 | 409 | if (pdata && pdata->setup) { |
80884094 MH |
410 | ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context); |
411 | if (ret < 0) | |
412 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
413 | } | |
414 | ||
415 | i2c_set_clientdata(client, dev); | |
459773ae | 416 | |
80884094 | 417 | return 0; |
80884094 MH |
418 | } |
419 | ||
206210ce | 420 | static int adp5588_gpio_remove(struct i2c_client *client) |
80884094 | 421 | { |
e56aee18 JH |
422 | struct adp5588_gpio_platform_data *pdata = |
423 | dev_get_platdata(&client->dev); | |
80884094 MH |
424 | struct adp5588_gpio *dev = i2c_get_clientdata(client); |
425 | int ret; | |
426 | ||
9f22af11 | 427 | if (pdata && pdata->teardown) { |
80884094 MH |
428 | ret = pdata->teardown(client, |
429 | dev->gpio_chip.base, dev->gpio_chip.ngpio, | |
430 | pdata->context); | |
431 | if (ret < 0) { | |
432 | dev_err(&client->dev, "teardown failed %d\n", ret); | |
433 | return ret; | |
434 | } | |
435 | } | |
436 | ||
9f22af11 | 437 | if (dev->client->irq) |
459773ae MH |
438 | free_irq(dev->client->irq, dev); |
439 | ||
80884094 MH |
440 | return 0; |
441 | } | |
442 | ||
443 | static const struct i2c_device_id adp5588_gpio_id[] = { | |
444 | {DRV_NAME, 0}, | |
445 | {} | |
446 | }; | |
80884094 MH |
447 | MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id); |
448 | ||
9f22af11 NV |
449 | #ifdef CONFIG_OF |
450 | static const struct of_device_id adp5588_gpio_of_id[] = { | |
451 | { .compatible = "adi," DRV_NAME, }, | |
452 | {}, | |
453 | }; | |
454 | MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id); | |
455 | #endif | |
456 | ||
80884094 MH |
457 | static struct i2c_driver adp5588_gpio_driver = { |
458 | .driver = { | |
9f22af11 NV |
459 | .name = DRV_NAME, |
460 | .of_match_table = of_match_ptr(adp5588_gpio_of_id), | |
461 | }, | |
462 | .probe_new = adp5588_gpio_probe, | |
8283c4ff | 463 | .remove = adp5588_gpio_remove, |
80884094 MH |
464 | .id_table = adp5588_gpio_id, |
465 | }; | |
466 | ||
c8554d32 | 467 | module_i2c_driver(adp5588_gpio_driver); |
80884094 | 468 | |
be887843 | 469 | MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); |
80884094 MH |
470 | MODULE_DESCRIPTION("GPIO ADP5588 Driver"); |
471 | MODULE_LICENSE("GPL"); |