[linux-2.6-block.git] / drivers / gpio / gpio-adp5588.c

/*
 * GPIO Chip driver for Analog Devices
 * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
 *
 * Copyright 2009-2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/irq.h>

#include <linux/i2c/adp5588.h>

#define DRV_NAME	"adp5588-gpio"

/*
 * Early pre 4.0 Silicon required to delay readout by at least 25ms,
 * since the Event Counter Register updated 25ms after the interrupt
 * asserted.
 */
#define WA_DELAYED_READOUT_REVID(rev)	((rev) < 4)

struct adp5588_gpio {
	struct i2c_client *client;
	struct gpio_chip gpio_chip;
	struct mutex lock;	/* protect cached dir, dat_out */
	/* protect serialized access to the interrupt controller bus */
	struct mutex irq_lock;
	unsigned gpio_start;
	unsigned irq_base;
	uint8_t dat_out[3];
	uint8_t dir[3];
	uint8_t int_lvl[3];
	uint8_t int_en[3];
	uint8_t irq_mask[3];
	uint8_t irq_stat[3];
};

static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
{
	int ret = i2c_smbus_read_byte_data(client, reg);

	if (ret < 0)
		dev_err(&client->dev, "Read Error\n");

	return ret;
}

static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
{
	int ret = i2c_smbus_write_byte_data(client, reg, val);

	if (ret < 0)
		dev_err(&client->dev, "Write Error\n");

	return ret;
}

static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);
	unsigned bank = ADP5588_BANK(off);
	unsigned bit = ADP5588_BIT(off);
	int val;

	mutex_lock(&dev->lock);

	if (dev->dir[bank] & bit)
		val = dev->dat_out[bank];
	else
		val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);

	mutex_unlock(&dev->lock);

	return !!(val & bit);
}

static void adp5588_gpio_set_value(struct gpio_chip *chip,
				   unsigned off, int val)
{
	unsigned bank, bit;
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
			   dev->dat_out[bank]);
	mutex_unlock(&dev->lock);
}

static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
{
	int ret;
	unsigned bank;
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);

	bank = ADP5588_BANK(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] &= ~ADP5588_BIT(off);
	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

static int adp5588_gpio_direction_output(struct gpio_chip *chip,
					 unsigned off, int val)
{
	int ret;
	unsigned bank, bit;
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] |= bit;

	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
				 dev->dat_out[bank]);
	ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
				 dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

#ifdef CONFIG_GPIO_ADP5588_IRQ
static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev =
		container_of(chip, struct adp5588_gpio, gpio_chip);
	return dev->irq_base + off;
}

static void adp5588_irq_bus_lock(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);

	mutex_lock(&dev->irq_lock);
}

 /*
  * genirq core code can issue chip->mask/unmask from atomic context.
  * This doesn't work for slow busses where an access needs to sleep.
  * bus_sync_unlock() is therefore called outside the atomic context,
  * syncs the current irq mask state with the slow external controller
  * and unlocks the bus.
  */

static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	int i;

	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++)
		if (dev->int_en[i] ^ dev->irq_mask[i]) {
			dev->int_en[i] = dev->irq_mask[i];
			adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i,
					   dev->int_en[i]);
		}

	mutex_unlock(&dev->irq_lock);
}

static void adp5588_irq_mask(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	unsigned gpio = d->irq - dev->irq_base;

	dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio);
}

static void adp5588_irq_unmask(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	unsigned gpio = d->irq - dev->irq_base;

	dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio);
}

static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	uint16_t gpio = d->irq - dev->irq_base;
	unsigned bank, bit;

	if ((type & IRQ_TYPE_EDGE_BOTH)) {
		dev_err(&dev->client->dev, "irq %d: unsupported type %d\n",
			d->irq, type);
		return -EINVAL;
	}

	bank = ADP5588_BANK(gpio);
	bit = ADP5588_BIT(gpio);

	if (type & IRQ_TYPE_LEVEL_HIGH)
		dev->int_lvl[bank] |= bit;
	else if (type & IRQ_TYPE_LEVEL_LOW)
		dev->int_lvl[bank] &= ~bit;
	else
		return -EINVAL;

	adp5588_gpio_direction_input(&dev->gpio_chip, gpio);
	adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank,
			   dev->int_lvl[bank]);

	return 0;
}

static struct irq_chip adp5588_irq_chip = {
	.name			= "adp5588",
	.irq_mask		= adp5588_irq_mask,
	.irq_unmask		= adp5588_irq_unmask,
	.irq_bus_lock		= adp5588_irq_bus_lock,
	.irq_bus_sync_unlock	= adp5588_irq_bus_sync_unlock,
	.irq_set_type		= adp5588_irq_set_type,
};

static int adp5588_gpio_read_intstat(struct i2c_client *client, u8 *buf)
{
	int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf);

	if (ret < 0)
		dev_err(&client->dev, "Read INT_STAT Error\n");

	return ret;
}

static irqreturn_t adp5588_irq_handler(int irq, void *devid)
{
	struct adp5588_gpio *dev = devid;
	unsigned status, bank, bit, pending;
	int ret;
	status = adp5588_gpio_read(dev->client, INT_STAT);

	if (status & ADP5588_GPI_INT) {
		ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat);
		if (ret < 0)
			memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));

		for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
			bank++, bit = 0) {
			pending = dev->irq_stat[bank] & dev->irq_mask[bank];

			while (pending) {
				if (pending & (1 << bit)) {
					handle_nested_irq(dev->irq_base +
							  (bank << 3) + bit);
					pending &= ~(1 << bit);

				}
				bit++;
			}
		}
	}

	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */

	return IRQ_HANDLED;
}

static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	unsigned gpio;
	int ret;

	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
	adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */

	dev->irq_base = pdata->irq_base;
	mutex_init(&dev->irq_lock);

	for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
		int irq = gpio + dev->irq_base;
		irq_set_chip_data(irq, dev);
		irq_set_chip_and_handler(irq, &adp5588_irq_chip,
					 handle_level_irq);
		irq_set_nested_thread(irq, 1);
		irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
	}

	ret = request_threaded_irq(client->irq,
				   NULL,
				   adp5588_irq_handler,
				   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
				   dev_name(&client->dev), dev);
	if (ret) {
		dev_err(&client->dev, "failed to request irq %d\n",
			client->irq);
		goto out;
	}

	dev->gpio_chip.to_irq = adp5588_gpio_to_irq;
	adp5588_gpio_write(client, CFG,
		ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_GPI_INT);

	return 0;

out:
	dev->irq_base = 0;
	return ret;
}

static void adp5588_irq_teardown(struct adp5588_gpio *dev)
{
	if (dev->irq_base)
		free_irq(dev->client->irq, dev);
}

#else
static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	dev_warn(&client->dev, "interrupt support not compiled in\n");

	return 0;
}

static void adp5588_irq_teardown(struct adp5588_gpio *dev)
{
}
#endif /* CONFIG_GPIO_ADP5588_IRQ */

static int adp5588_gpio_probe(struct i2c_client *client,
					const struct i2c_device_id *id)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev;
	struct gpio_chip *gc;
	int ret, i, revid;

	if (!pdata) {
		dev_err(&client->dev, "missing platform data\n");
		return -ENODEV;
	}

	if (!i2c_check_functionality(client->adapter,
					I2C_FUNC_SMBUS_BYTE_DATA)) {
		dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
		return -EIO;
	}

	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	dev->client = client;

	gc = &dev->gpio_chip;
	gc->direction_input = adp5588_gpio_direction_input;
	gc->direction_output = adp5588_gpio_direction_output;
	gc->get = adp5588_gpio_get_value;
	gc->set = adp5588_gpio_set_value;
	gc->can_sleep = true;

	gc->base = pdata->gpio_start;
	gc->ngpio = ADP5588_MAXGPIO;
	gc->label = client->name;
	gc->owner = THIS_MODULE;
	gc->names = pdata->names;

	mutex_init(&dev->lock);

	ret = adp5588_gpio_read(dev->client, DEV_ID);
	if (ret < 0)
		goto err;

	revid = ret & ADP5588_DEVICE_ID_MASK;

	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
		dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
		dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
		ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
		ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
				(pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
		ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
		if (ret)
			goto err;
	}

	if (pdata->irq_base) {
		if (WA_DELAYED_READOUT_REVID(revid)) {
			dev_warn(&client->dev, "GPIO int not supported\n");
		} else {
			ret = adp5588_irq_setup(dev);
			if (ret)
				goto err;
		}
	}

	ret = gpiochip_add(&dev->gpio_chip);
	if (ret)
		goto err_irq;

	dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n",
			pdata->irq_base, revid);

	if (pdata->setup) {
		ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
		if (ret < 0)
			dev_warn(&client->dev, "setup failed, %d\n", ret);
	}

	i2c_set_clientdata(client, dev);

	return 0;

err_irq:
	adp5588_irq_teardown(dev);
err:
	return ret;
}

static int adp5588_gpio_remove(struct i2c_client *client)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	int ret;

	if (pdata->teardown) {
		ret = pdata->teardown(client,
				      dev->gpio_chip.base, dev->gpio_chip.ngpio,
				      pdata->context);
		if (ret < 0) {
			dev_err(&client->dev, "teardown failed %d\n", ret);
			return ret;
		}
	}

	if (dev->irq_base)
		free_irq(dev->client->irq, dev);

	gpiochip_remove(&dev->gpio_chip);

	return 0;
}

static const struct i2c_device_id adp5588_gpio_id[] = {
	{DRV_NAME, 0},
	{}
};

MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);

static struct i2c_driver adp5588_gpio_driver = {
	.driver = {
		   .name = DRV_NAME,
		   },
	.probe = adp5588_gpio_probe,
	.remove = adp5588_gpio_remove,
	.id_table = adp5588_gpio_id,
};

module_i2c_driver(adp5588_gpio_driver);

MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
MODULE_DESCRIPTION("GPIO ADP5588 Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
80884094 MH	1	/*
80884094 MH	2	* GPIO Chip driver for Analog Devices
459773ae	3	* ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
80884094	4	*
459773ae	5	* Copyright 2009-2010 Analog Devices Inc.
80884094 MH	6	*
	7	* Licensed under the GPL-2 or later.
	8	*/
	9
	10	#include <linux/module.h>
	11	#include <linux/kernel.h>
5a0e3ad6	12	#include <linux/slab.h>
80884094 MH	13	#include <linux/init.h>
	14	#include <linux/i2c.h>
	15	#include <linux/gpio.h>
459773ae MH	16	#include <linux/interrupt.h>
459773ae MH	17	#include <linux/irq.h>
80884094 MH	18
	19	#include <linux/i2c/adp5588.h>
	20
459773ae MH	21	#define DRV_NAME "adp5588-gpio"
	22
	23	/*
	24	* Early pre 4.0 Silicon required to delay readout by at least 25ms,
	25	* since the Event Counter Register updated 25ms after the interrupt
	26	* asserted.
	27	*/
	28	#define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4)
80884094 MH	29
	30	struct adp5588_gpio {
	31	struct i2c_client *client;
	32	struct gpio_chip gpio_chip;
	33	struct mutex lock; /* protect cached dir, dat_out */
459773ae MH	34	/* protect serialized access to the interrupt controller bus */
459773ae MH	35	struct mutex irq_lock;
80884094	36	unsigned gpio_start;
459773ae	37	unsigned irq_base;
80884094 MH	38	uint8_t dat_out[3];
80884094 MH	39	uint8_t dir[3];
459773ae MH	40	uint8_t int_lvl[3];
	41	uint8_t int_en[3];
	42	uint8_t irq_mask[3];
	43	uint8_t irq_stat[3];
80884094 MH	44	};
	45
	46	static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
	47	{
	48	int ret = i2c_smbus_read_byte_data(client, reg);
	49
	50	if (ret < 0)
	51	dev_err(&client->dev, "Read Error\n");
	52
	53	return ret;
	54	}
	55
	56	static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
	57	{
	58	int ret = i2c_smbus_write_byte_data(client, reg, val);
	59
	60	if (ret < 0)
	61	dev_err(&client->dev, "Write Error\n");
	62
	63	return ret;
	64	}
	65
	66	static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
	67	{
	68	struct adp5588_gpio *dev =
	69	container_of(chip, struct adp5588_gpio, gpio_chip);
992196f2 JFD	70	unsigned bank = ADP5588_BANK(off);
	71	unsigned bit = ADP5588_BIT(off);
	72	int val;
80884094	73
992196f2 JFD	74	mutex_lock(&dev->lock);
	75
	76	if (dev->dir[bank] & bit)
	77	val = dev->dat_out[bank];
	78	else
	79	val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
	80
	81	mutex_unlock(&dev->lock);
	82
	83	return !!(val & bit);
80884094 MH	84	}
	85
	86	static void adp5588_gpio_set_value(struct gpio_chip *chip,
	87	unsigned off, int val)
	88	{
	89	unsigned bank, bit;
	90	struct adp5588_gpio *dev =
	91	container_of(chip, struct adp5588_gpio, gpio_chip);
	92
459773ae MH	93	bank = ADP5588_BANK(off);
459773ae MH	94	bit = ADP5588_BIT(off);
80884094 MH	95
	96	mutex_lock(&dev->lock);
	97	if (val)
	98	dev->dat_out[bank] \|= bit;
	99	else
	100	dev->dat_out[bank] &= ~bit;
	101
	102	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	103	dev->dat_out[bank]);
	104	mutex_unlock(&dev->lock);
	105	}
	106
	107	static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
	108	{
	109	int ret;
	110	unsigned bank;
	111	struct adp5588_gpio *dev =
	112	container_of(chip, struct adp5588_gpio, gpio_chip);
	113
459773ae	114	bank = ADP5588_BANK(off);
80884094 MH	115
80884094 MH	116	mutex_lock(&dev->lock);
459773ae	117	dev->dir[bank] &= ~ADP5588_BIT(off);
80884094 MH	118	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	119	mutex_unlock(&dev->lock);
	120
	121	return ret;
	122	}
	123
	124	static int adp5588_gpio_direction_output(struct gpio_chip *chip,
	125	unsigned off, int val)
	126	{
	127	int ret;
	128	unsigned bank, bit;
	129	struct adp5588_gpio *dev =
	130	container_of(chip, struct adp5588_gpio, gpio_chip);
	131
459773ae MH	132	bank = ADP5588_BANK(off);
459773ae MH	133	bit = ADP5588_BIT(off);
80884094 MH	134
	135	mutex_lock(&dev->lock);
	136	dev->dir[bank] \|= bit;
	137
	138	if (val)
	139	dev->dat_out[bank] \|= bit;
	140	else
	141	dev->dat_out[bank] &= ~bit;
	142
	143	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	144	dev->dat_out[bank]);
	145	ret \|= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
	146	dev->dir[bank]);
	147	mutex_unlock(&dev->lock);
	148
	149	return ret;
	150	}
	151
459773ae MH	152	#ifdef CONFIG_GPIO_ADP5588_IRQ
	153	static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off)
	154	{
	155	struct adp5588_gpio *dev =
	156	container_of(chip, struct adp5588_gpio, gpio_chip);
	157	return dev->irq_base + off;
	158	}
	159
12401eed	160	static void adp5588_irq_bus_lock(struct irq_data *d)
459773ae	161	{
12401eed LB	162	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	163
459773ae MH	164	mutex_lock(&dev->irq_lock);
	165	}
	166
	167	/*
	168	* genirq core code can issue chip->mask/unmask from atomic context.
	169	* This doesn't work for slow busses where an access needs to sleep.
	170	* bus_sync_unlock() is therefore called outside the atomic context,
	171	* syncs the current irq mask state with the slow external controller
	172	* and unlocks the bus.
	173	*/
	174
12401eed	175	static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
459773ae	176	{
12401eed	177	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
459773ae MH	178	int i;
	179
	180	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++)
	181	if (dev->int_en[i] ^ dev->irq_mask[i]) {
	182	dev->int_en[i] = dev->irq_mask[i];
	183	adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i,
	184	dev->int_en[i]);
	185	}
	186
	187	mutex_unlock(&dev->irq_lock);
	188	}
	189
12401eed	190	static void adp5588_irq_mask(struct irq_data *d)
459773ae	191	{
12401eed LB	192	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	193	unsigned gpio = d->irq - dev->irq_base;
459773ae MH	194
	195	dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio);
	196	}
	197
12401eed	198	static void adp5588_irq_unmask(struct irq_data *d)
459773ae	199	{
12401eed LB	200	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	201	unsigned gpio = d->irq - dev->irq_base;
459773ae MH	202
	203	dev->irq_mask[ADP5588_BANK(gpio)] \|= ADP5588_BIT(gpio);
	204	}
	205
12401eed	206	static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
459773ae	207	{
12401eed LB	208	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	209	uint16_t gpio = d->irq - dev->irq_base;
459773ae MH	210	unsigned bank, bit;
	211
	212	if ((type & IRQ_TYPE_EDGE_BOTH)) {
	213	dev_err(&dev->client->dev, "irq %d: unsupported type %d\n",
12401eed	214	d->irq, type);
459773ae MH	215	return -EINVAL;
	216	}
	217
	218	bank = ADP5588_BANK(gpio);
	219	bit = ADP5588_BIT(gpio);
	220
	221	if (type & IRQ_TYPE_LEVEL_HIGH)
	222	dev->int_lvl[bank] \|= bit;
	223	else if (type & IRQ_TYPE_LEVEL_LOW)
	224	dev->int_lvl[bank] &= ~bit;
	225	else
	226	return -EINVAL;
	227
	228	adp5588_gpio_direction_input(&dev->gpio_chip, gpio);
	229	adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank,
	230	dev->int_lvl[bank]);
	231
	232	return 0;
	233	}
	234
	235	static struct irq_chip adp5588_irq_chip = {
	236	.name = "adp5588",
12401eed LB	237	.irq_mask = adp5588_irq_mask,
	238	.irq_unmask = adp5588_irq_unmask,
	239	.irq_bus_lock = adp5588_irq_bus_lock,
	240	.irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock,
	241	.irq_set_type = adp5588_irq_set_type,
459773ae MH	242	};
	243
	244	static int adp5588_gpio_read_intstat(struct i2c_client client, u8 buf)
	245	{
	246	int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf);
	247
	248	if (ret < 0)
	249	dev_err(&client->dev, "Read INT_STAT Error\n");
	250
	251	return ret;
	252	}
	253
	254	static irqreturn_t adp5588_irq_handler(int irq, void *devid)
	255	{
	256	struct adp5588_gpio *dev = devid;
	257	unsigned status, bank, bit, pending;
	258	int ret;
	259	status = adp5588_gpio_read(dev->client, INT_STAT);
	260
	261	if (status & ADP5588_GPI_INT) {
	262	ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat);
	263	if (ret < 0)
	264	memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));
	265
078dc65e	266	for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
459773ae MH	267	bank++, bit = 0) {
	268	pending = dev->irq_stat[bank] & dev->irq_mask[bank];
	269
	270	while (pending) {
	271	if (pending & (1 << bit)) {
	272	handle_nested_irq(dev->irq_base +
	273	(bank << 3) + bit);
	274	pending &= ~(1 << bit);
	275
	276	}
	277	bit++;
	278	}
	279	}
	280	}
	281
	282	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
	283
	284	return IRQ_HANDLED;
	285	}
	286
	287	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	288	{
	289	struct i2c_client *client = dev->client;
e56aee18 JH	290	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	291	dev_get_platdata(&client->dev);
459773ae MH	292	unsigned gpio;
	293	int ret;
	294
	295	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	296	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
	297	adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */
	298
	299	dev->irq_base = pdata->irq_base;
	300	mutex_init(&dev->irq_lock);
	301
	302	for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
	303	int irq = gpio + dev->irq_base;
b51804bc TG	304	irq_set_chip_data(irq, dev);
b51804bc TG	305	irq_set_chip_and_handler(irq, &adp5588_irq_chip,
459773ae	306	handle_level_irq);
b51804bc	307	irq_set_nested_thread(irq, 1);
23393d49	308	irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
459773ae MH	309	}
	310
	311	ret = request_threaded_irq(client->irq,
	312	NULL,
	313	adp5588_irq_handler,
	314	IRQF_TRIGGER_FALLING \| IRQF_ONESHOT,
	315	dev_name(&client->dev), dev);
	316	if (ret) {
	317	dev_err(&client->dev, "failed to request irq %d\n",
	318	client->irq);
	319	goto out;
	320	}
	321
	322	dev->gpio_chip.to_irq = adp5588_gpio_to_irq;
	323	adp5588_gpio_write(client, CFG,
	324	ADP5588_AUTO_INC \| ADP5588_INT_CFG \| ADP5588_GPI_INT);
	325
	326	return 0;
	327
	328	out:
	329	dev->irq_base = 0;
	330	return ret;
	331	}
	332
	333	static void adp5588_irq_teardown(struct adp5588_gpio *dev)
	334	{
	335	if (dev->irq_base)
	336	free_irq(dev->client->irq, dev);
	337	}
	338
	339	#else
	340	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	341	{
	342	struct i2c_client *client = dev->client;
	343	dev_warn(&client->dev, "interrupt support not compiled in\n");
	344
	345	return 0;
	346	}
	347
	348	static void adp5588_irq_teardown(struct adp5588_gpio *dev)
	349	{
	350	}
	351	#endif /* CONFIG_GPIO_ADP5588_IRQ */
	352
3836309d	353	static int adp5588_gpio_probe(struct i2c_client *client,
80884094 MH	354	const struct i2c_device_id *id)
80884094 MH	355	{
e56aee18 JH	356	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	357	dev_get_platdata(&client->dev);
80884094 MH	358	struct adp5588_gpio *dev;
	359	struct gpio_chip *gc;
	360	int ret, i, revid;
	361
afeb7b45	362	if (!pdata) {
80884094 MH	363	dev_err(&client->dev, "missing platform data\n");
	364	return -ENODEV;
	365	}
	366
	367	if (!i2c_check_functionality(client->adapter,
	368	I2C_FUNC_SMBUS_BYTE_DATA)) {
	369	dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
	370	return -EIO;
	371	}
	372
7898b31e	373	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
afeb7b45	374	if (!dev)
80884094	375	return -ENOMEM;
80884094 MH	376
	377	dev->client = client;
	378
	379	gc = &dev->gpio_chip;
	380	gc->direction_input = adp5588_gpio_direction_input;
	381	gc->direction_output = adp5588_gpio_direction_output;
	382	gc->get = adp5588_gpio_get_value;
	383	gc->set = adp5588_gpio_set_value;
9fb1f39e	384	gc->can_sleep = true;
80884094 MH	385
80884094 MH	386	gc->base = pdata->gpio_start;
459773ae	387	gc->ngpio = ADP5588_MAXGPIO;
80884094 MH	388	gc->label = client->name;
80884094 MH	389	gc->owner = THIS_MODULE;
1163316e	390	gc->names = pdata->names;
80884094 MH	391
	392	mutex_init(&dev->lock);
	393
80884094 MH	394	ret = adp5588_gpio_read(dev->client, DEV_ID);
	395	if (ret < 0)
	396	goto err;
	397
	398	revid = ret & ADP5588_DEVICE_ID_MASK;
	399
459773ae	400	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
80884094 MH	401	dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
	402	dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
	403	ret \|= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
	404	ret \|= adp5588_gpio_write(client, GPIO_PULL1 + i,
	405	(pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
459773ae	406	ret \|= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
80884094 MH	407	if (ret)
	408	goto err;
	409	}
	410
459773ae MH	411	if (pdata->irq_base) {
	412	if (WA_DELAYED_READOUT_REVID(revid)) {
	413	dev_warn(&client->dev, "GPIO int not supported\n");
	414	} else {
	415	ret = adp5588_irq_setup(dev);
	416	if (ret)
	417	goto err;
	418	}
	419	}
	420
80884094 MH	421	ret = gpiochip_add(&dev->gpio_chip);
80884094 MH	422	if (ret)
459773ae	423	goto err_irq;
80884094	424
64842aad GL	425	dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n",
64842aad GL	426	pdata->irq_base, revid);
80884094 MH	427
	428	if (pdata->setup) {
	429	ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
	430	if (ret < 0)
	431	dev_warn(&client->dev, "setup failed, %d\n", ret);
	432	}
	433
	434	i2c_set_clientdata(client, dev);
459773ae	435
80884094 MH	436	return 0;
80884094 MH	437
459773ae MH	438	err_irq:
459773ae MH	439	adp5588_irq_teardown(dev);
80884094	440	err:
80884094 MH	441	return ret;
	442	}
	443
206210ce	444	static int adp5588_gpio_remove(struct i2c_client *client)
80884094	445	{
e56aee18 JH	446	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	447	dev_get_platdata(&client->dev);
80884094 MH	448	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	449	int ret;
	450
	451	if (pdata->teardown) {
	452	ret = pdata->teardown(client,
	453	dev->gpio_chip.base, dev->gpio_chip.ngpio,
	454	pdata->context);
	455	if (ret < 0) {
	456	dev_err(&client->dev, "teardown failed %d\n", ret);
	457	return ret;
	458	}
	459	}
	460
459773ae MH	461	if (dev->irq_base)
	462	free_irq(dev->client->irq, dev);
	463
9f5132ae	464	gpiochip_remove(&dev->gpio_chip);
80884094	465
80884094 MH	466	return 0;
	467	}
	468
	469	static const struct i2c_device_id adp5588_gpio_id[] = {
	470	{DRV_NAME, 0},
	471	{}
	472	};
	473
	474	MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
	475
	476	static struct i2c_driver adp5588_gpio_driver = {
	477	.driver = {
	478	.name = DRV_NAME,
	479	},
	480	.probe = adp5588_gpio_probe,
8283c4ff	481	.remove = adp5588_gpio_remove,
80884094 MH	482	.id_table = adp5588_gpio_id,
	483	};
	484
c8554d32	485	module_i2c_driver(adp5588_gpio_driver);
80884094 MH	486
	487	MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
	488	MODULE_DESCRIPTION("GPIO ADP5588 Driver");
	489	MODULE_LICENSE("GPL");