[linux-2.6-block.git] / drivers / gpio / gpio-adp5588.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * GPIO Chip driver for Analog Devices
 * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
 *
 * Copyright 2009-2010 Analog Devices Inc.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/of_device.h>

#include <linux/platform_data/adp5588.h>

#define DRV_NAME	"adp5588-gpio"

/*
 * Early pre 4.0 Silicon required to delay readout by at least 25ms,
 * since the Event Counter Register updated 25ms after the interrupt
 * asserted.
 */
#define WA_DELAYED_READOUT_REVID(rev)	((rev) < 4)

struct adp5588_gpio {
	struct i2c_client *client;
	struct gpio_chip gpio_chip;
	struct mutex lock;	/* protect cached dir, dat_out */
	/* protect serialized access to the interrupt controller bus */
	struct mutex irq_lock;
	uint8_t dat_out[3];
	uint8_t dir[3];
	uint8_t int_lvl_low[3];
	uint8_t int_lvl_high[3];
	uint8_t int_en[3];
	uint8_t irq_mask[3];
	uint8_t int_input_en[3];
};

static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
{
	int ret = i2c_smbus_read_byte_data(client, reg);

	if (ret < 0)
		dev_err(&client->dev, "Read Error\n");

	return ret;
}

static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
{
	int ret = i2c_smbus_write_byte_data(client, reg, val);

	if (ret < 0)
		dev_err(&client->dev, "Write Error\n");

	return ret;
}

static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev = gpiochip_get_data(chip);
	unsigned bank = ADP5588_BANK(off);
	unsigned bit = ADP5588_BIT(off);
	int val;

	mutex_lock(&dev->lock);

	if (dev->dir[bank] & bit)
		val = dev->dat_out[bank];
	else
		val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);

	mutex_unlock(&dev->lock);

	return !!(val & bit);
}

static void adp5588_gpio_set_value(struct gpio_chip *chip,
				   unsigned off, int val)
{
	unsigned bank, bit;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
			   dev->dat_out[bank]);
	mutex_unlock(&dev->lock);
}

static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
{
	int ret;
	unsigned bank;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] &= ~ADP5588_BIT(off);
	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

static int adp5588_gpio_direction_output(struct gpio_chip *chip,
					 unsigned off, int val)
{
	int ret;
	unsigned bank, bit;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] |= bit;

	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
				 dev->dat_out[bank]);
	ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
				 dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

#ifdef CONFIG_GPIO_ADP5588_IRQ

static void adp5588_irq_bus_lock(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);

	mutex_lock(&dev->irq_lock);
}

 /*
  * genirq core code can issue chip->mask/unmask from atomic context.
  * This doesn't work for slow busses where an access needs to sleep.
  * bus_sync_unlock() is therefore called outside the atomic context,
  * syncs the current irq mask state with the slow external controller
  * and unlocks the bus.
  */

static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);
	int i;

	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
		if (dev->int_input_en[i]) {
			mutex_lock(&dev->lock);
			dev->dir[i] &= ~dev->int_input_en[i];
			dev->int_input_en[i] = 0;
			adp5588_gpio_write(dev->client, GPIO_DIR1 + i,
					   dev->dir[i]);
			mutex_unlock(&dev->lock);
		}

		if (dev->int_en[i] ^ dev->irq_mask[i]) {
			dev->int_en[i] = dev->irq_mask[i];
			adp5588_gpio_write(dev->client, GPI_EM1 + i,
					   dev->int_en[i]);
		}
	}

	mutex_unlock(&dev->irq_lock);
}

static void adp5588_irq_mask(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);

	dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq);
}

static void adp5588_irq_unmask(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);

	dev->irq_mask[ADP5588_BANK(d->hwirq)] |= ADP5588_BIT(d->hwirq);
}

static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);
	uint16_t gpio = d->hwirq;
	unsigned bank, bit;

	bank = ADP5588_BANK(gpio);
	bit = ADP5588_BIT(gpio);

	dev->int_lvl_low[bank] &= ~bit;
	dev->int_lvl_high[bank] &= ~bit;

	if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_HIGH)
		dev->int_lvl_high[bank] |= bit;

	if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_LOW)
		dev->int_lvl_low[bank] |= bit;

	dev->int_input_en[bank] |= bit;

	return 0;
}

static struct irq_chip adp5588_irq_chip = {
	.name			= "adp5588",
	.irq_mask		= adp5588_irq_mask,
	.irq_unmask		= adp5588_irq_unmask,
	.irq_bus_lock		= adp5588_irq_bus_lock,
	.irq_bus_sync_unlock	= adp5588_irq_bus_sync_unlock,
	.irq_set_type		= adp5588_irq_set_type,
};

static irqreturn_t adp5588_irq_handler(int irq, void *devid)
{
	struct adp5588_gpio *dev = devid;
	int status = adp5588_gpio_read(dev->client, INT_STAT);

	if (status & ADP5588_KE_INT) {
		int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT);

		if (ev_cnt > 0) {
			int i;

			for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) {
				int key = adp5588_gpio_read(dev->client,
							    Key_EVENTA + i);
				/* GPIN events begin at 97,
				 * bit 7 indicates logic level
				 */
				int gpio = (key & 0x7f) - 97;
				int lvl = key & (1 << 7);
				int bank = ADP5588_BANK(gpio);
				int bit = ADP5588_BIT(gpio);

				if ((lvl && dev->int_lvl_high[bank] & bit) ||
				    (!lvl && dev->int_lvl_low[bank] & bit))
					handle_nested_irq(irq_find_mapping(
					      dev->gpio_chip.irq.domain, gpio));
			}
		}
	}

	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */

	return IRQ_HANDLED;
}

static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	int ret;
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	int irq_base = pdata ? pdata->irq_base : 0;

	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */

	mutex_init(&dev->irq_lock);

	ret = devm_request_threaded_irq(&client->dev, client->irq,
					NULL, adp5588_irq_handler, IRQF_ONESHOT
					| IRQF_TRIGGER_FALLING | IRQF_SHARED,
					dev_name(&client->dev), dev);
	if (ret) {
		dev_err(&client->dev, "failed to request irq %d\n",
			client->irq);
		return ret;
	}
	ret = gpiochip_irqchip_add_nested(&dev->gpio_chip,
					  &adp5588_irq_chip, irq_base,
					  handle_simple_irq,
					  IRQ_TYPE_NONE);
	if (ret) {
		dev_err(&client->dev,
			"could not connect irqchip to gpiochip\n");
		return ret;
	}
	gpiochip_set_nested_irqchip(&dev->gpio_chip,
				    &adp5588_irq_chip,
				    client->irq);

	adp5588_gpio_write(client, CFG,
		ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_KE_IEN);

	return 0;
}

#else
static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	dev_warn(&client->dev, "interrupt support not compiled in\n");

	return 0;
}

#endif /* CONFIG_GPIO_ADP5588_IRQ */

static int adp5588_gpio_probe(struct i2c_client *client)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev;
	struct gpio_chip *gc;
	int ret, i, revid;
	unsigned int pullup_dis_mask = 0;

	if (!i2c_check_functionality(client->adapter,
					I2C_FUNC_SMBUS_BYTE_DATA)) {
		dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
		return -EIO;
	}

	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	dev->client = client;

	gc = &dev->gpio_chip;
	gc->direction_input = adp5588_gpio_direction_input;
	gc->direction_output = adp5588_gpio_direction_output;
	gc->get = adp5588_gpio_get_value;
	gc->set = adp5588_gpio_set_value;
	gc->can_sleep = true;
	gc->base = -1;
	gc->parent = &client->dev;

	if (pdata) {
		gc->base = pdata->gpio_start;
		gc->names = pdata->names;
		pullup_dis_mask = pdata->pullup_dis_mask;
	}

	gc->ngpio = ADP5588_MAXGPIO;
	gc->label = client->name;
	gc->owner = THIS_MODULE;

	mutex_init(&dev->lock);

	ret = adp5588_gpio_read(dev->client, DEV_ID);
	if (ret < 0)
		return ret;

	revid = ret & ADP5588_DEVICE_ID_MASK;

	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
		dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
		dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
		ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
		ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
				(pullup_dis_mask >> (8 * i)) & 0xFF);
		ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
		if (ret)
			return ret;
	}

	if (client->irq) {
		if (WA_DELAYED_READOUT_REVID(revid)) {
			dev_warn(&client->dev, "GPIO int not supported\n");
		} else {
			ret = adp5588_irq_setup(dev);
			if (ret)
				return ret;
		}
	}

	ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
	if (ret)
		return ret;

	if (pdata && pdata->setup) {
		ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
		if (ret < 0)
			dev_warn(&client->dev, "setup failed, %d\n", ret);
	}

	i2c_set_clientdata(client, dev);

	return 0;
}

static int adp5588_gpio_remove(struct i2c_client *client)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	int ret;

	if (pdata && pdata->teardown) {
		ret = pdata->teardown(client,
				      dev->gpio_chip.base, dev->gpio_chip.ngpio,
				      pdata->context);
		if (ret < 0) {
			dev_err(&client->dev, "teardown failed %d\n", ret);
			return ret;
		}
	}

	if (dev->client->irq)
		free_irq(dev->client->irq, dev);

	return 0;
}

static const struct i2c_device_id adp5588_gpio_id[] = {
	{DRV_NAME, 0},
	{}
};
MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);

#ifdef CONFIG_OF
static const struct of_device_id adp5588_gpio_of_id[] = {
	{ .compatible = "adi," DRV_NAME, },
	{},
};
MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id);
#endif

static struct i2c_driver adp5588_gpio_driver = {
	.driver = {
		.name = DRV_NAME,
		.of_match_table = of_match_ptr(adp5588_gpio_of_id),
	},
	.probe_new = adp5588_gpio_probe,
	.remove = adp5588_gpio_remove,
	.id_table = adp5588_gpio_id,
};

module_i2c_driver(adp5588_gpio_driver);

MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
MODULE_DESCRIPTION("GPIO ADP5588 Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
80503b23	1	// SPDX-License-Identifier: GPL-2.0-or-later
80884094 MH	2	/*
80884094 MH	3	* GPIO Chip driver for Analog Devices
459773ae	4	* ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
80884094	5	*
459773ae	6	* Copyright 2009-2010 Analog Devices Inc.
80884094 MH	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/kernel.h>
5a0e3ad6	11	#include <linux/slab.h>
80884094 MH	12	#include <linux/init.h>
80884094 MH	13	#include <linux/i2c.h>
d543668a	14	#include <linux/gpio/driver.h>
459773ae MH	15	#include <linux/interrupt.h>
459773ae MH	16	#include <linux/irq.h>
9f22af11	17	#include <linux/of_device.h>
80884094	18
c1a46340	19	#include <linux/platform_data/adp5588.h>
80884094	20
459773ae MH	21	#define DRV_NAME "adp5588-gpio"
	22
	23	/*
	24	* Early pre 4.0 Silicon required to delay readout by at least 25ms,
	25	* since the Event Counter Register updated 25ms after the interrupt
	26	* asserted.
	27	*/
	28	#define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4)
80884094 MH	29
	30	struct adp5588_gpio {
	31	struct i2c_client *client;
	32	struct gpio_chip gpio_chip;
	33	struct mutex lock; /* protect cached dir, dat_out */
459773ae MH	34	/* protect serialized access to the interrupt controller bus */
459773ae MH	35	struct mutex irq_lock;
80884094 MH	36	uint8_t dat_out[3];
80884094 MH	37	uint8_t dir[3];
5d643eda NV	38	uint8_t int_lvl_low[3];
5d643eda NV	39	uint8_t int_lvl_high[3];
459773ae MH	40	uint8_t int_en[3];
459773ae MH	41	uint8_t irq_mask[3];
6537886c	42	uint8_t int_input_en[3];
80884094 MH	43	};
	44
	45	static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
	46	{
	47	int ret = i2c_smbus_read_byte_data(client, reg);
	48
	49	if (ret < 0)
	50	dev_err(&client->dev, "Read Error\n");
	51
	52	return ret;
	53	}
	54
	55	static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
	56	{
	57	int ret = i2c_smbus_write_byte_data(client, reg, val);
	58
	59	if (ret < 0)
	60	dev_err(&client->dev, "Write Error\n");
	61
	62	return ret;
	63	}
	64
	65	static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
	66	{
f69255ce	67	struct adp5588_gpio *dev = gpiochip_get_data(chip);
992196f2 JFD	68	unsigned bank = ADP5588_BANK(off);
	69	unsigned bit = ADP5588_BIT(off);
	70	int val;
80884094	71
992196f2 JFD	72	mutex_lock(&dev->lock);
	73
	74	if (dev->dir[bank] & bit)
	75	val = dev->dat_out[bank];
	76	else
	77	val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
	78
	79	mutex_unlock(&dev->lock);
	80
	81	return !!(val & bit);
80884094 MH	82	}
	83
	84	static void adp5588_gpio_set_value(struct gpio_chip *chip,
	85	unsigned off, int val)
	86	{
	87	unsigned bank, bit;
f69255ce	88	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	89
459773ae MH	90	bank = ADP5588_BANK(off);
459773ae MH	91	bit = ADP5588_BIT(off);
80884094 MH	92
	93	mutex_lock(&dev->lock);
	94	if (val)
	95	dev->dat_out[bank] \|= bit;
	96	else
	97	dev->dat_out[bank] &= ~bit;
	98
	99	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	100	dev->dat_out[bank]);
	101	mutex_unlock(&dev->lock);
	102	}
	103
	104	static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
	105	{
	106	int ret;
	107	unsigned bank;
f69255ce	108	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	109
459773ae	110	bank = ADP5588_BANK(off);
80884094 MH	111
80884094 MH	112	mutex_lock(&dev->lock);
459773ae	113	dev->dir[bank] &= ~ADP5588_BIT(off);
80884094 MH	114	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	115	mutex_unlock(&dev->lock);
	116
	117	return ret;
	118	}
	119
	120	static int adp5588_gpio_direction_output(struct gpio_chip *chip,
	121	unsigned off, int val)
	122	{
	123	int ret;
	124	unsigned bank, bit;
f69255ce	125	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	126
459773ae MH	127	bank = ADP5588_BANK(off);
459773ae MH	128	bit = ADP5588_BIT(off);
80884094 MH	129
	130	mutex_lock(&dev->lock);
	131	dev->dir[bank] \|= bit;
	132
	133	if (val)
	134	dev->dat_out[bank] \|= bit;
	135	else
	136	dev->dat_out[bank] &= ~bit;
	137
	138	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	139	dev->dat_out[bank]);
	140	ret \|= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
	141	dev->dir[bank]);
	142	mutex_unlock(&dev->lock);
	143
	144	return ret;
	145	}
	146
459773ae	147	#ifdef CONFIG_GPIO_ADP5588_IRQ
459773ae	148
12401eed	149	static void adp5588_irq_bus_lock(struct irq_data *d)
459773ae	150	{
9f22af11 NV	151	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	152	struct adp5588_gpio *dev = gpiochip_get_data(gc);
12401eed	153
459773ae MH	154	mutex_lock(&dev->irq_lock);
	155	}
	156
	157	/*
	158	* genirq core code can issue chip->mask/unmask from atomic context.
	159	* This doesn't work for slow busses where an access needs to sleep.
	160	* bus_sync_unlock() is therefore called outside the atomic context,
	161	* syncs the current irq mask state with the slow external controller
	162	* and unlocks the bus.
	163	*/
	164
12401eed	165	static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
459773ae	166	{
9f22af11 NV	167	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	168	struct adp5588_gpio *dev = gpiochip_get_data(gc);
459773ae MH	169	int i;
459773ae MH	170
6537886c MH	171	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
	172	if (dev->int_input_en[i]) {
	173	mutex_lock(&dev->lock);
	174	dev->dir[i] &= ~dev->int_input_en[i];
	175	dev->int_input_en[i] = 0;
	176	adp5588_gpio_write(dev->client, GPIO_DIR1 + i,
	177	dev->dir[i]);
	178	mutex_unlock(&dev->lock);
	179	}
	180
459773ae MH	181	if (dev->int_en[i] ^ dev->irq_mask[i]) {
459773ae MH	182	dev->int_en[i] = dev->irq_mask[i];
5d643eda	183	adp5588_gpio_write(dev->client, GPI_EM1 + i,
459773ae MH	184	dev->int_en[i]);
459773ae MH	185	}
6537886c	186	}
459773ae MH	187
	188	mutex_unlock(&dev->irq_lock);
	189	}
	190
12401eed	191	static void adp5588_irq_mask(struct irq_data *d)
459773ae	192	{
9f22af11 NV	193	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	194	struct adp5588_gpio *dev = gpiochip_get_data(gc);
459773ae	195
9f22af11	196	dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq);
459773ae MH	197	}
459773ae MH	198
12401eed	199	static void adp5588_irq_unmask(struct irq_data *d)
459773ae	200	{
9f22af11 NV	201	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	202	struct adp5588_gpio *dev = gpiochip_get_data(gc);
459773ae	203
9f22af11	204	dev->irq_mask[ADP5588_BANK(d->hwirq)] \|= ADP5588_BIT(d->hwirq);
459773ae MH	205	}
459773ae MH	206
12401eed	207	static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
459773ae	208	{
9f22af11 NV	209	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	210	struct adp5588_gpio *dev = gpiochip_get_data(gc);
	211	uint16_t gpio = d->hwirq;
459773ae MH	212	unsigned bank, bit;
459773ae MH	213
459773ae MH	214	bank = ADP5588_BANK(gpio);
	215	bit = ADP5588_BIT(gpio);
	216
5d643eda NV	217	dev->int_lvl_low[bank] &= ~bit;
	218	dev->int_lvl_high[bank] &= ~bit;
	219
	220	if (type & IRQ_TYPE_EDGE_BOTH \|\| type & IRQ_TYPE_LEVEL_HIGH)
	221	dev->int_lvl_high[bank] \|= bit;
	222
	223	if (type & IRQ_TYPE_EDGE_BOTH \|\| type & IRQ_TYPE_LEVEL_LOW)
	224	dev->int_lvl_low[bank] \|= bit;
459773ae	225
6537886c	226	dev->int_input_en[bank] \|= bit;
459773ae MH	227
	228	return 0;
	229	}
	230
	231	static struct irq_chip adp5588_irq_chip = {
	232	.name = "adp5588",
12401eed LB	233	.irq_mask = adp5588_irq_mask,
	234	.irq_unmask = adp5588_irq_unmask,
	235	.irq_bus_lock = adp5588_irq_bus_lock,
	236	.irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock,
	237	.irq_set_type = adp5588_irq_set_type,
459773ae MH	238	};
459773ae MH	239
459773ae MH	240	static irqreturn_t adp5588_irq_handler(int irq, void *devid)
	241	{
	242	struct adp5588_gpio *dev = devid;
5d643eda NV	243	int status = adp5588_gpio_read(dev->client, INT_STAT);
	244
	245	if (status & ADP5588_KE_INT) {
	246	int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT);
	247
	248	if (ev_cnt > 0) {
	249	int i;
	250
	251	for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) {
	252	int key = adp5588_gpio_read(dev->client,
	253	Key_EVENTA + i);
	254	/* GPIN events begin at 97,
	255	* bit 7 indicates logic level
	256	*/
	257	int gpio = (key & 0x7f) - 97;
	258	int lvl = key & (1 << 7);
	259	int bank = ADP5588_BANK(gpio);
	260	int bit = ADP5588_BIT(gpio);
	261
	262	if ((lvl && dev->int_lvl_high[bank] & bit) \|\|
	263	(!lvl && dev->int_lvl_low[bank] & bit))
	264	handle_nested_irq(irq_find_mapping(
	265	dev->gpio_chip.irq.domain, gpio));
459773ae MH	266	}
	267	}
	268	}
	269
	270	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
	271
	272	return IRQ_HANDLED;
	273	}
	274
	275	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	276	{
	277	struct i2c_client *client = dev->client;
9f22af11	278	int ret;
e56aee18 JH	279	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	280	dev_get_platdata(&client->dev);
9f22af11	281	int irq_base = pdata ? pdata->irq_base : 0;
459773ae MH	282
	283	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	284	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
459773ae	285
459773ae MH	286	mutex_init(&dev->irq_lock);
459773ae MH	287
9f22af11 NV	288	ret = devm_request_threaded_irq(&client->dev, client->irq,
	289	NULL, adp5588_irq_handler, IRQF_ONESHOT
	290	\| IRQF_TRIGGER_FALLING \| IRQF_SHARED,
	291	dev_name(&client->dev), dev);
459773ae MH	292	if (ret) {
	293	dev_err(&client->dev, "failed to request irq %d\n",
	294	client->irq);
9f22af11 NV	295	return ret;
	296	}
	297	ret = gpiochip_irqchip_add_nested(&dev->gpio_chip,
	298	&adp5588_irq_chip, irq_base,
	299	handle_simple_irq,
	300	IRQ_TYPE_NONE);
	301	if (ret) {
	302	dev_err(&client->dev,
	303	"could not connect irqchip to gpiochip\n");
	304	return ret;
459773ae	305	}
9f22af11 NV	306	gpiochip_set_nested_irqchip(&dev->gpio_chip,
	307	&adp5588_irq_chip,
	308	client->irq);
459773ae	309
459773ae	310	adp5588_gpio_write(client, CFG,
5d643eda	311	ADP5588_AUTO_INC \| ADP5588_INT_CFG \| ADP5588_KE_IEN);
459773ae MH	312
459773ae MH	313	return 0;
459773ae MH	314	}
	315
	316	#else
	317	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	318	{
	319	struct i2c_client *client = dev->client;
	320	dev_warn(&client->dev, "interrupt support not compiled in\n");
	321
	322	return 0;
	323	}
	324
459773ae MH	325	#endif /* CONFIG_GPIO_ADP5588_IRQ */
459773ae MH	326
9f22af11	327	static int adp5588_gpio_probe(struct i2c_client *client)
80884094	328	{
e56aee18 JH	329	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	330	dev_get_platdata(&client->dev);
80884094 MH	331	struct adp5588_gpio *dev;
	332	struct gpio_chip *gc;
	333	int ret, i, revid;
9f22af11	334	unsigned int pullup_dis_mask = 0;
80884094 MH	335
	336	if (!i2c_check_functionality(client->adapter,
	337	I2C_FUNC_SMBUS_BYTE_DATA)) {
	338	dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
	339	return -EIO;
	340	}
	341
7898b31e	342	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
afeb7b45	343	if (!dev)
80884094	344	return -ENOMEM;
80884094 MH	345
	346	dev->client = client;
	347
	348	gc = &dev->gpio_chip;
	349	gc->direction_input = adp5588_gpio_direction_input;
	350	gc->direction_output = adp5588_gpio_direction_output;
	351	gc->get = adp5588_gpio_get_value;
	352	gc->set = adp5588_gpio_set_value;
9fb1f39e	353	gc->can_sleep = true;
9f22af11 NV	354	gc->base = -1;
	355	gc->parent = &client->dev;
	356
	357	if (pdata) {
	358	gc->base = pdata->gpio_start;
	359	gc->names = pdata->names;
	360	pullup_dis_mask = pdata->pullup_dis_mask;
	361	}
80884094	362
459773ae	363	gc->ngpio = ADP5588_MAXGPIO;
80884094 MH	364	gc->label = client->name;
	365	gc->owner = THIS_MODULE;
	366
	367	mutex_init(&dev->lock);
	368
80884094 MH	369	ret = adp5588_gpio_read(dev->client, DEV_ID);
80884094 MH	370	if (ret < 0)
9f22af11	371	return ret;
80884094 MH	372
	373	revid = ret & ADP5588_DEVICE_ID_MASK;
	374
459773ae	375	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
80884094 MH	376	dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
	377	dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
	378	ret \|= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
	379	ret \|= adp5588_gpio_write(client, GPIO_PULL1 + i,
9f22af11	380	(pullup_dis_mask >> (8 * i)) & 0xFF);
459773ae	381	ret \|= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
80884094	382	if (ret)
9f22af11	383	return ret;
80884094 MH	384	}
80884094 MH	385
9f22af11	386	if (client->irq) {
459773ae MH	387	if (WA_DELAYED_READOUT_REVID(revid)) {
	388	dev_warn(&client->dev, "GPIO int not supported\n");
	389	} else {
	390	ret = adp5588_irq_setup(dev);
	391	if (ret)
9f22af11	392	return ret;
459773ae MH	393	}
	394	}
	395
7c263fe0	396	ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
80884094	397	if (ret)
9f22af11	398	return ret;
80884094	399
9f22af11	400	if (pdata && pdata->setup) {
80884094 MH	401	ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
	402	if (ret < 0)
	403	dev_warn(&client->dev, "setup failed, %d\n", ret);
	404	}
	405
	406	i2c_set_clientdata(client, dev);
459773ae	407
80884094	408	return 0;
80884094 MH	409	}
80884094 MH	410
206210ce	411	static int adp5588_gpio_remove(struct i2c_client *client)
80884094	412	{
e56aee18 JH	413	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	414	dev_get_platdata(&client->dev);
80884094 MH	415	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	416	int ret;
	417
9f22af11	418	if (pdata && pdata->teardown) {
80884094 MH	419	ret = pdata->teardown(client,
	420	dev->gpio_chip.base, dev->gpio_chip.ngpio,
	421	pdata->context);
	422	if (ret < 0) {
	423	dev_err(&client->dev, "teardown failed %d\n", ret);
	424	return ret;
	425	}
	426	}
	427
9f22af11	428	if (dev->client->irq)
459773ae MH	429	free_irq(dev->client->irq, dev);
459773ae MH	430
80884094 MH	431	return 0;
	432	}
	433
	434	static const struct i2c_device_id adp5588_gpio_id[] = {
	435	{DRV_NAME, 0},
	436	{}
	437	};
80884094 MH	438	MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
80884094 MH	439
9f22af11 NV	440	#ifdef CONFIG_OF
	441	static const struct of_device_id adp5588_gpio_of_id[] = {
	442	{ .compatible = "adi," DRV_NAME, },
	443	{},
	444	};
	445	MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id);
	446	#endif
	447
80884094 MH	448	static struct i2c_driver adp5588_gpio_driver = {
80884094 MH	449	.driver = {
9f22af11 NV	450	.name = DRV_NAME,
	451	.of_match_table = of_match_ptr(adp5588_gpio_of_id),
	452	},
	453	.probe_new = adp5588_gpio_probe,
8283c4ff	454	.remove = adp5588_gpio_remove,
80884094 MH	455	.id_table = adp5588_gpio_id,
	456	};
	457
c8554d32	458	module_i2c_driver(adp5588_gpio_driver);
80884094	459
be887843	460	MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
80884094 MH	461	MODULE_DESCRIPTION("GPIO ADP5588 Driver");
80884094 MH	462	MODULE_LICENSE("GPL");