dt-bindings: hwmon: Add IBM OCC bindings
[linux-2.6-block.git] / drivers / fsi / fsi-occ.c
CommitLineData
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1// SPDX-License-Identifier: GPL-2.0
2
3#include <linux/device.h>
4#include <linux/err.h>
5#include <linux/errno.h>
6#include <linux/fs.h>
7#include <linux/fsi-sbefifo.h>
8#include <linux/gfp.h>
9#include <linux/idr.h>
10#include <linux/kernel.h>
11#include <linux/list.h>
12#include <linux/miscdevice.h>
008d3825 13#include <linux/mm.h>
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14#include <linux/module.h>
15#include <linux/mutex.h>
16#include <linux/fsi-occ.h>
17#include <linux/of.h>
5ec96d74 18#include <linux/of_device.h>
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19#include <linux/platform_device.h>
20#include <linux/sched.h>
21#include <linux/slab.h>
22#include <linux/uaccess.h>
23#include <asm/unaligned.h>
24
25#define OCC_SRAM_BYTES 4096
26#define OCC_CMD_DATA_BYTES 4090
27#define OCC_RESP_DATA_BYTES 4089
28
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29#define OCC_P9_SRAM_CMD_ADDR 0xFFFBE000
30#define OCC_P9_SRAM_RSP_ADDR 0xFFFBF000
31
32#define OCC_P10_SRAM_CMD_ADDR 0xFFFFD000
33#define OCC_P10_SRAM_RSP_ADDR 0xFFFFE000
34
35#define OCC_P10_SRAM_MODE 0x58 /* Normal mode, OCB channel 2 */
7ed98ddd 36
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37#define OCC_TIMEOUT_MS 1000
38#define OCC_CMD_IN_PRG_WAIT_MS 50
39
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40enum versions { occ_p9, occ_p10 };
41
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42struct occ {
43 struct device *dev;
44 struct device *sbefifo;
45 char name[32];
46 int idx;
62f79f3d 47 u8 sequence_number;
008d3825 48 void *buffer;
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49 void *client_buffer;
50 size_t client_buffer_size;
51 size_t client_response_size;
5ec96d74 52 enum versions version;
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53 struct miscdevice mdev;
54 struct mutex occ_lock;
55};
56
57#define to_occ(x) container_of((x), struct occ, mdev)
58
59struct occ_response {
60 u8 seq_no;
61 u8 cmd_type;
62 u8 return_status;
63 __be16 data_length;
64 u8 data[OCC_RESP_DATA_BYTES + 2]; /* two bytes checksum */
65} __packed;
66
67struct occ_client {
68 struct occ *occ;
69 struct mutex lock;
70 size_t data_size;
71 size_t read_offset;
72 u8 *buffer;
73};
74
75#define to_client(x) container_of((x), struct occ_client, xfr)
76
77static DEFINE_IDA(occ_ida);
78
79static int occ_open(struct inode *inode, struct file *file)
80{
81 struct occ_client *client = kzalloc(sizeof(*client), GFP_KERNEL);
82 struct miscdevice *mdev = file->private_data;
83 struct occ *occ = to_occ(mdev);
84
85 if (!client)
86 return -ENOMEM;
87
88 client->buffer = (u8 *)__get_free_page(GFP_KERNEL);
89 if (!client->buffer) {
90 kfree(client);
91 return -ENOMEM;
92 }
93
94 client->occ = occ;
95 mutex_init(&client->lock);
96 file->private_data = client;
d3e1e246 97 get_device(occ->dev);
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98
99 /* We allocate a 1-page buffer, make sure it all fits */
100 BUILD_BUG_ON((OCC_CMD_DATA_BYTES + 3) > PAGE_SIZE);
101 BUILD_BUG_ON((OCC_RESP_DATA_BYTES + 7) > PAGE_SIZE);
102
103 return 0;
104}
105
106static ssize_t occ_read(struct file *file, char __user *buf, size_t len,
107 loff_t *offset)
108{
109 struct occ_client *client = file->private_data;
110 ssize_t rc = 0;
111
112 if (!client)
113 return -ENODEV;
114
115 if (len > OCC_SRAM_BYTES)
116 return -EINVAL;
117
118 mutex_lock(&client->lock);
119
120 /* This should not be possible ... */
121 if (WARN_ON_ONCE(client->read_offset > client->data_size)) {
122 rc = -EIO;
123 goto done;
124 }
125
126 /* Grab how much data we have to read */
127 rc = min(len, client->data_size - client->read_offset);
128 if (copy_to_user(buf, client->buffer + client->read_offset, rc))
129 rc = -EFAULT;
130 else
131 client->read_offset += rc;
132
133 done:
134 mutex_unlock(&client->lock);
135
136 return rc;
137}
138
139static ssize_t occ_write(struct file *file, const char __user *buf,
140 size_t len, loff_t *offset)
141{
142 struct occ_client *client = file->private_data;
143 size_t rlen, data_length;
62f79f3d 144 ssize_t rc;
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145 u8 *cmd;
146
147 if (!client)
148 return -ENODEV;
149
150 if (len > (OCC_CMD_DATA_BYTES + 3) || len < 3)
151 return -EINVAL;
152
153 mutex_lock(&client->lock);
154
155 /* Construct the command */
156 cmd = client->buffer;
157
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158 /*
159 * Copy the user command (assume user data follows the occ command
160 * format)
161 * byte 0: command type
162 * bytes 1-2: data length (msb first)
163 * bytes 3-n: data
164 */
165 if (copy_from_user(&cmd[1], buf, len)) {
166 rc = -EFAULT;
167 goto done;
168 }
169
170 /* Extract data length */
171 data_length = (cmd[2] << 8) + cmd[3];
172 if (data_length > OCC_CMD_DATA_BYTES) {
173 rc = -EINVAL;
174 goto done;
175 }
176
62f79f3d 177 /* Submit command; 4 bytes before the data and 2 bytes after */
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178 rlen = PAGE_SIZE;
179 rc = fsi_occ_submit(client->occ->dev, cmd, data_length + 6, cmd,
180 &rlen);
181 if (rc)
182 goto done;
183
184 /* Set read tracking data */
185 client->data_size = rlen;
186 client->read_offset = 0;
187
188 /* Done */
189 rc = len;
190
191 done:
192 mutex_unlock(&client->lock);
193
194 return rc;
195}
196
197static int occ_release(struct inode *inode, struct file *file)
198{
199 struct occ_client *client = file->private_data;
200
d3e1e246 201 put_device(client->occ->dev);
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202 free_page((unsigned long)client->buffer);
203 kfree(client);
204
205 return 0;
206}
207
208static const struct file_operations occ_fops = {
209 .owner = THIS_MODULE,
210 .open = occ_open,
211 .read = occ_read,
212 .write = occ_write,
213 .release = occ_release,
214};
215
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216static void occ_save_ffdc(struct occ *occ, __be32 *resp, size_t parsed_len,
217 size_t resp_len)
218{
219 if (resp_len > parsed_len) {
220 size_t dh = resp_len - parsed_len;
221 size_t ffdc_len = (dh - 1) * 4; /* SBE words are four bytes */
222 __be32 *ffdc = &resp[parsed_len];
223
224 if (ffdc_len > occ->client_buffer_size)
225 ffdc_len = occ->client_buffer_size;
226
227 memcpy(occ->client_buffer, ffdc, ffdc_len);
228 occ->client_response_size = ffdc_len;
229 }
230}
231
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232static int occ_verify_checksum(struct occ *occ, struct occ_response *resp,
233 u16 data_length)
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234{
235 /* Fetch the two bytes after the data for the checksum. */
236 u16 checksum_resp = get_unaligned_be16(&resp->data[data_length]);
237 u16 checksum;
238 u16 i;
239
240 checksum = resp->seq_no;
241 checksum += resp->cmd_type;
242 checksum += resp->return_status;
243 checksum += (data_length >> 8) + (data_length & 0xFF);
244
245 for (i = 0; i < data_length; ++i)
246 checksum += resp->data[i];
247
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248 if (checksum != checksum_resp) {
249 dev_err(occ->dev, "Bad checksum: %04x!=%04x\n", checksum,
250 checksum_resp);
7326939f 251 return -EBADE;
614f0a50 252 }
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253
254 return 0;
255}
256
5ec96d74 257static int occ_getsram(struct occ *occ, u32 offset, void *data, ssize_t len)
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258{
259 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
8ec3cc9f 260 size_t cmd_len, parsed_len, resp_data_len;
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261 size_t resp_len = OCC_MAX_RESP_WORDS;
262 __be32 *resp = occ->buffer;
263 __be32 cmd[6];
5ec96d74 264 int idx = 0, rc;
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265
266 /*
267 * Magic sequence to do SBE getsram command. SBE will fetch data from
268 * specified SRAM address.
269 */
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270 switch (occ->version) {
271 default:
272 case occ_p9:
273 cmd_len = 5;
274 cmd[2] = cpu_to_be32(1); /* Normal mode */
275 cmd[3] = cpu_to_be32(OCC_P9_SRAM_RSP_ADDR + offset);
276 break;
277 case occ_p10:
278 idx = 1;
279 cmd_len = 6;
280 cmd[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
281 cmd[3] = 0;
282 cmd[4] = cpu_to_be32(OCC_P10_SRAM_RSP_ADDR + offset);
283 break;
284 }
285
286 cmd[0] = cpu_to_be32(cmd_len);
7ed98ddd 287 cmd[1] = cpu_to_be32(SBEFIFO_CMD_GET_OCC_SRAM);
5ec96d74 288 cmd[4 + idx] = cpu_to_be32(data_len);
7ed98ddd 289
5ec96d74 290 rc = sbefifo_submit(occ->sbefifo, cmd, cmd_len, resp, &resp_len);
7ed98ddd 291 if (rc)
008d3825 292 return rc;
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293
294 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_GET_OCC_SRAM,
8ec3cc9f 295 resp, resp_len, &parsed_len);
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296 if (rc > 0) {
297 dev_err(occ->dev, "SRAM read returned failure status: %08x\n",
298 rc);
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299 occ_save_ffdc(occ, resp, parsed_len, resp_len);
300 return -ECOMM;
008d3825
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301 } else if (rc) {
302 return rc;
303 }
7ed98ddd 304
8ec3cc9f 305 resp_data_len = be32_to_cpu(resp[parsed_len - 1]);
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306 if (resp_data_len != data_len) {
307 dev_err(occ->dev, "SRAM read expected %d bytes got %zd\n",
308 data_len, resp_data_len);
309 rc = -EBADMSG;
310 } else {
311 memcpy(data, resp, len);
312 }
313
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314 return rc;
315}
316
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317static int occ_putsram(struct occ *occ, const void *data, ssize_t len,
318 u8 seq_no, u16 checksum)
7ed98ddd 319{
7ed98ddd 320 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
8ec3cc9f 321 size_t cmd_len, parsed_len, resp_data_len;
008d3825
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322 size_t resp_len = OCC_MAX_RESP_WORDS;
323 __be32 *buf = occ->buffer;
62f79f3d 324 u8 *byte_buf;
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325 int idx = 0, rc;
326
327 cmd_len = (occ->version == occ_p10) ? 6 : 5;
5ec96d74 328 cmd_len += data_len >> 2;
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329
330 /*
331 * Magic sequence to do SBE putsram command. SBE will transfer
332 * data to specified SRAM address.
333 */
334 buf[0] = cpu_to_be32(cmd_len);
335 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
7ed98ddd 336
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337 switch (occ->version) {
338 default:
339 case occ_p9:
340 buf[2] = cpu_to_be32(1); /* Normal mode */
341 buf[3] = cpu_to_be32(OCC_P9_SRAM_CMD_ADDR);
342 break;
343 case occ_p10:
344 idx = 1;
345 buf[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
346 buf[3] = 0;
347 buf[4] = cpu_to_be32(OCC_P10_SRAM_CMD_ADDR);
348 break;
349 }
350
351 buf[4 + idx] = cpu_to_be32(data_len);
352 memcpy(&buf[5 + idx], data, len);
7ed98ddd 353
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354 byte_buf = (u8 *)&buf[5 + idx];
355 /*
356 * Overwrite the first byte with our sequence number and the last two
357 * bytes with the checksum.
358 */
359 byte_buf[0] = seq_no;
360 byte_buf[len - 2] = checksum >> 8;
361 byte_buf[len - 1] = checksum & 0xff;
362
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363 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
364 if (rc)
008d3825 365 return rc;
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366
367 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
8ec3cc9f 368 buf, resp_len, &parsed_len);
008d3825
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369 if (rc > 0) {
370 dev_err(occ->dev, "SRAM write returned failure status: %08x\n",
371 rc);
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372 occ_save_ffdc(occ, buf, parsed_len, resp_len);
373 return -ECOMM;
008d3825
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374 } else if (rc) {
375 return rc;
376 }
7ed98ddd 377
8ec3cc9f 378 if (parsed_len != 1) {
7ed98ddd 379 dev_err(occ->dev, "SRAM write response length invalid: %zd\n",
8ec3cc9f 380 parsed_len);
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381 rc = -EBADMSG;
382 } else {
383 resp_data_len = be32_to_cpu(buf[0]);
384 if (resp_data_len != data_len) {
385 dev_err(occ->dev,
386 "SRAM write expected %d bytes got %zd\n",
387 data_len, resp_data_len);
388 rc = -EBADMSG;
389 }
390 }
391
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392 return rc;
393}
394
395static int occ_trigger_attn(struct occ *occ)
396{
008d3825 397 __be32 *buf = occ->buffer;
8ec3cc9f 398 size_t cmd_len, parsed_len, resp_data_len;
008d3825 399 size_t resp_len = OCC_MAX_RESP_WORDS;
5ec96d74 400 int idx = 0, rc;
7ed98ddd 401
5ec96d74
EJ
402 switch (occ->version) {
403 default:
404 case occ_p9:
405 cmd_len = 7;
406 buf[2] = cpu_to_be32(3); /* Circular mode */
407 buf[3] = 0;
408 break;
409 case occ_p10:
410 idx = 1;
411 cmd_len = 8;
412 buf[2] = cpu_to_be32(0xd0); /* Circular mode, OCB Channel 1 */
413 buf[3] = 0;
414 buf[4] = 0;
415 break;
416 }
417
418 buf[0] = cpu_to_be32(cmd_len); /* Chip-op length in words */
7ed98ddd 419 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
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420 buf[4 + idx] = cpu_to_be32(8); /* Data length in bytes */
421 buf[5 + idx] = cpu_to_be32(0x20010000); /* Trigger OCC attention */
422 buf[6 + idx] = 0;
7ed98ddd 423
5ec96d74 424 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
7ed98ddd 425 if (rc)
008d3825 426 return rc;
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427
428 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
8ec3cc9f 429 buf, resp_len, &parsed_len);
008d3825
EJ
430 if (rc > 0) {
431 dev_err(occ->dev, "SRAM attn returned failure status: %08x\n",
432 rc);
8ec3cc9f
EJ
433 occ_save_ffdc(occ, buf, parsed_len, resp_len);
434 return -ECOMM;
008d3825
EJ
435 } else if (rc) {
436 return rc;
437 }
7ed98ddd 438
8ec3cc9f 439 if (parsed_len != 1) {
7ed98ddd 440 dev_err(occ->dev, "SRAM attn response length invalid: %zd\n",
8ec3cc9f 441 parsed_len);
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442 rc = -EBADMSG;
443 } else {
444 resp_data_len = be32_to_cpu(buf[0]);
445 if (resp_data_len != 8) {
446 dev_err(occ->dev,
447 "SRAM attn expected 8 bytes got %zd\n",
448 resp_data_len);
449 rc = -EBADMSG;
450 }
451 }
452
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453 return rc;
454}
455
3dcf3c84
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456static bool fsi_occ_response_not_ready(struct occ_response *resp, u8 seq_no,
457 u8 cmd_type)
458{
459 return resp->return_status == OCC_RESP_CMD_IN_PRG ||
460 resp->return_status == OCC_RESP_CRIT_INIT ||
461 resp->seq_no != seq_no || resp->cmd_type != cmd_type;
462}
463
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464int fsi_occ_submit(struct device *dev, const void *request, size_t req_len,
465 void *response, size_t *resp_len)
466{
467 const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS);
468 const unsigned long wait_time =
469 msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS);
470 struct occ *occ = dev_get_drvdata(dev);
471 struct occ_response *resp = response;
8ec3cc9f 472 size_t user_resp_len = *resp_len;
afd26118 473 u8 seq_no;
3dcf3c84 474 u8 cmd_type;
62f79f3d 475 u16 checksum = 0;
7ed98ddd 476 u16 resp_data_length;
62f79f3d 477 const u8 *byte_request = (const u8 *)request;
3dcf3c84 478 unsigned long end;
7ed98ddd 479 int rc;
62f79f3d 480 size_t i;
7ed98ddd 481
8ec3cc9f
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482 *resp_len = 0;
483
7ed98ddd
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484 if (!occ)
485 return -ENODEV;
486
8ec3cc9f
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487 if (user_resp_len < 7) {
488 dev_dbg(dev, "Bad resplen %zd\n", user_resp_len);
7ed98ddd
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489 return -EINVAL;
490 }
491
3dcf3c84
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492 cmd_type = byte_request[1];
493
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494 /* Checksum the request, ignoring first byte (sequence number). */
495 for (i = 1; i < req_len - 2; ++i)
496 checksum += byte_request[i];
497
d3e1e246
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498 rc = mutex_lock_interruptible(&occ->occ_lock);
499 if (rc)
500 return rc;
7ed98ddd 501
8ec3cc9f
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502 occ->client_buffer = response;
503 occ->client_buffer_size = user_resp_len;
504 occ->client_response_size = 0;
505
d3e1e246
EJ
506 if (!occ->buffer) {
507 rc = -ENOENT;
508 goto done;
509 }
510
62f79f3d
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511 /*
512 * Get a sequence number and update the counter. Avoid a sequence
513 * number of 0 which would pass the response check below even if the
514 * OCC response is uninitialized. Any sequence number the user is
515 * trying to send is overwritten since this function is the only common
516 * interface to the OCC and therefore the only place we can guarantee
517 * unique sequence numbers.
518 */
519 seq_no = occ->sequence_number++;
520 if (!occ->sequence_number)
521 occ->sequence_number = 1;
522 checksum += seq_no;
523
524 rc = occ_putsram(occ, request, req_len, seq_no, checksum);
7ed98ddd
EJ
525 if (rc)
526 goto done;
527
528 rc = occ_trigger_attn(occ);
529 if (rc)
530 goto done;
531
3dcf3c84
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532 end = jiffies + timeout;
533 while (true) {
534 /* Read occ response header */
5ec96d74 535 rc = occ_getsram(occ, 0, resp, 8);
7ed98ddd
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536 if (rc)
537 goto done;
538
3dcf3c84
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539 if (fsi_occ_response_not_ready(resp, seq_no, cmd_type)) {
540 if (time_after(jiffies, end)) {
541 dev_err(occ->dev,
542 "resp timeout status=%02x seq=%d cmd=%d, our seq=%d cmd=%d\n",
afd26118 543 resp->return_status, resp->seq_no,
3dcf3c84
EJ
544 resp->cmd_type, seq_no, cmd_type);
545 rc = -ETIMEDOUT;
afd26118
EJ
546 goto done;
547 }
7ed98ddd
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548
549 set_current_state(TASK_UNINTERRUPTIBLE);
550 schedule_timeout(wait_time);
3dcf3c84
EJ
551 } else {
552 /* Extract size of response data */
553 resp_data_length =
554 get_unaligned_be16(&resp->data_length);
555
556 /*
557 * Message size is data length + 5 bytes header + 2
558 * bytes checksum
559 */
560 if ((resp_data_length + 7) > user_resp_len) {
561 rc = -EMSGSIZE;
562 goto done;
563 }
7ed98ddd 564
3dcf3c84
EJ
565 /*
566 * Get the entire response including the header again,
567 * in case it changed
568 */
569 if (resp_data_length > 1) {
570 rc = occ_getsram(occ, 0, resp,
571 resp_data_length + 7);
572 if (rc)
573 goto done;
574
575 if (!fsi_occ_response_not_ready(resp, seq_no,
576 cmd_type))
577 break;
578 } else {
579 break;
580 }
581 }
7ed98ddd
EJ
582 }
583
584 dev_dbg(dev, "resp_status=%02x resp_data_len=%d\n",
585 resp->return_status, resp_data_length);
586
614f0a50 587 rc = occ_verify_checksum(occ, resp, resp_data_length);
7326939f
EJ
588 if (rc)
589 goto done;
590
591 occ->client_response_size = resp_data_length + 7;
7ed98ddd
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592
593 done:
8ec3cc9f 594 *resp_len = occ->client_response_size;
7ed98ddd
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595 mutex_unlock(&occ->occ_lock);
596
597 return rc;
598}
599EXPORT_SYMBOL_GPL(fsi_occ_submit);
600
601static int occ_unregister_child(struct device *dev, void *data)
602{
603 struct platform_device *hwmon_dev = to_platform_device(dev);
604
605 platform_device_unregister(hwmon_dev);
606
607 return 0;
608}
609
610static int occ_probe(struct platform_device *pdev)
611{
612 int rc;
613 u32 reg;
614 struct occ *occ;
615 struct platform_device *hwmon_dev;
616 struct device *dev = &pdev->dev;
617 struct platform_device_info hwmon_dev_info = {
618 .parent = dev,
619 .name = "occ-hwmon",
620 };
621
622 occ = devm_kzalloc(dev, sizeof(*occ), GFP_KERNEL);
623 if (!occ)
624 return -ENOMEM;
625
008d3825
EJ
626 /* SBE words are always four bytes */
627 occ->buffer = kvmalloc(OCC_MAX_RESP_WORDS * 4, GFP_KERNEL);
628 if (!occ->buffer)
629 return -ENOMEM;
630
5ec96d74 631 occ->version = (uintptr_t)of_device_get_match_data(dev);
7ed98ddd
EJ
632 occ->dev = dev;
633 occ->sbefifo = dev->parent;
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634 /*
635 * Quickly derive a pseudo-random number from jiffies so that
636 * re-probing the driver doesn't accidentally overlap sequence numbers.
637 */
638 occ->sequence_number = (u8)((jiffies % 0xff) + 1);
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639 mutex_init(&occ->occ_lock);
640
641 if (dev->of_node) {
642 rc = of_property_read_u32(dev->of_node, "reg", &reg);
643 if (!rc) {
644 /* make sure we don't have a duplicate from dts */
645 occ->idx = ida_simple_get(&occ_ida, reg, reg + 1,
646 GFP_KERNEL);
647 if (occ->idx < 0)
648 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
649 GFP_KERNEL);
650 } else {
651 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
652 GFP_KERNEL);
653 }
654 } else {
655 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, GFP_KERNEL);
656 }
657
658 platform_set_drvdata(pdev, occ);
659
660 snprintf(occ->name, sizeof(occ->name), "occ%d", occ->idx);
661 occ->mdev.fops = &occ_fops;
662 occ->mdev.minor = MISC_DYNAMIC_MINOR;
663 occ->mdev.name = occ->name;
664 occ->mdev.parent = dev;
665
666 rc = misc_register(&occ->mdev);
667 if (rc) {
668 dev_err(dev, "failed to register miscdevice: %d\n", rc);
669 ida_simple_remove(&occ_ida, occ->idx);
008d3825 670 kvfree(occ->buffer);
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671 return rc;
672 }
673
674 hwmon_dev_info.id = occ->idx;
675 hwmon_dev = platform_device_register_full(&hwmon_dev_info);
3c3c4848 676 if (IS_ERR(hwmon_dev))
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677 dev_warn(dev, "failed to create hwmon device\n");
678
679 return 0;
680}
681
682static int occ_remove(struct platform_device *pdev)
683{
684 struct occ *occ = platform_get_drvdata(pdev);
685
686 misc_deregister(&occ->mdev);
687
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688 mutex_lock(&occ->occ_lock);
689 kvfree(occ->buffer);
690 occ->buffer = NULL;
691 mutex_unlock(&occ->occ_lock);
692
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693 device_for_each_child(&pdev->dev, NULL, occ_unregister_child);
694
695 ida_simple_remove(&occ_ida, occ->idx);
696
697 return 0;
698}
699
700static const struct of_device_id occ_match[] = {
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701 {
702 .compatible = "ibm,p9-occ",
703 .data = (void *)occ_p9
704 },
705 {
706 .compatible = "ibm,p10-occ",
707 .data = (void *)occ_p10
708 },
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709 { },
710};
19a52178 711MODULE_DEVICE_TABLE(of, occ_match);
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712
713static struct platform_driver occ_driver = {
714 .driver = {
715 .name = "occ",
716 .of_match_table = occ_match,
717 },
718 .probe = occ_probe,
719 .remove = occ_remove,
720};
721
722static int occ_init(void)
723{
724 return platform_driver_register(&occ_driver);
725}
726
727static void occ_exit(void)
728{
729 platform_driver_unregister(&occ_driver);
730
731 ida_destroy(&occ_ida);
732}
733
734module_init(occ_init);
735module_exit(occ_exit);
736
737MODULE_AUTHOR("Eddie James <eajames@linux.ibm.com>");
738MODULE_DESCRIPTION("BMC P9 OCC driver");
739MODULE_LICENSE("GPL");