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7ed98ddd EJ |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | ||
3 | #include <linux/device.h> | |
4 | #include <linux/err.h> | |
5 | #include <linux/errno.h> | |
6 | #include <linux/fs.h> | |
7 | #include <linux/fsi-sbefifo.h> | |
8 | #include <linux/gfp.h> | |
9 | #include <linux/idr.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/list.h> | |
12 | #include <linux/miscdevice.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/mutex.h> | |
15 | #include <linux/fsi-occ.h> | |
16 | #include <linux/of.h> | |
5ec96d74 | 17 | #include <linux/of_device.h> |
7ed98ddd EJ |
18 | #include <linux/platform_device.h> |
19 | #include <linux/sched.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/uaccess.h> | |
22 | #include <asm/unaligned.h> | |
23 | ||
24 | #define OCC_SRAM_BYTES 4096 | |
25 | #define OCC_CMD_DATA_BYTES 4090 | |
26 | #define OCC_RESP_DATA_BYTES 4089 | |
27 | ||
5ec96d74 EJ |
28 | #define OCC_P9_SRAM_CMD_ADDR 0xFFFBE000 |
29 | #define OCC_P9_SRAM_RSP_ADDR 0xFFFBF000 | |
30 | ||
31 | #define OCC_P10_SRAM_CMD_ADDR 0xFFFFD000 | |
32 | #define OCC_P10_SRAM_RSP_ADDR 0xFFFFE000 | |
33 | ||
34 | #define OCC_P10_SRAM_MODE 0x58 /* Normal mode, OCB channel 2 */ | |
7ed98ddd EJ |
35 | |
36 | /* | |
37 | * Assume we don't have much FFDC, if we do we'll overflow and | |
38 | * fail the command. This needs to be big enough for simple | |
39 | * commands as well. | |
40 | */ | |
41 | #define OCC_SBE_STATUS_WORDS 32 | |
42 | ||
43 | #define OCC_TIMEOUT_MS 1000 | |
44 | #define OCC_CMD_IN_PRG_WAIT_MS 50 | |
45 | ||
5ec96d74 EJ |
46 | enum versions { occ_p9, occ_p10 }; |
47 | ||
7ed98ddd EJ |
48 | struct occ { |
49 | struct device *dev; | |
50 | struct device *sbefifo; | |
51 | char name[32]; | |
52 | int idx; | |
5ec96d74 | 53 | enum versions version; |
7ed98ddd EJ |
54 | struct miscdevice mdev; |
55 | struct mutex occ_lock; | |
56 | }; | |
57 | ||
58 | #define to_occ(x) container_of((x), struct occ, mdev) | |
59 | ||
60 | struct occ_response { | |
61 | u8 seq_no; | |
62 | u8 cmd_type; | |
63 | u8 return_status; | |
64 | __be16 data_length; | |
65 | u8 data[OCC_RESP_DATA_BYTES + 2]; /* two bytes checksum */ | |
66 | } __packed; | |
67 | ||
68 | struct occ_client { | |
69 | struct occ *occ; | |
70 | struct mutex lock; | |
71 | size_t data_size; | |
72 | size_t read_offset; | |
73 | u8 *buffer; | |
74 | }; | |
75 | ||
76 | #define to_client(x) container_of((x), struct occ_client, xfr) | |
77 | ||
78 | static DEFINE_IDA(occ_ida); | |
79 | ||
80 | static int occ_open(struct inode *inode, struct file *file) | |
81 | { | |
82 | struct occ_client *client = kzalloc(sizeof(*client), GFP_KERNEL); | |
83 | struct miscdevice *mdev = file->private_data; | |
84 | struct occ *occ = to_occ(mdev); | |
85 | ||
86 | if (!client) | |
87 | return -ENOMEM; | |
88 | ||
89 | client->buffer = (u8 *)__get_free_page(GFP_KERNEL); | |
90 | if (!client->buffer) { | |
91 | kfree(client); | |
92 | return -ENOMEM; | |
93 | } | |
94 | ||
95 | client->occ = occ; | |
96 | mutex_init(&client->lock); | |
97 | file->private_data = client; | |
98 | ||
99 | /* We allocate a 1-page buffer, make sure it all fits */ | |
100 | BUILD_BUG_ON((OCC_CMD_DATA_BYTES + 3) > PAGE_SIZE); | |
101 | BUILD_BUG_ON((OCC_RESP_DATA_BYTES + 7) > PAGE_SIZE); | |
102 | ||
103 | return 0; | |
104 | } | |
105 | ||
106 | static ssize_t occ_read(struct file *file, char __user *buf, size_t len, | |
107 | loff_t *offset) | |
108 | { | |
109 | struct occ_client *client = file->private_data; | |
110 | ssize_t rc = 0; | |
111 | ||
112 | if (!client) | |
113 | return -ENODEV; | |
114 | ||
115 | if (len > OCC_SRAM_BYTES) | |
116 | return -EINVAL; | |
117 | ||
118 | mutex_lock(&client->lock); | |
119 | ||
120 | /* This should not be possible ... */ | |
121 | if (WARN_ON_ONCE(client->read_offset > client->data_size)) { | |
122 | rc = -EIO; | |
123 | goto done; | |
124 | } | |
125 | ||
126 | /* Grab how much data we have to read */ | |
127 | rc = min(len, client->data_size - client->read_offset); | |
128 | if (copy_to_user(buf, client->buffer + client->read_offset, rc)) | |
129 | rc = -EFAULT; | |
130 | else | |
131 | client->read_offset += rc; | |
132 | ||
133 | done: | |
134 | mutex_unlock(&client->lock); | |
135 | ||
136 | return rc; | |
137 | } | |
138 | ||
139 | static ssize_t occ_write(struct file *file, const char __user *buf, | |
140 | size_t len, loff_t *offset) | |
141 | { | |
142 | struct occ_client *client = file->private_data; | |
143 | size_t rlen, data_length; | |
144 | u16 checksum = 0; | |
145 | ssize_t rc, i; | |
146 | u8 *cmd; | |
147 | ||
148 | if (!client) | |
149 | return -ENODEV; | |
150 | ||
151 | if (len > (OCC_CMD_DATA_BYTES + 3) || len < 3) | |
152 | return -EINVAL; | |
153 | ||
154 | mutex_lock(&client->lock); | |
155 | ||
156 | /* Construct the command */ | |
157 | cmd = client->buffer; | |
158 | ||
159 | /* Sequence number (we could increment and compare with response) */ | |
160 | cmd[0] = 1; | |
161 | ||
162 | /* | |
163 | * Copy the user command (assume user data follows the occ command | |
164 | * format) | |
165 | * byte 0: command type | |
166 | * bytes 1-2: data length (msb first) | |
167 | * bytes 3-n: data | |
168 | */ | |
169 | if (copy_from_user(&cmd[1], buf, len)) { | |
170 | rc = -EFAULT; | |
171 | goto done; | |
172 | } | |
173 | ||
174 | /* Extract data length */ | |
175 | data_length = (cmd[2] << 8) + cmd[3]; | |
176 | if (data_length > OCC_CMD_DATA_BYTES) { | |
177 | rc = -EINVAL; | |
178 | goto done; | |
179 | } | |
180 | ||
181 | /* Calculate checksum */ | |
182 | for (i = 0; i < data_length + 4; ++i) | |
183 | checksum += cmd[i]; | |
184 | ||
185 | cmd[data_length + 4] = checksum >> 8; | |
186 | cmd[data_length + 5] = checksum & 0xFF; | |
187 | ||
188 | /* Submit command */ | |
189 | rlen = PAGE_SIZE; | |
190 | rc = fsi_occ_submit(client->occ->dev, cmd, data_length + 6, cmd, | |
191 | &rlen); | |
192 | if (rc) | |
193 | goto done; | |
194 | ||
195 | /* Set read tracking data */ | |
196 | client->data_size = rlen; | |
197 | client->read_offset = 0; | |
198 | ||
199 | /* Done */ | |
200 | rc = len; | |
201 | ||
202 | done: | |
203 | mutex_unlock(&client->lock); | |
204 | ||
205 | return rc; | |
206 | } | |
207 | ||
208 | static int occ_release(struct inode *inode, struct file *file) | |
209 | { | |
210 | struct occ_client *client = file->private_data; | |
211 | ||
212 | free_page((unsigned long)client->buffer); | |
213 | kfree(client); | |
214 | ||
215 | return 0; | |
216 | } | |
217 | ||
218 | static const struct file_operations occ_fops = { | |
219 | .owner = THIS_MODULE, | |
220 | .open = occ_open, | |
221 | .read = occ_read, | |
222 | .write = occ_write, | |
223 | .release = occ_release, | |
224 | }; | |
225 | ||
226 | static int occ_verify_checksum(struct occ_response *resp, u16 data_length) | |
227 | { | |
228 | /* Fetch the two bytes after the data for the checksum. */ | |
229 | u16 checksum_resp = get_unaligned_be16(&resp->data[data_length]); | |
230 | u16 checksum; | |
231 | u16 i; | |
232 | ||
233 | checksum = resp->seq_no; | |
234 | checksum += resp->cmd_type; | |
235 | checksum += resp->return_status; | |
236 | checksum += (data_length >> 8) + (data_length & 0xFF); | |
237 | ||
238 | for (i = 0; i < data_length; ++i) | |
239 | checksum += resp->data[i]; | |
240 | ||
241 | if (checksum != checksum_resp) | |
242 | return -EBADMSG; | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
5ec96d74 | 247 | static int occ_getsram(struct occ *occ, u32 offset, void *data, ssize_t len) |
7ed98ddd EJ |
248 | { |
249 | u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */ | |
5ec96d74 EJ |
250 | size_t cmd_len, resp_len, resp_data_len; |
251 | __be32 *resp, cmd[6]; | |
252 | int idx = 0, rc; | |
7ed98ddd EJ |
253 | |
254 | /* | |
255 | * Magic sequence to do SBE getsram command. SBE will fetch data from | |
256 | * specified SRAM address. | |
257 | */ | |
5ec96d74 EJ |
258 | switch (occ->version) { |
259 | default: | |
260 | case occ_p9: | |
261 | cmd_len = 5; | |
262 | cmd[2] = cpu_to_be32(1); /* Normal mode */ | |
263 | cmd[3] = cpu_to_be32(OCC_P9_SRAM_RSP_ADDR + offset); | |
264 | break; | |
265 | case occ_p10: | |
266 | idx = 1; | |
267 | cmd_len = 6; | |
268 | cmd[2] = cpu_to_be32(OCC_P10_SRAM_MODE); | |
269 | cmd[3] = 0; | |
270 | cmd[4] = cpu_to_be32(OCC_P10_SRAM_RSP_ADDR + offset); | |
271 | break; | |
272 | } | |
273 | ||
274 | cmd[0] = cpu_to_be32(cmd_len); | |
7ed98ddd | 275 | cmd[1] = cpu_to_be32(SBEFIFO_CMD_GET_OCC_SRAM); |
5ec96d74 | 276 | cmd[4 + idx] = cpu_to_be32(data_len); |
7ed98ddd EJ |
277 | |
278 | resp_len = (data_len >> 2) + OCC_SBE_STATUS_WORDS; | |
279 | resp = kzalloc(resp_len << 2, GFP_KERNEL); | |
280 | if (!resp) | |
281 | return -ENOMEM; | |
282 | ||
5ec96d74 | 283 | rc = sbefifo_submit(occ->sbefifo, cmd, cmd_len, resp, &resp_len); |
7ed98ddd EJ |
284 | if (rc) |
285 | goto free; | |
286 | ||
287 | rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_GET_OCC_SRAM, | |
288 | resp, resp_len, &resp_len); | |
289 | if (rc) | |
290 | goto free; | |
291 | ||
292 | resp_data_len = be32_to_cpu(resp[resp_len - 1]); | |
293 | if (resp_data_len != data_len) { | |
294 | dev_err(occ->dev, "SRAM read expected %d bytes got %zd\n", | |
295 | data_len, resp_data_len); | |
296 | rc = -EBADMSG; | |
297 | } else { | |
298 | memcpy(data, resp, len); | |
299 | } | |
300 | ||
301 | free: | |
302 | /* Convert positive SBEI status */ | |
303 | if (rc > 0) { | |
304 | dev_err(occ->dev, "SRAM read returned failure status: %08x\n", | |
305 | rc); | |
306 | rc = -EBADMSG; | |
307 | } | |
308 | ||
309 | kfree(resp); | |
310 | return rc; | |
311 | } | |
312 | ||
5ec96d74 | 313 | static int occ_putsram(struct occ *occ, const void *data, ssize_t len) |
7ed98ddd EJ |
314 | { |
315 | size_t cmd_len, buf_len, resp_len, resp_data_len; | |
316 | u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */ | |
317 | __be32 *buf; | |
5ec96d74 EJ |
318 | int idx = 0, rc; |
319 | ||
320 | cmd_len = (occ->version == occ_p10) ? 6 : 5; | |
7ed98ddd EJ |
321 | |
322 | /* | |
323 | * We use the same buffer for command and response, make | |
324 | * sure it's big enough | |
325 | */ | |
326 | resp_len = OCC_SBE_STATUS_WORDS; | |
5ec96d74 | 327 | cmd_len += data_len >> 2; |
7ed98ddd EJ |
328 | buf_len = max(cmd_len, resp_len); |
329 | buf = kzalloc(buf_len << 2, GFP_KERNEL); | |
330 | if (!buf) | |
331 | return -ENOMEM; | |
332 | ||
333 | /* | |
334 | * Magic sequence to do SBE putsram command. SBE will transfer | |
335 | * data to specified SRAM address. | |
336 | */ | |
337 | buf[0] = cpu_to_be32(cmd_len); | |
338 | buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM); | |
7ed98ddd | 339 | |
5ec96d74 EJ |
340 | switch (occ->version) { |
341 | default: | |
342 | case occ_p9: | |
343 | buf[2] = cpu_to_be32(1); /* Normal mode */ | |
344 | buf[3] = cpu_to_be32(OCC_P9_SRAM_CMD_ADDR); | |
345 | break; | |
346 | case occ_p10: | |
347 | idx = 1; | |
348 | buf[2] = cpu_to_be32(OCC_P10_SRAM_MODE); | |
349 | buf[3] = 0; | |
350 | buf[4] = cpu_to_be32(OCC_P10_SRAM_CMD_ADDR); | |
351 | break; | |
352 | } | |
353 | ||
354 | buf[4 + idx] = cpu_to_be32(data_len); | |
355 | memcpy(&buf[5 + idx], data, len); | |
7ed98ddd EJ |
356 | |
357 | rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len); | |
358 | if (rc) | |
359 | goto free; | |
360 | ||
361 | rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM, | |
362 | buf, resp_len, &resp_len); | |
363 | if (rc) | |
364 | goto free; | |
365 | ||
366 | if (resp_len != 1) { | |
367 | dev_err(occ->dev, "SRAM write response length invalid: %zd\n", | |
368 | resp_len); | |
369 | rc = -EBADMSG; | |
370 | } else { | |
371 | resp_data_len = be32_to_cpu(buf[0]); | |
372 | if (resp_data_len != data_len) { | |
373 | dev_err(occ->dev, | |
374 | "SRAM write expected %d bytes got %zd\n", | |
375 | data_len, resp_data_len); | |
376 | rc = -EBADMSG; | |
377 | } | |
378 | } | |
379 | ||
380 | free: | |
381 | /* Convert positive SBEI status */ | |
382 | if (rc > 0) { | |
383 | dev_err(occ->dev, "SRAM write returned failure status: %08x\n", | |
384 | rc); | |
385 | rc = -EBADMSG; | |
386 | } | |
387 | ||
388 | kfree(buf); | |
389 | return rc; | |
390 | } | |
391 | ||
392 | static int occ_trigger_attn(struct occ *occ) | |
393 | { | |
394 | __be32 buf[OCC_SBE_STATUS_WORDS]; | |
5ec96d74 EJ |
395 | size_t cmd_len, resp_len, resp_data_len; |
396 | int idx = 0, rc; | |
7ed98ddd | 397 | |
5ec96d74 | 398 | BUILD_BUG_ON(OCC_SBE_STATUS_WORDS < 8); |
7ed98ddd EJ |
399 | resp_len = OCC_SBE_STATUS_WORDS; |
400 | ||
5ec96d74 EJ |
401 | switch (occ->version) { |
402 | default: | |
403 | case occ_p9: | |
404 | cmd_len = 7; | |
405 | buf[2] = cpu_to_be32(3); /* Circular mode */ | |
406 | buf[3] = 0; | |
407 | break; | |
408 | case occ_p10: | |
409 | idx = 1; | |
410 | cmd_len = 8; | |
411 | buf[2] = cpu_to_be32(0xd0); /* Circular mode, OCB Channel 1 */ | |
412 | buf[3] = 0; | |
413 | buf[4] = 0; | |
414 | break; | |
415 | } | |
416 | ||
417 | buf[0] = cpu_to_be32(cmd_len); /* Chip-op length in words */ | |
7ed98ddd | 418 | buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM); |
5ec96d74 EJ |
419 | buf[4 + idx] = cpu_to_be32(8); /* Data length in bytes */ |
420 | buf[5 + idx] = cpu_to_be32(0x20010000); /* Trigger OCC attention */ | |
421 | buf[6 + idx] = 0; | |
7ed98ddd | 422 | |
5ec96d74 | 423 | rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len); |
7ed98ddd EJ |
424 | if (rc) |
425 | goto error; | |
426 | ||
427 | rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM, | |
428 | buf, resp_len, &resp_len); | |
429 | if (rc) | |
430 | goto error; | |
431 | ||
432 | if (resp_len != 1) { | |
433 | dev_err(occ->dev, "SRAM attn response length invalid: %zd\n", | |
434 | resp_len); | |
435 | rc = -EBADMSG; | |
436 | } else { | |
437 | resp_data_len = be32_to_cpu(buf[0]); | |
438 | if (resp_data_len != 8) { | |
439 | dev_err(occ->dev, | |
440 | "SRAM attn expected 8 bytes got %zd\n", | |
441 | resp_data_len); | |
442 | rc = -EBADMSG; | |
443 | } | |
444 | } | |
445 | ||
446 | error: | |
447 | /* Convert positive SBEI status */ | |
448 | if (rc > 0) { | |
449 | dev_err(occ->dev, "SRAM attn returned failure status: %08x\n", | |
450 | rc); | |
451 | rc = -EBADMSG; | |
452 | } | |
453 | ||
454 | return rc; | |
455 | } | |
456 | ||
457 | int fsi_occ_submit(struct device *dev, const void *request, size_t req_len, | |
458 | void *response, size_t *resp_len) | |
459 | { | |
460 | const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS); | |
461 | const unsigned long wait_time = | |
462 | msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS); | |
463 | struct occ *occ = dev_get_drvdata(dev); | |
464 | struct occ_response *resp = response; | |
afd26118 | 465 | u8 seq_no; |
7ed98ddd EJ |
466 | u16 resp_data_length; |
467 | unsigned long start; | |
468 | int rc; | |
469 | ||
470 | if (!occ) | |
471 | return -ENODEV; | |
472 | ||
473 | if (*resp_len < 7) { | |
474 | dev_dbg(dev, "Bad resplen %zd\n", *resp_len); | |
475 | return -EINVAL; | |
476 | } | |
477 | ||
478 | mutex_lock(&occ->occ_lock); | |
479 | ||
afd26118 EJ |
480 | /* Extract the seq_no from the command (first byte) */ |
481 | seq_no = *(const u8 *)request; | |
5ec96d74 | 482 | rc = occ_putsram(occ, request, req_len); |
7ed98ddd EJ |
483 | if (rc) |
484 | goto done; | |
485 | ||
486 | rc = occ_trigger_attn(occ); | |
487 | if (rc) | |
488 | goto done; | |
489 | ||
490 | /* Read occ response header */ | |
491 | start = jiffies; | |
492 | do { | |
5ec96d74 | 493 | rc = occ_getsram(occ, 0, resp, 8); |
7ed98ddd EJ |
494 | if (rc) |
495 | goto done; | |
496 | ||
afd26118 EJ |
497 | if (resp->return_status == OCC_RESP_CMD_IN_PRG || |
498 | resp->seq_no != seq_no) { | |
7ed98ddd EJ |
499 | rc = -ETIMEDOUT; |
500 | ||
afd26118 EJ |
501 | if (time_after(jiffies, start + timeout)) { |
502 | dev_err(occ->dev, "resp timeout status=%02x " | |
503 | "resp seq_no=%d our seq_no=%d\n", | |
504 | resp->return_status, resp->seq_no, | |
505 | seq_no); | |
506 | goto done; | |
507 | } | |
7ed98ddd EJ |
508 | |
509 | set_current_state(TASK_UNINTERRUPTIBLE); | |
510 | schedule_timeout(wait_time); | |
511 | } | |
512 | } while (rc); | |
513 | ||
514 | /* Extract size of response data */ | |
515 | resp_data_length = get_unaligned_be16(&resp->data_length); | |
516 | ||
517 | /* Message size is data length + 5 bytes header + 2 bytes checksum */ | |
518 | if ((resp_data_length + 7) > *resp_len) { | |
519 | rc = -EMSGSIZE; | |
520 | goto done; | |
521 | } | |
522 | ||
523 | dev_dbg(dev, "resp_status=%02x resp_data_len=%d\n", | |
524 | resp->return_status, resp_data_length); | |
525 | ||
526 | /* Grab the rest */ | |
527 | if (resp_data_length > 1) { | |
528 | /* already got 3 bytes resp, also need 2 bytes checksum */ | |
5ec96d74 | 529 | rc = occ_getsram(occ, 8, &resp->data[3], resp_data_length - 1); |
7ed98ddd EJ |
530 | if (rc) |
531 | goto done; | |
532 | } | |
533 | ||
534 | *resp_len = resp_data_length + 7; | |
535 | rc = occ_verify_checksum(resp, resp_data_length); | |
536 | ||
537 | done: | |
538 | mutex_unlock(&occ->occ_lock); | |
539 | ||
540 | return rc; | |
541 | } | |
542 | EXPORT_SYMBOL_GPL(fsi_occ_submit); | |
543 | ||
544 | static int occ_unregister_child(struct device *dev, void *data) | |
545 | { | |
546 | struct platform_device *hwmon_dev = to_platform_device(dev); | |
547 | ||
548 | platform_device_unregister(hwmon_dev); | |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | static int occ_probe(struct platform_device *pdev) | |
554 | { | |
555 | int rc; | |
556 | u32 reg; | |
557 | struct occ *occ; | |
558 | struct platform_device *hwmon_dev; | |
559 | struct device *dev = &pdev->dev; | |
560 | struct platform_device_info hwmon_dev_info = { | |
561 | .parent = dev, | |
562 | .name = "occ-hwmon", | |
563 | }; | |
564 | ||
565 | occ = devm_kzalloc(dev, sizeof(*occ), GFP_KERNEL); | |
566 | if (!occ) | |
567 | return -ENOMEM; | |
568 | ||
5ec96d74 | 569 | occ->version = (uintptr_t)of_device_get_match_data(dev); |
7ed98ddd EJ |
570 | occ->dev = dev; |
571 | occ->sbefifo = dev->parent; | |
572 | mutex_init(&occ->occ_lock); | |
573 | ||
574 | if (dev->of_node) { | |
575 | rc = of_property_read_u32(dev->of_node, "reg", ®); | |
576 | if (!rc) { | |
577 | /* make sure we don't have a duplicate from dts */ | |
578 | occ->idx = ida_simple_get(&occ_ida, reg, reg + 1, | |
579 | GFP_KERNEL); | |
580 | if (occ->idx < 0) | |
581 | occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, | |
582 | GFP_KERNEL); | |
583 | } else { | |
584 | occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, | |
585 | GFP_KERNEL); | |
586 | } | |
587 | } else { | |
588 | occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, GFP_KERNEL); | |
589 | } | |
590 | ||
591 | platform_set_drvdata(pdev, occ); | |
592 | ||
593 | snprintf(occ->name, sizeof(occ->name), "occ%d", occ->idx); | |
594 | occ->mdev.fops = &occ_fops; | |
595 | occ->mdev.minor = MISC_DYNAMIC_MINOR; | |
596 | occ->mdev.name = occ->name; | |
597 | occ->mdev.parent = dev; | |
598 | ||
599 | rc = misc_register(&occ->mdev); | |
600 | if (rc) { | |
601 | dev_err(dev, "failed to register miscdevice: %d\n", rc); | |
602 | ida_simple_remove(&occ_ida, occ->idx); | |
603 | return rc; | |
604 | } | |
605 | ||
606 | hwmon_dev_info.id = occ->idx; | |
607 | hwmon_dev = platform_device_register_full(&hwmon_dev_info); | |
3c3c4848 | 608 | if (IS_ERR(hwmon_dev)) |
7ed98ddd EJ |
609 | dev_warn(dev, "failed to create hwmon device\n"); |
610 | ||
611 | return 0; | |
612 | } | |
613 | ||
614 | static int occ_remove(struct platform_device *pdev) | |
615 | { | |
616 | struct occ *occ = platform_get_drvdata(pdev); | |
617 | ||
618 | misc_deregister(&occ->mdev); | |
619 | ||
620 | device_for_each_child(&pdev->dev, NULL, occ_unregister_child); | |
621 | ||
622 | ida_simple_remove(&occ_ida, occ->idx); | |
623 | ||
624 | return 0; | |
625 | } | |
626 | ||
627 | static const struct of_device_id occ_match[] = { | |
5ec96d74 EJ |
628 | { |
629 | .compatible = "ibm,p9-occ", | |
630 | .data = (void *)occ_p9 | |
631 | }, | |
632 | { | |
633 | .compatible = "ibm,p10-occ", | |
634 | .data = (void *)occ_p10 | |
635 | }, | |
7ed98ddd EJ |
636 | { }, |
637 | }; | |
638 | ||
639 | static struct platform_driver occ_driver = { | |
640 | .driver = { | |
641 | .name = "occ", | |
642 | .of_match_table = occ_match, | |
643 | }, | |
644 | .probe = occ_probe, | |
645 | .remove = occ_remove, | |
646 | }; | |
647 | ||
648 | static int occ_init(void) | |
649 | { | |
650 | return platform_driver_register(&occ_driver); | |
651 | } | |
652 | ||
653 | static void occ_exit(void) | |
654 | { | |
655 | platform_driver_unregister(&occ_driver); | |
656 | ||
657 | ida_destroy(&occ_ida); | |
658 | } | |
659 | ||
660 | module_init(occ_init); | |
661 | module_exit(occ_exit); | |
662 | ||
663 | MODULE_AUTHOR("Eddie James <eajames@linux.ibm.com>"); | |
664 | MODULE_DESCRIPTION("BMC P9 OCC driver"); | |
665 | MODULE_LICENSE("GPL"); |