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fsi/fsi-master-gpio: Implement CRC error recovery
[linux-2.6-block.git] / drivers / fsi / fsi-master-gpio.c
CommitLineData
ac0385d9
CB		 1/*
2 * A FSI master controller, using a simple GPIO bit-banging interface
3 */
4
5#include <linux/crc4.h>
6#include <linux/delay.h>
7#include <linux/device.h>
8#include <linux/fsi.h>
9#include <linux/gpio/consumer.h>
10#include <linux/io.h>
11#include <linux/module.h>
f6a2f8eb 12#include <linux/of.h>
ac0385d9
CB		 13#include <linux/platform_device.h>
14#include <linux/slab.h>
15#include <linux/spinlock.h>
16
17#include "fsi-master.h"
18
19#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */
20#define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */
21#define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */
22#define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */
23#define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */
24#define FSI_INIT_CLOCKS 5000 /* Clock out any old data */
4e56828a
BH		 25#define FSI_GPIO_DPOLL_CLOCKS 50 /* < 21 will cause slave to hang */
26#define FSI_GPIO_EPOLL_CLOCKS 50 /* Number of clocks for E_POLL retry */
ac0385d9
CB		 27#define FSI_GPIO_STD_DELAY 10 /* Standard GPIO delay in nS */
28 /* todo: adjust down as low as */
29 /* possible or eliminate */
4e56828a
BH		 30#define FSI_CRC_ERR_RETRIES 10
31
ac0385d9 32#define FSI_GPIO_CMD_DPOLL 0x2
4e56828a 33#define FSI_GPIO_CMD_EPOLL 0x3
ac0385d9
CB		 34#define FSI_GPIO_CMD_TERM 0x3f
35#define FSI_GPIO_CMD_ABS_AR 0x4
0e82e5c1
JK		 36#define FSI_GPIO_CMD_REL_AR 0x5
37#define FSI_GPIO_CMD_SAME_AR 0x3 /* but only a 2-bit opcode... */
ac0385d9 38
4e56828a
BH		 39/* Slave responses */
40#define FSI_GPIO_RESP_ACK 0 /* Success */
41#define FSI_GPIO_RESP_BUSY 1 /* Slave busy */
ac0385d9
CB		 42#define FSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */
43#define FSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC error */
44#define FSI_GPIO_MTOE 4 /* Master time out error */
45#define FSI_GPIO_CRC_INVAL 5 /* Master reports slave CRC error */
46
47/* Normal slave responses */
48#define FSI_GPIO_RESP_BUSY 1
49#define FSI_GPIO_RESP_ACK 0
50#define FSI_GPIO_RESP_ACKD 4
51
b632642e 52#define FSI_GPIO_MAX_BUSY 200
ac0385d9
CB		 53#define FSI_GPIO_MTOE_COUNT 1000
54#define FSI_GPIO_DRAIN_BITS 20
55#define FSI_GPIO_CRC_SIZE 4
56#define FSI_GPIO_MSG_ID_SIZE 2
57#define FSI_GPIO_MSG_RESPID_SIZE 2
97a4e5c9 58#define FSI_GPIO_PRIME_SLAVE_CLOCKS 20
ac0385d9 59
0e82e5c1
JK		 60#define LAST_ADDR_INVALID 0x1
61
ac0385d9
CB		 62struct fsi_master_gpio {
63 struct fsi_master master;
64 struct device *dev;
e5538139
JK		 65 struct mutex cmd_lock; /* mutex for command ordering */
66 spinlock_t bit_lock; /* lock for clocking bits out */
ac0385d9
CB		 67 struct gpio_desc *gpio_clk;
68 struct gpio_desc *gpio_data;
69 struct gpio_desc *gpio_trans; /* Voltage translator */
70 struct gpio_desc *gpio_enable; /* FSI enable */
71 struct gpio_desc *gpio_mux; /* Mux control */
b8bd146d 72 bool external_mode;
bc1099d2 73 bool no_delays;
0e82e5c1 74 uint32_t last_addr;
ac0385d9
CB		 75};
76
1247cf7a
JK		 77#define CREATE_TRACE_POINTS
78#include <trace/events/fsi_master_gpio.h>
79
ac0385d9
CB		 80#define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
81
82struct fsi_gpio_msg {
83 uint64_t msg;
84 uint8_t bits;
85};
86
87static void clock_toggle(struct fsi_master_gpio *master, int count)
88{
89 int i;
90
91 for (i = 0; i < count; i++) {
bc1099d2
BH		 92 if (!master->no_delays)
93 ndelay(FSI_GPIO_STD_DLY);
ac0385d9 94 gpiod_set_value(master->gpio_clk, 0);
bc1099d2
BH		 95 if (!master->no_delays)
96 ndelay(FSI_GPIO_STD_DLY);
ac0385d9
CB		 97 gpiod_set_value(master->gpio_clk, 1);
98 }
99}
100
5d0d16f1 101static int sda_clock_in(struct fsi_master_gpio *master)
ac0385d9
CB		 102{
103 int in;
104
bc1099d2
BH		 105 if (!master->no_delays)
106 ndelay(FSI_GPIO_STD_DLY);
5d0d16f1 107 gpiod_set_value(master->gpio_clk, 0);
f3ca4834
BH		 108
109 /* Dummy read to feed the synchronizers */
110 gpiod_get_value(master->gpio_data);
111
112 /* Actual data read */
ac0385d9 113 in = gpiod_get_value(master->gpio_data);
bc1099d2
BH		 114 if (!master->no_delays)
115 ndelay(FSI_GPIO_STD_DLY);
5d0d16f1 116 gpiod_set_value(master->gpio_clk, 1);
ac0385d9
CB		 117 return in ? 1 : 0;
118}
119
120static void sda_out(struct fsi_master_gpio *master, int value)
121{
122 gpiod_set_value(master->gpio_data, value);
123}
124
125static void set_sda_input(struct fsi_master_gpio *master)
126{
127 gpiod_direction_input(master->gpio_data);
128 gpiod_set_value(master->gpio_trans, 0);
129}
130
131static void set_sda_output(struct fsi_master_gpio *master, int value)
132{
133 gpiod_set_value(master->gpio_trans, 1);
134 gpiod_direction_output(master->gpio_data, value);
135}
136
137static void clock_zeros(struct fsi_master_gpio *master, int count)
138{
139 set_sda_output(master, 1);
140 clock_toggle(master, count);
141}
142
143static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
144 uint8_t num_bits)
145{
146 uint8_t bit, in_bit;
147
148 set_sda_input(master);
149
150 for (bit = 0; bit < num_bits; bit++) {
5d0d16f1 151 in_bit = sda_clock_in(master);
ac0385d9
CB		 152 msg->msg <<= 1;
153 msg->msg |= ~in_bit & 0x1; /* Data is active low */
154 }
155 msg->bits += num_bits;
1247cf7a
JK		 156
157 trace_fsi_master_gpio_in(master, num_bits, msg->msg);
ac0385d9
CB		 158}
159
160static void serial_out(struct fsi_master_gpio *master,
161 const struct fsi_gpio_msg *cmd)
162{
163 uint8_t bit;
164 uint64_t msg = ~cmd->msg; /* Data is active low */
165 uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
166 uint64_t last_bit = ~0;
167 int next_bit;
168
1247cf7a
JK		 169 trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
170
ac0385d9
CB		 171 if (!cmd->bits) {
172 dev_warn(master->dev, "trying to output 0 bits\n");
173 return;
174 }
175 set_sda_output(master, 0);
176
177 /* Send the start bit */
178 sda_out(master, 0);
179 clock_toggle(master, 1);
180
181 /* Send the message */
182 for (bit = 0; bit < cmd->bits; bit++) {
183 next_bit = (msg & sda_mask) >> (cmd->bits - 1);
184 if (last_bit ^ next_bit) {
185 sda_out(master, next_bit);
186 last_bit = next_bit;
187 }
188 clock_toggle(master, 1);
189 msg <<= 1;
190 }
191}
192
193static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
194{
195 msg->msg <<= bits;
196 msg->msg |= data & ((1ull << bits) - 1);
197 msg->bits += bits;
198}
199
200static void msg_push_crc(struct fsi_gpio_msg *msg)
201{
202 uint8_t crc;
203 int top;
204
205 top = msg->bits & 0x3;
206
207 /* start bit, and any non-aligned top bits */
208 crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
209
210 /* aligned bits */
211 crc = crc4(crc, msg->msg, msg->bits - top);
212
213 msg_push_bits(msg, crc, 4);
214}
215
0e82e5c1
JK		 216static bool check_same_address(struct fsi_master_gpio *master, int id,
217 uint32_t addr)
218{
219 /* this will also handle LAST_ADDR_INVALID */
220 return master->last_addr == (((id & 0x3) << 21) | (addr & ~0x3));
221}
222
223static bool check_relative_address(struct fsi_master_gpio *master, int id,
224 uint32_t addr, uint32_t *rel_addrp)
225{
226 uint32_t last_addr = master->last_addr;
227 int32_t rel_addr;
228
229 if (last_addr == LAST_ADDR_INVALID)
230 return false;
231
232 /* We may be in 23-bit addressing mode, which uses the id as the
233 * top two address bits. So, if we're referencing a different ID,
234 * use absolute addresses.
235 */
236 if (((last_addr >> 21) & 0x3) != id)
237 return false;
238
239 /* remove the top two bits from any 23-bit addressing */
240 last_addr &= (1 << 21) - 1;
241
242 /* We know that the addresses are limited to 21 bits, so this won't
243 * overflow the signed rel_addr */
244 rel_addr = addr - last_addr;
245 if (rel_addr > 255 || rel_addr < -256)
246 return false;
247
248 *rel_addrp = (uint32_t)rel_addr;
249
250 return true;
251}
252
253static void last_address_update(struct fsi_master_gpio *master,
254 int id, bool valid, uint32_t addr)
255{
256 if (!valid)
257 master->last_addr = LAST_ADDR_INVALID;
258 else
259 master->last_addr = ((id & 0x3) << 21) | (addr & ~0x3);
260}
261
ac0385d9 262/*
0e82e5c1 263 * Encode an Absolute/Relative/Same Address command
ac0385d9 264 */
0e82e5c1
JK		 265static void build_ar_command(struct fsi_master_gpio *master,
266 struct fsi_gpio_msg *cmd, uint8_t id,
267 uint32_t addr, size_t size, const void *data)
ac0385d9 268{
0e82e5c1 269 int i, addr_bits, opcode_bits;
ac0385d9 270 bool write = !!data;
0e82e5c1
JK		 271 uint8_t ds, opcode;
272 uint32_t rel_addr;
ac0385d9
CB		 273
274 cmd->bits = 0;
275 cmd->msg = 0;
276
0e82e5c1
JK		 277 /* we have 21 bits of address max */
278 addr &= ((1 << 21) - 1);
279
280 /* cmd opcodes are variable length - SAME_AR is only two bits */
281 opcode_bits = 3;
282
283 if (check_same_address(master, id, addr)) {
284 /* we still address the byte offset within the word */
285 addr_bits = 2;
286 opcode_bits = 2;
287 opcode = FSI_GPIO_CMD_SAME_AR;
288
289 } else if (check_relative_address(master, id, addr, &rel_addr)) {
290 /* 8 bits plus sign */
291 addr_bits = 9;
292 addr = rel_addr;
293 opcode = FSI_GPIO_CMD_REL_AR;
294
295 } else {
296 addr_bits = 21;
297 opcode = FSI_GPIO_CMD_ABS_AR;
298 }
ac0385d9
CB		 299
300 /*
301 * The read/write size is encoded in the lower bits of the address
302 * (as it must be naturally-aligned), and the following ds bit.
303 *
304 * size addr:1 addr:0 ds
305 * 1 x x 0
306 * 2 x 0 1
307 * 4 0 1 1
308 *
309 */
310 ds = size > 1 ? 1 : 0;
311 addr &= ~(size - 1);
312 if (size == 4)
313 addr |= 1;
314
0e82e5c1
JK		 315 msg_push_bits(cmd, id, 2);
316 msg_push_bits(cmd, opcode, opcode_bits);
317 msg_push_bits(cmd, write ? 0 : 1, 1);
318 msg_push_bits(cmd, addr, addr_bits);
ac0385d9
CB		 319 msg_push_bits(cmd, ds, 1);
320 for (i = 0; write && i < size; i++)
321 msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
322
323 msg_push_crc(cmd);
324}
325
326static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
327{
328 cmd->bits = 0;
329 cmd->msg = 0;
330
331 msg_push_bits(cmd, slave_id, 2);
332 msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3);
333 msg_push_crc(cmd);
334}
335
4e56828a
BH		 336static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
337{
338 cmd->bits = 0;
339 cmd->msg = 0;
340
341 msg_push_bits(cmd, slave_id, 2);
342 msg_push_bits(cmd, FSI_GPIO_CMD_EPOLL, 3);
343 msg_push_crc(cmd);
344}
345
ac0385d9
CB		 346static void echo_delay(struct fsi_master_gpio *master)
347{
348 set_sda_output(master, 1);
349 clock_toggle(master, FSI_ECHO_DELAY_CLOCKS);
350}
351
352static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
353{
354 cmd->bits = 0;
355 cmd->msg = 0;
356
357 msg_push_bits(cmd, slave_id, 2);
358 msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6);
359 msg_push_crc(cmd);
360}
361
362/*
363 * Store information on master errors so handler can detect and clean
364 * up the bus
365 */
366static void fsi_master_gpio_error(struct fsi_master_gpio *master, int error)
367{
368
369}
370
4e56828a
BH		 371/*
372 * Note: callers rely specifically on this returning -EAGAIN for
373 * a CRC error detected in the response. Use other error code
374 * for other situations. It will be converted to something else
375 * higher up the stack before it reaches userspace.
376 */
ac0385d9
CB		 377static int read_one_response(struct fsi_master_gpio *master,
378 uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
379{
380 struct fsi_gpio_msg msg;
e5538139 381 unsigned long flags;
ac0385d9 382 uint32_t crc;
e5538139 383 uint8_t tag;
ac0385d9
CB		 384 int i;
385
e5538139
JK		 386 spin_lock_irqsave(&master->bit_lock, flags);
387
ac0385d9
CB		 388 /* wait for the start bit */
389 for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) {
390 msg.bits = 0;
391 msg.msg = 0;
392 serial_in(master, &msg, 1);
393 if (msg.msg)
394 break;
395 }
396 if (i == FSI_GPIO_MTOE_COUNT) {
397 dev_dbg(master->dev,
398 "Master time out waiting for response\n");
399 fsi_master_gpio_error(master, FSI_GPIO_MTOE);
e5538139 400 spin_unlock_irqrestore(&master->bit_lock, flags);
4e56828a 401 return -ETIMEDOUT;
ac0385d9
CB		 402 }
403
404 msg.bits = 0;
405 msg.msg = 0;
406
407 /* Read slave ID & response tag */
408 serial_in(master, &msg, 4);
409
ac0385d9
CB		 410 tag = msg.msg & 0x3;
411
412 /* If we have an ACK and we're expecting data, clock the data in too */
413 if (tag == FSI_GPIO_RESP_ACK && data_size)
414 serial_in(master, &msg, data_size * 8);
415
416 /* read CRC */
417 serial_in(master, &msg, FSI_GPIO_CRC_SIZE);
418
e5538139
JK		 419 spin_unlock_irqrestore(&master->bit_lock, flags);
420
ac0385d9
CB		 421 /* we have a whole message now; check CRC */
422 crc = crc4(0, 1, 1);
423 crc = crc4(crc, msg.msg, msg.bits);
424 if (crc) {
425 dev_dbg(master->dev, "ERR response CRC\n");
426 fsi_master_gpio_error(master, FSI_GPIO_CRC_INVAL);
4e56828a 427 return -EAGAIN;
ac0385d9
CB		 428 }
429
430 if (msgp)
431 *msgp = msg;
432 if (tagp)
433 *tagp = tag;
434
435 return 0;
436}
437
438static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
439{
440 struct fsi_gpio_msg cmd;
e5538139 441 unsigned long flags;
ac0385d9
CB		 442 uint8_t tag;
443 int rc;
444
445 build_term_command(&cmd, slave);
e5538139
JK		 446
447 spin_lock_irqsave(&master->bit_lock, flags);
ac0385d9
CB		 448 serial_out(master, &cmd);
449 echo_delay(master);
e5538139 450 spin_unlock_irqrestore(&master->bit_lock, flags);
ac0385d9
CB		 451
452 rc = read_one_response(master, 0, NULL, &tag);
453 if (rc < 0) {
454 dev_err(master->dev,
455 "TERM failed; lost communication with slave\n");
456 return -EIO;
457 } else if (tag != FSI_GPIO_RESP_ACK) {
458 dev_err(master->dev, "TERM failed; response %d\n", tag);
459 return -EIO;
460 }
461
462 return 0;
463}
464
465static int poll_for_response(struct fsi_master_gpio *master,
466 uint8_t slave, uint8_t size, void *data)
467{
468 struct fsi_gpio_msg response, cmd;
469 int busy_count = 0, rc, i;
e5538139 470 unsigned long flags;
ac0385d9
CB		 471 uint8_t tag;
472 uint8_t *data_byte = data;
4e56828a 473 int crc_err_retries = 0;
ac0385d9
CB		 474retry:
475 rc = read_one_response(master, size, &response, &tag);
4e56828a
BH		 476
477 /* Handle retries on CRC errors */
478 if (rc == -EAGAIN) {
479 /* Too many retries ? */
480 if (crc_err_retries++ > FSI_CRC_ERR_RETRIES) {
481 /*
482 * Pass it up as a -EIO otherwise upper level will retry
483 * the whole command which isn't what we want here.
484 */
485 rc = -EIO;
486 goto fail;
487 }
488 dev_dbg(master->dev,
489 "CRC error retry %d\n", crc_err_retries);
490 trace_fsi_master_gpio_crc_rsp_error(master);
491 build_epoll_command(&cmd, slave);
492 spin_lock_irqsave(&master->bit_lock, flags);
493 clock_zeros(master, FSI_GPIO_EPOLL_CLOCKS);
494 serial_out(master, &cmd);
495 echo_delay(master);
496 spin_unlock_irqrestore(&master->bit_lock, flags);
497 goto retry;
498 } else if (rc)
499 goto fail;
ac0385d9
CB		 500
501 switch (tag) {
502 case FSI_GPIO_RESP_ACK:
503 if (size && data) {
504 uint64_t val = response.msg;
505 /* clear crc & mask */
506 val >>= 4;
507 val &= (1ull << (size * 8)) - 1;
508
509 for (i = 0; i < size; i++) {
510 data_byte[size-i-1] = val;
511 val >>= 8;
512 }
513 }
514 break;
515 case FSI_GPIO_RESP_BUSY:
516 /*
517 * Its necessary to clock slave before issuing
518 * d-poll, not indicated in the hardware protocol
519 * spec. < 20 clocks causes slave to hang, 21 ok.
520 */
ac0385d9
CB		 521 if (busy_count++ < FSI_GPIO_MAX_BUSY) {
522 build_dpoll_command(&cmd, slave);
e5538139
JK		 523 spin_lock_irqsave(&master->bit_lock, flags);
524 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS);
ac0385d9
CB		 525 serial_out(master, &cmd);
526 echo_delay(master);
e5538139 527 spin_unlock_irqrestore(&master->bit_lock, flags);
ac0385d9
CB		 528 goto retry;
529 }
530 dev_warn(master->dev,
531 "ERR slave is stuck in busy state, issuing TERM\n");
e5538139
JK		 532 spin_lock_irqsave(&master->bit_lock, flags);
533 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS);
534 spin_unlock_irqrestore(&master->bit_lock, flags);
ac0385d9
CB		 535 issue_term(master, slave);
536 rc = -EIO;
537 break;
538
539 case FSI_GPIO_RESP_ERRA:
4e56828a 540 dev_dbg(master->dev, "ERRA received: 0x%x\n", (int)response.msg);
ac0385d9
CB		 541 fsi_master_gpio_error(master, response.msg);
542 rc = -EIO;
543 break;
4e56828a
BH		 544 case FSI_GPIO_RESP_ERRC:
545 dev_dbg(master->dev, "ERRC received: 0x%x\n", (int)response.msg);
546 fsi_master_gpio_error(master, response.msg);
547 trace_fsi_master_gpio_crc_cmd_error(master);
548 rc = -EAGAIN;
549 break;
ac0385d9
CB		 550 }
551
918da951
AJ		 552 if (busy_count > 0)
553 trace_fsi_master_gpio_poll_response_busy(master, busy_count);
4e56828a 554 fail:
ac0385d9 555 /* Clock the slave enough to be ready for next operation */
e5538139 556 spin_lock_irqsave(&master->bit_lock, flags);
ac0385d9 557 clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS);
e5538139 558 spin_unlock_irqrestore(&master->bit_lock, flags);
ac0385d9
CB		 559 return rc;
560}
561
e5538139
JK		 562static int send_request(struct fsi_master_gpio *master,
563 struct fsi_gpio_msg *cmd)
ac0385d9
CB		 564{
565 unsigned long flags;
b8bd146d 566
e5538139 567 spin_lock_irqsave(&master->bit_lock, flags);
b8bd146d 568 if (master->external_mode) {
e5538139 569 spin_unlock_irqrestore(&master->bit_lock, flags);
b8bd146d
JK		 570 return -EBUSY;
571 }
572
ac0385d9
CB		 573 serial_out(master, cmd);
574 echo_delay(master);
e5538139
JK		 575 spin_unlock_irqrestore(&master->bit_lock, flags);
576
577 return 0;
578}
579
580static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
581 struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
582{
4e56828a 583 int rc = -EAGAIN, retries = 0;
e5538139 584
4e56828a
BH		 585 while ((retries++) < FSI_CRC_ERR_RETRIES) {
586 rc = send_request(master, cmd);
587 if (rc)
588 break;
e5538139 589 rc = poll_for_response(master, slave, resp_len, resp);
4e56828a
BH		 590 if (rc != -EAGAIN)
591 break;
592 rc = -EIO;
593 dev_warn(master->dev, "ECRC retry %d\n", retries);
594
595 /* Pace it a bit before retry */
596 msleep(1);
597 }
e5538139 598
ac0385d9
CB		 599 return rc;
600}
601
602static int fsi_master_gpio_read(struct fsi_master *_master, int link,
603 uint8_t id, uint32_t addr, void *val, size_t size)
604{
605 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
606 struct fsi_gpio_msg cmd;
8193fb44 607 int rc;
ac0385d9
CB		 608
609 if (link != 0)
610 return -ENODEV;
611
8193fb44 612 mutex_lock(&master->cmd_lock);
0e82e5c1 613 build_ar_command(master, &cmd, id, addr, size, NULL);
8193fb44 614 rc = fsi_master_gpio_xfer(master, id, &cmd, size, val);
0e82e5c1 615 last_address_update(master, id, rc == 0, addr);
8193fb44
JK		 616 mutex_unlock(&master->cmd_lock);
617
618 return rc;
ac0385d9
CB		 619}
620
621static int fsi_master_gpio_write(struct fsi_master *_master, int link,
622 uint8_t id, uint32_t addr, const void *val, size_t size)
623{
624 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
625 struct fsi_gpio_msg cmd;
8193fb44 626 int rc;
ac0385d9
CB		 627
628 if (link != 0)
629 return -ENODEV;
630
8193fb44 631 mutex_lock(&master->cmd_lock);
0e82e5c1 632 build_ar_command(master, &cmd, id, addr, size, val);
8193fb44 633 rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
0e82e5c1 634 last_address_update(master, id, rc == 0, addr);
8193fb44
JK		 635 mutex_unlock(&master->cmd_lock);
636
637 return rc;
ac0385d9
CB		 638}
639
640static int fsi_master_gpio_term(struct fsi_master *_master,
641 int link, uint8_t id)
642{
643 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
644 struct fsi_gpio_msg cmd;
8193fb44 645 int rc;
ac0385d9
CB		 646
647 if (link != 0)
648 return -ENODEV;
649
8193fb44 650 mutex_lock(&master->cmd_lock);
ac0385d9 651 build_term_command(&cmd, id);
8193fb44 652 rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
0e82e5c1 653 last_address_update(master, id, false, 0);
8193fb44
JK		 654 mutex_unlock(&master->cmd_lock);
655
656 return rc;
ac0385d9
CB		 657}
658
659static int fsi_master_gpio_break(struct fsi_master *_master, int link)
660{
661 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
29d9b927 662 unsigned long flags;
ac0385d9
CB		 663
664 if (link != 0)
665 return -ENODEV;
666
1247cf7a
JK		 667 trace_fsi_master_gpio_break(master);
668
e5538139 669 mutex_lock(&master->cmd_lock);
b8bd146d 670 if (master->external_mode) {
e5538139 671 mutex_unlock(&master->cmd_lock);
b8bd146d
JK		 672 return -EBUSY;
673 }
e5538139
JK		 674
675 spin_lock_irqsave(&master->bit_lock, flags);
676
ac0385d9
CB		 677 set_sda_output(master, 1);
678 sda_out(master, 1);
679 clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
680 sda_out(master, 0);
681 clock_toggle(master, FSI_BREAK_CLOCKS);
682 echo_delay(master);
683 sda_out(master, 1);
684 clock_toggle(master, FSI_POST_BREAK_CLOCKS);
e5538139
JK		 685
686 spin_unlock_irqrestore(&master->bit_lock, flags);
0e82e5c1 687 last_address_update(master, 0, false, 0);
e5538139 688 mutex_unlock(&master->cmd_lock);
ac0385d9
CB		 689
690 /* Wait for logic reset to take effect */
691 udelay(200);
692
693 return 0;
694}
695
696static void fsi_master_gpio_init(struct fsi_master_gpio *master)
697{
e5538139
JK		 698 unsigned long flags;
699
ac0385d9
CB		 700 gpiod_direction_output(master->gpio_mux, 1);
701 gpiod_direction_output(master->gpio_trans, 1);
702 gpiod_direction_output(master->gpio_enable, 1);
703 gpiod_direction_output(master->gpio_clk, 1);
704 gpiod_direction_output(master->gpio_data, 1);
705
706 /* todo: evaluate if clocks can be reduced */
e5538139 707 spin_lock_irqsave(&master->bit_lock, flags);
ac0385d9 708 clock_zeros(master, FSI_INIT_CLOCKS);
e5538139 709 spin_unlock_irqrestore(&master->bit_lock, flags);
ac0385d9
CB		 710}
711
b8bd146d
JK		 712static void fsi_master_gpio_init_external(struct fsi_master_gpio *master)
713{
714 gpiod_direction_output(master->gpio_mux, 0);
715 gpiod_direction_output(master->gpio_trans, 0);
716 gpiod_direction_output(master->gpio_enable, 1);
717 gpiod_direction_input(master->gpio_clk);
718 gpiod_direction_input(master->gpio_data);
719}
720
ac0385d9
CB		 721static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link)
722{
723 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
b8bd146d 724 int rc = -EBUSY;
ac0385d9
CB		 725
726 if (link != 0)
727 return -ENODEV;
29d9b927 728
e5538139 729 mutex_lock(&master->cmd_lock);
b8bd146d
JK		 730 if (!master->external_mode) {
731 gpiod_set_value(master->gpio_enable, 1);
732 rc = 0;
733 }
e5538139 734 mutex_unlock(&master->cmd_lock);
ac0385d9 735
b8bd146d
JK		 736 return rc;
737}
738
739static ssize_t external_mode_show(struct device *dev,
740 struct device_attribute *attr, char *buf)
741{
742 struct fsi_master_gpio *master = dev_get_drvdata(dev);
743
744 return snprintf(buf, PAGE_SIZE - 1, "%u\n",
745 master->external_mode ? 1 : 0);
746}
747
748static ssize_t external_mode_store(struct device *dev,
749 struct device_attribute *attr, const char *buf, size_t count)
750{
751 struct fsi_master_gpio *master = dev_get_drvdata(dev);
e5538139 752 unsigned long val;
b8bd146d
JK		 753 bool external_mode;
754 int err;
755
756 err = kstrtoul(buf, 0, &val);
757 if (err)
758 return err;
759
760 external_mode = !!val;
761
e5538139 762 mutex_lock(&master->cmd_lock);
b8bd146d
JK		 763
764 if (external_mode == master->external_mode) {
e5538139 765 mutex_unlock(&master->cmd_lock);
b8bd146d
JK		 766 return count;
767 }
768
769 master->external_mode = external_mode;
770 if (master->external_mode)
771 fsi_master_gpio_init_external(master);
772 else
773 fsi_master_gpio_init(master);
e5538139
JK		 774
775 mutex_unlock(&master->cmd_lock);
b8bd146d
JK		 776
777 fsi_master_rescan(&master->master);
778
779 return count;
ac0385d9
CB		 780}
781
b8bd146d
JK		 782static DEVICE_ATTR(external_mode, 0664,
783 external_mode_show, external_mode_store);
784
ac0385d9
CB		 785static int fsi_master_gpio_probe(struct platform_device *pdev)
786{
787 struct fsi_master_gpio *master;
788 struct gpio_desc *gpio;
b8bd146d 789 int rc;
ac0385d9
CB		 790
791 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
792 if (!master)
793 return -ENOMEM;
794
795 master->dev = &pdev->dev;
796 master->master.dev.parent = master->dev;
f6a2f8eb 797 master->master.dev.of_node = of_node_get(dev_of_node(master->dev));
0e82e5c1 798 master->last_addr = LAST_ADDR_INVALID;
ac0385d9
CB		 799
800 gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
801 if (IS_ERR(gpio)) {
802 dev_err(&pdev->dev, "failed to get clock gpio\n");
803 return PTR_ERR(gpio);
804 }
805 master->gpio_clk = gpio;
806
807 gpio = devm_gpiod_get(&pdev->dev, "data", 0);
808 if (IS_ERR(gpio)) {
809 dev_err(&pdev->dev, "failed to get data gpio\n");
810 return PTR_ERR(gpio);
811 }
812 master->gpio_data = gpio;
813
814 /* Optional GPIOs */
815 gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
816 if (IS_ERR(gpio)) {
817 dev_err(&pdev->dev, "failed to get trans gpio\n");
818 return PTR_ERR(gpio);
819 }
820 master->gpio_trans = gpio;
821
822 gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
823 if (IS_ERR(gpio)) {
824 dev_err(&pdev->dev, "failed to get enable gpio\n");
825 return PTR_ERR(gpio);
826 }
827 master->gpio_enable = gpio;
828
829 gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
830 if (IS_ERR(gpio)) {
831 dev_err(&pdev->dev, "failed to get mux gpio\n");
832 return PTR_ERR(gpio);
833 }
834 master->gpio_mux = gpio;
835
bc1099d2
BH		 836 /*
837 * Check if GPIO block is slow enought that no extra delays
838 * are necessary. This improves performance on ast2500 by
839 * an order of magnitude.
840 */
841 master->no_delays = device_property_present(&pdev->dev, "no-gpio-delays");
842
ac0385d9 843 master->master.n_links = 1;
4af889b0 844 master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
ac0385d9
CB		 845 master->master.read = fsi_master_gpio_read;
846 master->master.write = fsi_master_gpio_write;
847 master->master.term = fsi_master_gpio_term;
848 master->master.send_break = fsi_master_gpio_break;
849 master->master.link_enable = fsi_master_gpio_link_enable;
850 platform_set_drvdata(pdev, master);
e5538139
JK		 851 spin_lock_init(&master->bit_lock);
852 mutex_init(&master->cmd_lock);
ac0385d9
CB		 853
854 fsi_master_gpio_init(master);
855
b8bd146d
JK		 856 rc = device_create_file(&pdev->dev, &dev_attr_external_mode);
857 if (rc)
858 return rc;
859
ac0385d9
CB		 860 return fsi_master_register(&master->master);
861}
862
863
864static int fsi_master_gpio_remove(struct platform_device *pdev)
865{
866 struct fsi_master_gpio *master = platform_get_drvdata(pdev);
867
868 devm_gpiod_put(&pdev->dev, master->gpio_clk);
869 devm_gpiod_put(&pdev->dev, master->gpio_data);
870 if (master->gpio_trans)
871 devm_gpiod_put(&pdev->dev, master->gpio_trans);
872 if (master->gpio_enable)
873 devm_gpiod_put(&pdev->dev, master->gpio_enable);
874 if (master->gpio_mux)
875 devm_gpiod_put(&pdev->dev, master->gpio_mux);
876 fsi_master_unregister(&master->master);
877
f6a2f8eb
JK		 878 of_node_put(master->master.dev.of_node);
879
ac0385d9
CB		 880 return 0;
881}
882
883static const struct of_device_id fsi_master_gpio_match[] = {
884 { .compatible = "fsi-master-gpio" },
885 { },
886};
887
888static struct platform_driver fsi_master_gpio_driver = {
889 .driver = {
890 .name = "fsi-master-gpio",
891 .of_match_table = fsi_master_gpio_match,
892 },
893 .probe = fsi_master_gpio_probe,
894 .remove = fsi_master_gpio_remove,
895};
896
897module_platform_driver(fsi_master_gpio_driver);
898MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)