Merge tag 'for-4.18-part2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave...
[linux-2.6-block.git] / drivers / fpga / fpga-mgr.c
CommitLineData
473f01f7 1// SPDX-License-Identifier: GPL-2.0
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2/*
3 * FPGA Manager Core
4 *
5 * Copyright (C) 2013-2015 Altera Corporation
5cf0c7f6 6 * Copyright (C) 2017 Intel Corporation
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7 *
8 * With code from the mailing list:
9 * Copyright (C) 2013 Xilinx, Inc.
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10 */
11#include <linux/firmware.h>
12#include <linux/fpga/fpga-mgr.h>
13#include <linux/idr.h>
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/mutex.h>
17#include <linux/slab.h>
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18#include <linux/scatterlist.h>
19#include <linux/highmem.h>
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20
21static DEFINE_IDA(fpga_mgr_ida);
22static struct class *fpga_mgr_class;
23
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24/**
25 * fpga_image_info_alloc - Allocate a FPGA image info struct
26 * @dev: owning device
27 *
28 * Return: struct fpga_image_info or NULL
29 */
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30struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
31{
32 struct fpga_image_info *info;
33
34 get_device(dev);
35
36 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
37 if (!info) {
38 put_device(dev);
39 return NULL;
40 }
41
42 info->dev = dev;
43
44 return info;
45}
46EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
47
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48/**
49 * fpga_image_info_free - Free a FPGA image info struct
50 * @info: FPGA image info struct to free
51 */
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52void fpga_image_info_free(struct fpga_image_info *info)
53{
54 struct device *dev;
55
56 if (!info)
57 return;
58
59 dev = info->dev;
60 if (info->firmware_name)
61 devm_kfree(dev, info->firmware_name);
62
63 devm_kfree(dev, info);
64 put_device(dev);
65}
66EXPORT_SYMBOL_GPL(fpga_image_info_free);
67
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68/*
69 * Call the low level driver's write_init function. This will do the
70 * device-specific things to get the FPGA into the state where it is ready to
71 * receive an FPGA image. The low level driver only gets to see the first
72 * initial_header_size bytes in the buffer.
73 */
74static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
75 struct fpga_image_info *info,
76 const char *buf, size_t count)
77{
78 int ret;
79
80 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
81 if (!mgr->mops->initial_header_size)
82 ret = mgr->mops->write_init(mgr, info, NULL, 0);
83 else
84 ret = mgr->mops->write_init(
85 mgr, info, buf, min(mgr->mops->initial_header_size, count));
86
87 if (ret) {
88 dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
89 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
90 return ret;
91 }
92
93 return 0;
94}
95
96static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
97 struct fpga_image_info *info,
98 struct sg_table *sgt)
99{
100 struct sg_mapping_iter miter;
101 size_t len;
102 char *buf;
103 int ret;
104
105 if (!mgr->mops->initial_header_size)
106 return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
107
108 /*
109 * First try to use miter to map the first fragment to access the
110 * header, this is the typical path.
111 */
112 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
113 if (sg_miter_next(&miter) &&
114 miter.length >= mgr->mops->initial_header_size) {
115 ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
116 miter.length);
117 sg_miter_stop(&miter);
118 return ret;
119 }
120 sg_miter_stop(&miter);
121
122 /* Otherwise copy the fragments into temporary memory. */
123 buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
124 if (!buf)
125 return -ENOMEM;
126
127 len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
128 mgr->mops->initial_header_size);
129 ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
130
131 kfree(buf);
132
133 return ret;
134}
135
136/*
137 * After all the FPGA image has been written, do the device specific steps to
138 * finish and set the FPGA into operating mode.
139 */
140static int fpga_mgr_write_complete(struct fpga_manager *mgr,
141 struct fpga_image_info *info)
142{
143 int ret;
144
145 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
146 ret = mgr->mops->write_complete(mgr, info);
147 if (ret) {
148 dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
149 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
150 return ret;
151 }
152 mgr->state = FPGA_MGR_STATE_OPERATING;
153
154 return 0;
155}
156
6a8c3be7 157/**
baa6d396 158 * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
6a8c3be7 159 * @mgr: fpga manager
1df2865f 160 * @info: fpga image specific information
baa6d396 161 * @sgt: scatterlist table
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162 *
163 * Step the low level fpga manager through the device-specific steps of getting
164 * an FPGA ready to be configured, writing the image to it, then doing whatever
92d94a7e 165 * post-configuration steps necessary. This code assumes the caller got the
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166 * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
167 * not an error code.
6a8c3be7 168 *
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169 * This is the preferred entry point for FPGA programming, it does not require
170 * any contiguous kernel memory.
171 *
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172 * Return: 0 on success, negative error code otherwise.
173 */
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174static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
175 struct fpga_image_info *info,
176 struct sg_table *sgt)
6a8c3be7 177{
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AT
178 int ret;
179
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180 ret = fpga_mgr_write_init_sg(mgr, info, sgt);
181 if (ret)
182 return ret;
183
184 /* Write the FPGA image to the FPGA. */
185 mgr->state = FPGA_MGR_STATE_WRITE;
186 if (mgr->mops->write_sg) {
187 ret = mgr->mops->write_sg(mgr, sgt);
188 } else {
189 struct sg_mapping_iter miter;
190
191 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
192 while (sg_miter_next(&miter)) {
193 ret = mgr->mops->write(mgr, miter.addr, miter.length);
194 if (ret)
195 break;
196 }
197 sg_miter_stop(&miter);
198 }
199
6a8c3be7 200 if (ret) {
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201 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
202 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
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203 return ret;
204 }
205
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206 return fpga_mgr_write_complete(mgr, info);
207}
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208
209static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
210 struct fpga_image_info *info,
211 const char *buf, size_t count)
212{
213 int ret;
214
215 ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
216 if (ret)
217 return ret;
218
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219 /*
220 * Write the FPGA image to the FPGA.
221 */
222 mgr->state = FPGA_MGR_STATE_WRITE;
223 ret = mgr->mops->write(mgr, buf, count);
224 if (ret) {
baa6d396 225 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
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226 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
227 return ret;
228 }
229
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230 return fpga_mgr_write_complete(mgr, info);
231}
232
233/**
234 * fpga_mgr_buf_load - load fpga from image in buffer
235 * @mgr: fpga manager
ff9da89c 236 * @info: fpga image info
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237 * @buf: buffer contain fpga image
238 * @count: byte count of buf
239 *
240 * Step the low level fpga manager through the device-specific steps of getting
241 * an FPGA ready to be configured, writing the image to it, then doing whatever
242 * post-configuration steps necessary. This code assumes the caller got the
243 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
244 *
245 * Return: 0 on success, negative error code otherwise.
246 */
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247static int fpga_mgr_buf_load(struct fpga_manager *mgr,
248 struct fpga_image_info *info,
249 const char *buf, size_t count)
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250{
251 struct page **pages;
252 struct sg_table sgt;
253 const void *p;
254 int nr_pages;
255 int index;
256 int rc;
257
6a8c3be7 258 /*
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259 * This is just a fast path if the caller has already created a
260 * contiguous kernel buffer and the driver doesn't require SG, non-SG
261 * drivers will still work on the slow path.
6a8c3be7 262 */
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263 if (mgr->mops->write)
264 return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
265
266 /*
267 * Convert the linear kernel pointer into a sg_table of pages for use
268 * by the driver.
269 */
270 nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
271 (unsigned long)buf / PAGE_SIZE;
272 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
273 if (!pages)
274 return -ENOMEM;
275
276 p = buf - offset_in_page(buf);
277 for (index = 0; index < nr_pages; index++) {
278 if (is_vmalloc_addr(p))
279 pages[index] = vmalloc_to_page(p);
280 else
281 pages[index] = kmap_to_page((void *)p);
282 if (!pages[index]) {
283 kfree(pages);
284 return -EFAULT;
285 }
286 p += PAGE_SIZE;
6a8c3be7 287 }
6a8c3be7 288
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289 /*
290 * The temporary pages list is used to code share the merging algorithm
291 * in sg_alloc_table_from_pages
292 */
293 rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
294 count, GFP_KERNEL);
295 kfree(pages);
296 if (rc)
297 return rc;
298
299 rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
300 sg_free_table(&sgt);
301
302 return rc;
6a8c3be7 303}
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304
305/**
306 * fpga_mgr_firmware_load - request firmware and load to fpga
307 * @mgr: fpga manager
1df2865f 308 * @info: fpga image specific information
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309 * @image_name: name of image file on the firmware search path
310 *
311 * Request an FPGA image using the firmware class, then write out to the FPGA.
312 * Update the state before each step to provide info on what step failed if
92d94a7e 313 * there is a failure. This code assumes the caller got the mgr pointer
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314 * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
315 * code.
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316 *
317 * Return: 0 on success, negative error code otherwise.
318 */
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319static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
320 struct fpga_image_info *info,
321 const char *image_name)
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322{
323 struct device *dev = &mgr->dev;
324 const struct firmware *fw;
325 int ret;
326
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327 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
328
329 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
330
331 ret = request_firmware(&fw, image_name, dev);
332 if (ret) {
333 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
334 dev_err(dev, "Error requesting firmware %s\n", image_name);
335 return ret;
336 }
337
1df2865f 338 ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
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339
340 release_firmware(fw);
341
e8c77bda 342 return ret;
6a8c3be7 343}
5cf0c7f6 344
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345/**
346 * fpga_mgr_load - load FPGA from scatter/gather table, buffer, or firmware
347 * @mgr: fpga manager
348 * @info: fpga image information.
349 *
350 * Load the FPGA from an image which is indicated in @info. If successful, the
351 * FPGA ends up in operating mode.
352 *
353 * Return: 0 on success, negative error code otherwise.
354 */
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355int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
356{
357 if (info->sgt)
358 return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
359 if (info->buf && info->count)
360 return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
361 if (info->firmware_name)
362 return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
363 return -EINVAL;
364}
365EXPORT_SYMBOL_GPL(fpga_mgr_load);
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366
367static const char * const state_str[] = {
368 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
369 [FPGA_MGR_STATE_POWER_OFF] = "power off",
370 [FPGA_MGR_STATE_POWER_UP] = "power up",
371 [FPGA_MGR_STATE_RESET] = "reset",
372
373 /* requesting FPGA image from firmware */
374 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
375 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
376
377 /* Preparing FPGA to receive image */
378 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
379 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
380
381 /* Writing image to FPGA */
382 [FPGA_MGR_STATE_WRITE] = "write",
383 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
384
385 /* Finishing configuration after image has been written */
386 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
387 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
388
389 /* FPGA reports to be in normal operating mode */
390 [FPGA_MGR_STATE_OPERATING] = "operating",
391};
392
393static ssize_t name_show(struct device *dev,
394 struct device_attribute *attr, char *buf)
395{
396 struct fpga_manager *mgr = to_fpga_manager(dev);
397
398 return sprintf(buf, "%s\n", mgr->name);
399}
400
401static ssize_t state_show(struct device *dev,
402 struct device_attribute *attr, char *buf)
403{
404 struct fpga_manager *mgr = to_fpga_manager(dev);
405
406 return sprintf(buf, "%s\n", state_str[mgr->state]);
407}
408
409static DEVICE_ATTR_RO(name);
410static DEVICE_ATTR_RO(state);
411
412static struct attribute *fpga_mgr_attrs[] = {
413 &dev_attr_name.attr,
414 &dev_attr_state.attr,
415 NULL,
416};
417ATTRIBUTE_GROUPS(fpga_mgr);
418
47910a49 419static struct fpga_manager *__fpga_mgr_get(struct device *dev)
6a8c3be7
AT
420{
421 struct fpga_manager *mgr;
6a8c3be7 422
6a8c3be7 423 mgr = to_fpga_manager(dev);
6a8c3be7 424
654ba4cc 425 if (!try_module_get(dev->parent->driver->owner))
ebf877a5 426 goto err_dev;
654ba4cc 427
6a8c3be7 428 return mgr;
654ba4cc 429
654ba4cc
AT
430err_dev:
431 put_device(dev);
ebf877a5 432 return ERR_PTR(-ENODEV);
6a8c3be7 433}
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AT
434
435static int fpga_mgr_dev_match(struct device *dev, const void *data)
436{
437 return dev->parent == data;
438}
439
440/**
ff9da89c 441 * fpga_mgr_get - Given a device, get a reference to a fpga mgr.
9dce0287
AT
442 * @dev: parent device that fpga mgr was registered with
443 *
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444 * Return: fpga manager struct or IS_ERR() condition containing error code.
445 */
446struct fpga_manager *fpga_mgr_get(struct device *dev)
447{
448 struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
449 fpga_mgr_dev_match);
450 if (!mgr_dev)
451 return ERR_PTR(-ENODEV);
452
453 return __fpga_mgr_get(mgr_dev);
454}
455EXPORT_SYMBOL_GPL(fpga_mgr_get);
456
457static int fpga_mgr_of_node_match(struct device *dev, const void *data)
458{
459 return dev->of_node == data;
460}
461
462/**
ff9da89c 463 * of_fpga_mgr_get - Given a device node, get a reference to a fpga mgr.
9dce0287 464 *
ff9da89c 465 * @node: device node
9dce0287
AT
466 *
467 * Return: fpga manager struct or IS_ERR() condition containing error code.
468 */
469struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
470{
471 struct device *dev;
472
473 dev = class_find_device(fpga_mgr_class, NULL, node,
474 fpga_mgr_of_node_match);
475 if (!dev)
476 return ERR_PTR(-ENODEV);
477
478 return __fpga_mgr_get(dev);
479}
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AT
480EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
481
482/**
483 * fpga_mgr_put - release a reference to a fpga manager
484 * @mgr: fpga manager structure
485 */
486void fpga_mgr_put(struct fpga_manager *mgr)
487{
654ba4cc 488 module_put(mgr->dev.parent->driver->owner);
654ba4cc 489 put_device(&mgr->dev);
6a8c3be7
AT
490}
491EXPORT_SYMBOL_GPL(fpga_mgr_put);
492
ebf877a5
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493/**
494 * fpga_mgr_lock - Lock FPGA manager for exclusive use
495 * @mgr: fpga manager
496 *
497 * Given a pointer to FPGA Manager (from fpga_mgr_get() or
ff9da89c
AT
498 * of_fpga_mgr_put()) attempt to get the mutex. The user should call
499 * fpga_mgr_lock() and verify that it returns 0 before attempting to
500 * program the FPGA. Likewise, the user should call fpga_mgr_unlock
501 * when done programming the FPGA.
ebf877a5
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502 *
503 * Return: 0 for success or -EBUSY
504 */
505int fpga_mgr_lock(struct fpga_manager *mgr)
506{
507 if (!mutex_trylock(&mgr->ref_mutex)) {
508 dev_err(&mgr->dev, "FPGA manager is in use.\n");
509 return -EBUSY;
510 }
511
512 return 0;
513}
514EXPORT_SYMBOL_GPL(fpga_mgr_lock);
515
516/**
ff9da89c 517 * fpga_mgr_unlock - Unlock FPGA manager after done programming
ebf877a5
AT
518 * @mgr: fpga manager
519 */
520void fpga_mgr_unlock(struct fpga_manager *mgr)
521{
522 mutex_unlock(&mgr->ref_mutex);
523}
524EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
525
6a8c3be7 526/**
7085e2a9 527 * fpga_mgr_create - create and initialize a FPGA manager struct
6a8c3be7
AT
528 * @dev: fpga manager device from pdev
529 * @name: fpga manager name
530 * @mops: pointer to structure of fpga manager ops
531 * @priv: fpga manager private data
532 *
7085e2a9 533 * Return: pointer to struct fpga_manager or NULL
6a8c3be7 534 */
7085e2a9
AT
535struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name,
536 const struct fpga_manager_ops *mops,
537 void *priv)
6a8c3be7
AT
538{
539 struct fpga_manager *mgr;
6a8c3be7
AT
540 int id, ret;
541
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542 if (!mops || !mops->write_complete || !mops->state ||
543 !mops->write_init || (!mops->write && !mops->write_sg) ||
544 (mops->write && mops->write_sg)) {
6a8c3be7 545 dev_err(dev, "Attempt to register without fpga_manager_ops\n");
7085e2a9 546 return NULL;
6a8c3be7
AT
547 }
548
549 if (!name || !strlen(name)) {
550 dev_err(dev, "Attempt to register with no name!\n");
7085e2a9 551 return NULL;
6a8c3be7
AT
552 }
553
554 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
555 if (!mgr)
7085e2a9 556 return NULL;
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AT
557
558 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
559 if (id < 0) {
560 ret = id;
561 goto error_kfree;
562 }
563
564 mutex_init(&mgr->ref_mutex);
565
566 mgr->name = name;
567 mgr->mops = mops;
568 mgr->priv = priv;
569
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AT
570 device_initialize(&mgr->dev);
571 mgr->dev.class = fpga_mgr_class;
845089bb 572 mgr->dev.groups = mops->groups;
6a8c3be7
AT
573 mgr->dev.parent = dev;
574 mgr->dev.of_node = dev->of_node;
575 mgr->dev.id = id;
6a8c3be7 576
07687c03
AT
577 ret = dev_set_name(&mgr->dev, "fpga%d", id);
578 if (ret)
579 goto error_device;
6a8c3be7 580
7085e2a9
AT
581 return mgr;
582
583error_device:
584 ida_simple_remove(&fpga_mgr_ida, id);
585error_kfree:
586 kfree(mgr);
587
588 return NULL;
589}
590EXPORT_SYMBOL_GPL(fpga_mgr_create);
591
592/**
593 * fpga_mgr_free - deallocate a FPGA manager
594 * @mgr: fpga manager struct created by fpga_mgr_create
595 */
596void fpga_mgr_free(struct fpga_manager *mgr)
597{
598 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
599 kfree(mgr);
600}
601EXPORT_SYMBOL_GPL(fpga_mgr_free);
602
603/**
604 * fpga_mgr_register - register a FPGA manager
605 * @mgr: fpga manager struct created by fpga_mgr_create
606 *
607 * Return: 0 on success, negative error code otherwise.
608 */
609int fpga_mgr_register(struct fpga_manager *mgr)
610{
611 int ret;
612
613 /*
614 * Initialize framework state by requesting low level driver read state
615 * from device. FPGA may be in reset mode or may have been programmed
616 * by bootloader or EEPROM.
617 */
618 mgr->state = mgr->mops->state(mgr);
619
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620 ret = device_add(&mgr->dev);
621 if (ret)
622 goto error_device;
623
624 dev_info(&mgr->dev, "%s registered\n", mgr->name);
625
626 return 0;
627
628error_device:
7085e2a9 629 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
6a8c3be7
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630
631 return ret;
632}
633EXPORT_SYMBOL_GPL(fpga_mgr_register);
634
635/**
fdff4053 636 * fpga_mgr_unregister - unregister and free a FPGA manager
7085e2a9 637 * @mgr: fpga manager struct
6a8c3be7 638 */
7085e2a9 639void fpga_mgr_unregister(struct fpga_manager *mgr)
6a8c3be7 640{
6a8c3be7
AT
641 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
642
643 /*
644 * If the low level driver provides a method for putting fpga into
645 * a desired state upon unregister, do it.
646 */
647 if (mgr->mops->fpga_remove)
648 mgr->mops->fpga_remove(mgr);
649
650 device_unregister(&mgr->dev);
651}
652EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
653
654static void fpga_mgr_dev_release(struct device *dev)
655{
656 struct fpga_manager *mgr = to_fpga_manager(dev);
657
7085e2a9 658 fpga_mgr_free(mgr);
6a8c3be7
AT
659}
660
661static int __init fpga_mgr_class_init(void)
662{
663 pr_info("FPGA manager framework\n");
664
665 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
666 if (IS_ERR(fpga_mgr_class))
667 return PTR_ERR(fpga_mgr_class);
668
669 fpga_mgr_class->dev_groups = fpga_mgr_groups;
670 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
671
672 return 0;
673}
674
675static void __exit fpga_mgr_class_exit(void)
676{
677 class_destroy(fpga_mgr_class);
678 ida_destroy(&fpga_mgr_ida);
679}
680
5cf0c7f6 681MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
6a8c3be7
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682MODULE_DESCRIPTION("FPGA manager framework");
683MODULE_LICENSE("GPL v2");
684
685subsys_initcall(fpga_mgr_class_init);
686module_exit(fpga_mgr_class_exit);