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473f01f7 | 1 | // SPDX-License-Identifier: GPL-2.0 |
21aeda95 AT |
2 | /* |
3 | * FPGA Bridge Framework Driver | |
4 | * | |
5 | * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved. | |
9c1c4b27 | 6 | * Copyright (C) 2017 Intel Corporation |
21aeda95 AT |
7 | */ |
8 | #include <linux/fpga/fpga-bridge.h> | |
9 | #include <linux/idr.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/of_platform.h> | |
13 | #include <linux/slab.h> | |
14 | #include <linux/spinlock.h> | |
15 | ||
16 | static DEFINE_IDA(fpga_bridge_ida); | |
17 | static struct class *fpga_bridge_class; | |
18 | ||
19 | /* Lock for adding/removing bridges to linked lists*/ | |
f5187329 | 20 | static DEFINE_SPINLOCK(bridge_list_lock); |
21aeda95 | 21 | |
21aeda95 AT |
22 | /** |
23 | * fpga_bridge_enable - Enable transactions on the bridge | |
24 | * | |
25 | * @bridge: FPGA bridge | |
26 | * | |
27 | * Return: 0 for success, error code otherwise. | |
28 | */ | |
29 | int fpga_bridge_enable(struct fpga_bridge *bridge) | |
30 | { | |
31 | dev_dbg(&bridge->dev, "enable\n"); | |
32 | ||
33 | if (bridge->br_ops && bridge->br_ops->enable_set) | |
34 | return bridge->br_ops->enable_set(bridge, 1); | |
35 | ||
36 | return 0; | |
37 | } | |
38 | EXPORT_SYMBOL_GPL(fpga_bridge_enable); | |
39 | ||
40 | /** | |
41 | * fpga_bridge_disable - Disable transactions on the bridge | |
42 | * | |
43 | * @bridge: FPGA bridge | |
44 | * | |
45 | * Return: 0 for success, error code otherwise. | |
46 | */ | |
47 | int fpga_bridge_disable(struct fpga_bridge *bridge) | |
48 | { | |
49 | dev_dbg(&bridge->dev, "disable\n"); | |
50 | ||
51 | if (bridge->br_ops && bridge->br_ops->enable_set) | |
52 | return bridge->br_ops->enable_set(bridge, 0); | |
53 | ||
54 | return 0; | |
55 | } | |
56 | EXPORT_SYMBOL_GPL(fpga_bridge_disable); | |
57 | ||
9c1c4b27 AT |
58 | static struct fpga_bridge *__fpga_bridge_get(struct device *dev, |
59 | struct fpga_image_info *info) | |
21aeda95 | 60 | { |
21aeda95 AT |
61 | struct fpga_bridge *bridge; |
62 | int ret = -ENODEV; | |
63 | ||
21aeda95 | 64 | bridge = to_fpga_bridge(dev); |
21aeda95 AT |
65 | |
66 | bridge->info = info; | |
67 | ||
68 | if (!mutex_trylock(&bridge->mutex)) { | |
69 | ret = -EBUSY; | |
70 | goto err_dev; | |
71 | } | |
72 | ||
73 | if (!try_module_get(dev->parent->driver->owner)) | |
74 | goto err_ll_mod; | |
75 | ||
76 | dev_dbg(&bridge->dev, "get\n"); | |
77 | ||
78 | return bridge; | |
79 | ||
80 | err_ll_mod: | |
81 | mutex_unlock(&bridge->mutex); | |
82 | err_dev: | |
83 | put_device(dev); | |
84 | return ERR_PTR(ret); | |
85 | } | |
9c1c4b27 AT |
86 | |
87 | /** | |
e7555cf6 | 88 | * of_fpga_bridge_get - get an exclusive reference to an fpga bridge |
9c1c4b27 | 89 | * |
e7555cf6 | 90 | * @np: node pointer of an FPGA bridge |
9c1c4b27 AT |
91 | * @info: fpga image specific information |
92 | * | |
93 | * Return fpga_bridge struct if successful. | |
94 | * Return -EBUSY if someone already has a reference to the bridge. | |
e7555cf6 | 95 | * Return -ENODEV if @np is not an FPGA Bridge. |
9c1c4b27 AT |
96 | */ |
97 | struct fpga_bridge *of_fpga_bridge_get(struct device_node *np, | |
98 | struct fpga_image_info *info) | |
99 | { | |
100 | struct device *dev; | |
101 | ||
cfba5de9 | 102 | dev = class_find_device_by_of_node(fpga_bridge_class, np); |
9c1c4b27 AT |
103 | if (!dev) |
104 | return ERR_PTR(-ENODEV); | |
105 | ||
106 | return __fpga_bridge_get(dev, info); | |
107 | } | |
21aeda95 AT |
108 | EXPORT_SYMBOL_GPL(of_fpga_bridge_get); |
109 | ||
9c1c4b27 AT |
110 | static int fpga_bridge_dev_match(struct device *dev, const void *data) |
111 | { | |
112 | return dev->parent == data; | |
113 | } | |
114 | ||
115 | /** | |
e7555cf6 | 116 | * fpga_bridge_get - get an exclusive reference to an fpga bridge |
9c1c4b27 | 117 | * @dev: parent device that fpga bridge was registered with |
060ac5c8 | 118 | * @info: fpga manager info |
9c1c4b27 | 119 | * |
e7555cf6 | 120 | * Given a device, get an exclusive reference to an fpga bridge. |
9c1c4b27 | 121 | * |
b4d9a0e5 | 122 | * Return: fpga bridge struct or IS_ERR() condition containing error code. |
9c1c4b27 AT |
123 | */ |
124 | struct fpga_bridge *fpga_bridge_get(struct device *dev, | |
125 | struct fpga_image_info *info) | |
126 | { | |
127 | struct device *bridge_dev; | |
128 | ||
129 | bridge_dev = class_find_device(fpga_bridge_class, NULL, dev, | |
130 | fpga_bridge_dev_match); | |
131 | if (!bridge_dev) | |
132 | return ERR_PTR(-ENODEV); | |
133 | ||
134 | return __fpga_bridge_get(bridge_dev, info); | |
135 | } | |
136 | EXPORT_SYMBOL_GPL(fpga_bridge_get); | |
137 | ||
21aeda95 AT |
138 | /** |
139 | * fpga_bridge_put - release a reference to a bridge | |
140 | * | |
141 | * @bridge: FPGA bridge | |
142 | */ | |
143 | void fpga_bridge_put(struct fpga_bridge *bridge) | |
144 | { | |
145 | dev_dbg(&bridge->dev, "put\n"); | |
146 | ||
147 | bridge->info = NULL; | |
148 | module_put(bridge->dev.parent->driver->owner); | |
149 | mutex_unlock(&bridge->mutex); | |
150 | put_device(&bridge->dev); | |
151 | } | |
152 | EXPORT_SYMBOL_GPL(fpga_bridge_put); | |
153 | ||
154 | /** | |
155 | * fpga_bridges_enable - enable bridges in a list | |
156 | * @bridge_list: list of FPGA bridges | |
157 | * | |
158 | * Enable each bridge in the list. If list is empty, do nothing. | |
159 | * | |
160 | * Return 0 for success or empty bridge list; return error code otherwise. | |
161 | */ | |
162 | int fpga_bridges_enable(struct list_head *bridge_list) | |
163 | { | |
164 | struct fpga_bridge *bridge; | |
21aeda95 AT |
165 | int ret; |
166 | ||
c37235cc | 167 | list_for_each_entry(bridge, bridge_list, node) { |
21aeda95 AT |
168 | ret = fpga_bridge_enable(bridge); |
169 | if (ret) | |
170 | return ret; | |
171 | } | |
172 | ||
173 | return 0; | |
174 | } | |
175 | EXPORT_SYMBOL_GPL(fpga_bridges_enable); | |
176 | ||
177 | /** | |
178 | * fpga_bridges_disable - disable bridges in a list | |
179 | * | |
180 | * @bridge_list: list of FPGA bridges | |
181 | * | |
182 | * Disable each bridge in the list. If list is empty, do nothing. | |
183 | * | |
184 | * Return 0 for success or empty bridge list; return error code otherwise. | |
185 | */ | |
186 | int fpga_bridges_disable(struct list_head *bridge_list) | |
187 | { | |
188 | struct fpga_bridge *bridge; | |
21aeda95 AT |
189 | int ret; |
190 | ||
c37235cc | 191 | list_for_each_entry(bridge, bridge_list, node) { |
21aeda95 AT |
192 | ret = fpga_bridge_disable(bridge); |
193 | if (ret) | |
194 | return ret; | |
195 | } | |
196 | ||
197 | return 0; | |
198 | } | |
199 | EXPORT_SYMBOL_GPL(fpga_bridges_disable); | |
200 | ||
201 | /** | |
202 | * fpga_bridges_put - put bridges | |
203 | * | |
204 | * @bridge_list: list of FPGA bridges | |
205 | * | |
206 | * For each bridge in the list, put the bridge and remove it from the list. | |
207 | * If list is empty, do nothing. | |
208 | */ | |
209 | void fpga_bridges_put(struct list_head *bridge_list) | |
210 | { | |
c37235cc | 211 | struct fpga_bridge *bridge, *next; |
21aeda95 AT |
212 | unsigned long flags; |
213 | ||
c37235cc | 214 | list_for_each_entry_safe(bridge, next, bridge_list, node) { |
21aeda95 AT |
215 | fpga_bridge_put(bridge); |
216 | ||
217 | spin_lock_irqsave(&bridge_list_lock, flags); | |
218 | list_del(&bridge->node); | |
219 | spin_unlock_irqrestore(&bridge_list_lock, flags); | |
220 | } | |
221 | } | |
222 | EXPORT_SYMBOL_GPL(fpga_bridges_put); | |
223 | ||
224 | /** | |
9c1c4b27 | 225 | * of_fpga_bridge_get_to_list - get a bridge, add it to a list |
21aeda95 | 226 | * |
e7555cf6 | 227 | * @np: node pointer of an FPGA bridge |
21aeda95 AT |
228 | * @info: fpga image specific information |
229 | * @bridge_list: list of FPGA bridges | |
230 | * | |
0a05cdf1 | 231 | * Get an exclusive reference to the bridge and it to the list. |
21aeda95 | 232 | * |
580e3137 | 233 | * Return 0 for success, error code from of_fpga_bridge_get() otherwise. |
21aeda95 | 234 | */ |
9c1c4b27 AT |
235 | int of_fpga_bridge_get_to_list(struct device_node *np, |
236 | struct fpga_image_info *info, | |
237 | struct list_head *bridge_list) | |
238 | { | |
239 | struct fpga_bridge *bridge; | |
240 | unsigned long flags; | |
241 | ||
242 | bridge = of_fpga_bridge_get(np, info); | |
243 | if (IS_ERR(bridge)) | |
244 | return PTR_ERR(bridge); | |
245 | ||
246 | spin_lock_irqsave(&bridge_list_lock, flags); | |
247 | list_add(&bridge->node, bridge_list); | |
248 | spin_unlock_irqrestore(&bridge_list_lock, flags); | |
249 | ||
250 | return 0; | |
251 | } | |
252 | EXPORT_SYMBOL_GPL(of_fpga_bridge_get_to_list); | |
253 | ||
254 | /** | |
255 | * fpga_bridge_get_to_list - given device, get a bridge, add it to a list | |
256 | * | |
257 | * @dev: FPGA bridge device | |
258 | * @info: fpga image specific information | |
259 | * @bridge_list: list of FPGA bridges | |
260 | * | |
0a05cdf1 | 261 | * Get an exclusive reference to the bridge and it to the list. |
9c1c4b27 | 262 | * |
580e3137 | 263 | * Return 0 for success, error code from fpga_bridge_get() otherwise. |
9c1c4b27 AT |
264 | */ |
265 | int fpga_bridge_get_to_list(struct device *dev, | |
21aeda95 AT |
266 | struct fpga_image_info *info, |
267 | struct list_head *bridge_list) | |
268 | { | |
269 | struct fpga_bridge *bridge; | |
270 | unsigned long flags; | |
271 | ||
9c1c4b27 | 272 | bridge = fpga_bridge_get(dev, info); |
21aeda95 AT |
273 | if (IS_ERR(bridge)) |
274 | return PTR_ERR(bridge); | |
275 | ||
276 | spin_lock_irqsave(&bridge_list_lock, flags); | |
277 | list_add(&bridge->node, bridge_list); | |
278 | spin_unlock_irqrestore(&bridge_list_lock, flags); | |
279 | ||
280 | return 0; | |
281 | } | |
282 | EXPORT_SYMBOL_GPL(fpga_bridge_get_to_list); | |
283 | ||
284 | static ssize_t name_show(struct device *dev, | |
285 | struct device_attribute *attr, char *buf) | |
286 | { | |
287 | struct fpga_bridge *bridge = to_fpga_bridge(dev); | |
288 | ||
289 | return sprintf(buf, "%s\n", bridge->name); | |
290 | } | |
291 | ||
292 | static ssize_t state_show(struct device *dev, | |
293 | struct device_attribute *attr, char *buf) | |
294 | { | |
295 | struct fpga_bridge *bridge = to_fpga_bridge(dev); | |
48ca6e5f | 296 | int state = 1; |
21aeda95 | 297 | |
48ca6e5f MP |
298 | if (bridge->br_ops && bridge->br_ops->enable_show) { |
299 | state = bridge->br_ops->enable_show(bridge); | |
300 | if (state < 0) | |
301 | return state; | |
302 | } | |
21aeda95 | 303 | |
48ca6e5f | 304 | return sysfs_emit(buf, "%s\n", state ? "enabled" : "disabled"); |
21aeda95 AT |
305 | } |
306 | ||
307 | static DEVICE_ATTR_RO(name); | |
308 | static DEVICE_ATTR_RO(state); | |
309 | ||
310 | static struct attribute *fpga_bridge_attrs[] = { | |
311 | &dev_attr_name.attr, | |
312 | &dev_attr_state.attr, | |
313 | NULL, | |
314 | }; | |
315 | ATTRIBUTE_GROUPS(fpga_bridge); | |
316 | ||
317 | /** | |
0d70af3c | 318 | * fpga_bridge_register - create and register an FPGA Bridge device |
ceb8ab3c | 319 | * @parent: FPGA bridge device from pdev |
21aeda95 AT |
320 | * @name: FPGA bridge name |
321 | * @br_ops: pointer to structure of fpga bridge ops | |
322 | * @priv: FPGA bridge private data | |
323 | * | |
0d70af3c | 324 | * Return: struct fpga_bridge pointer or ERR_PTR() |
21aeda95 | 325 | */ |
0d70af3c RW |
326 | struct fpga_bridge * |
327 | fpga_bridge_register(struct device *parent, const char *name, | |
328 | const struct fpga_bridge_ops *br_ops, | |
329 | void *priv) | |
21aeda95 AT |
330 | { |
331 | struct fpga_bridge *bridge; | |
d3fbd739 | 332 | int id, ret; |
21aeda95 | 333 | |
0d70af3c RW |
334 | if (!br_ops) { |
335 | dev_err(parent, "Attempt to register without fpga_bridge_ops\n"); | |
336 | return ERR_PTR(-EINVAL); | |
337 | } | |
338 | ||
21aeda95 | 339 | if (!name || !strlen(name)) { |
ceb8ab3c | 340 | dev_err(parent, "Attempt to register with no name!\n"); |
0d70af3c | 341 | return ERR_PTR(-EINVAL); |
21aeda95 AT |
342 | } |
343 | ||
344 | bridge = kzalloc(sizeof(*bridge), GFP_KERNEL); | |
345 | if (!bridge) | |
0d70af3c | 346 | return ERR_PTR(-ENOMEM); |
21aeda95 | 347 | |
a5e3d775 | 348 | id = ida_alloc(&fpga_bridge_ida, GFP_KERNEL); |
0d70af3c RW |
349 | if (id < 0) { |
350 | ret = id; | |
21aeda95 | 351 | goto error_kfree; |
0d70af3c | 352 | } |
21aeda95 AT |
353 | |
354 | mutex_init(&bridge->mutex); | |
355 | INIT_LIST_HEAD(&bridge->node); | |
356 | ||
357 | bridge->name = name; | |
358 | bridge->br_ops = br_ops; | |
359 | bridge->priv = priv; | |
360 | ||
845089bb | 361 | bridge->dev.groups = br_ops->groups; |
21aeda95 | 362 | bridge->dev.class = fpga_bridge_class; |
ceb8ab3c RW |
363 | bridge->dev.parent = parent; |
364 | bridge->dev.of_node = parent->of_node; | |
21aeda95 | 365 | bridge->dev.id = id; |
21aeda95 AT |
366 | |
367 | ret = dev_set_name(&bridge->dev, "br%d", id); | |
368 | if (ret) | |
369 | goto error_device; | |
370 | ||
0d70af3c RW |
371 | ret = device_register(&bridge->dev); |
372 | if (ret) { | |
373 | put_device(&bridge->dev); | |
374 | return ERR_PTR(ret); | |
375 | } | |
376 | ||
dc70eb86 AL |
377 | of_platform_populate(bridge->dev.of_node, NULL, NULL, &bridge->dev); |
378 | ||
371cd1b1 | 379 | return bridge; |
21aeda95 AT |
380 | |
381 | error_device: | |
a5e3d775 | 382 | ida_free(&fpga_bridge_ida, id); |
21aeda95 AT |
383 | error_kfree: |
384 | kfree(bridge); | |
385 | ||
0d70af3c | 386 | return ERR_PTR(ret); |
21aeda95 AT |
387 | } |
388 | EXPORT_SYMBOL_GPL(fpga_bridge_register); | |
389 | ||
390 | /** | |
e7555cf6 | 391 | * fpga_bridge_unregister - unregister an FPGA bridge |
213befe0 AT |
392 | * |
393 | * @bridge: FPGA bridge struct | |
394 | * | |
e7555cf6 | 395 | * This function is intended for use in an FPGA bridge driver's remove function. |
21aeda95 | 396 | */ |
371cd1b1 | 397 | void fpga_bridge_unregister(struct fpga_bridge *bridge) |
21aeda95 | 398 | { |
21aeda95 AT |
399 | /* |
400 | * If the low level driver provides a method for putting bridge into | |
401 | * a desired state upon unregister, do it. | |
402 | */ | |
403 | if (bridge->br_ops && bridge->br_ops->fpga_bridge_remove) | |
404 | bridge->br_ops->fpga_bridge_remove(bridge); | |
405 | ||
406 | device_unregister(&bridge->dev); | |
407 | } | |
408 | EXPORT_SYMBOL_GPL(fpga_bridge_unregister); | |
409 | ||
410 | static void fpga_bridge_dev_release(struct device *dev) | |
411 | { | |
0d70af3c RW |
412 | struct fpga_bridge *bridge = to_fpga_bridge(dev); |
413 | ||
a5e3d775 | 414 | ida_free(&fpga_bridge_ida, bridge->dev.id); |
0d70af3c | 415 | kfree(bridge); |
21aeda95 AT |
416 | } |
417 | ||
418 | static int __init fpga_bridge_dev_init(void) | |
419 | { | |
21aeda95 AT |
420 | fpga_bridge_class = class_create(THIS_MODULE, "fpga_bridge"); |
421 | if (IS_ERR(fpga_bridge_class)) | |
422 | return PTR_ERR(fpga_bridge_class); | |
423 | ||
424 | fpga_bridge_class->dev_groups = fpga_bridge_groups; | |
425 | fpga_bridge_class->dev_release = fpga_bridge_dev_release; | |
426 | ||
427 | return 0; | |
428 | } | |
429 | ||
430 | static void __exit fpga_bridge_dev_exit(void) | |
431 | { | |
432 | class_destroy(fpga_bridge_class); | |
433 | ida_destroy(&fpga_bridge_ida); | |
434 | } | |
435 | ||
436 | MODULE_DESCRIPTION("FPGA Bridge Driver"); | |
9c1c4b27 | 437 | MODULE_AUTHOR("Alan Tull <atull@kernel.org>"); |
21aeda95 AT |
438 | MODULE_LICENSE("GPL v2"); |
439 | ||
440 | subsys_initcall(fpga_bridge_dev_init); | |
441 | module_exit(fpga_bridge_dev_exit); |