Commit | Line | Data |
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21aeda95 AT |
1 | /* |
2 | * FPGA Bridge Framework Driver | |
3 | * | |
4 | * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved. | |
9c1c4b27 | 5 | * Copyright (C) 2017 Intel Corporation |
21aeda95 AT |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms and conditions of the GNU General Public License, | |
9 | * version 2, as published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | #include <linux/fpga/fpga-bridge.h> | |
20 | #include <linux/idr.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/spinlock.h> | |
26 | ||
27 | static DEFINE_IDA(fpga_bridge_ida); | |
28 | static struct class *fpga_bridge_class; | |
29 | ||
30 | /* Lock for adding/removing bridges to linked lists*/ | |
47910a49 | 31 | static spinlock_t bridge_list_lock; |
21aeda95 AT |
32 | |
33 | static int fpga_bridge_of_node_match(struct device *dev, const void *data) | |
34 | { | |
35 | return dev->of_node == data; | |
36 | } | |
37 | ||
38 | /** | |
39 | * fpga_bridge_enable - Enable transactions on the bridge | |
40 | * | |
41 | * @bridge: FPGA bridge | |
42 | * | |
43 | * Return: 0 for success, error code otherwise. | |
44 | */ | |
45 | int fpga_bridge_enable(struct fpga_bridge *bridge) | |
46 | { | |
47 | dev_dbg(&bridge->dev, "enable\n"); | |
48 | ||
49 | if (bridge->br_ops && bridge->br_ops->enable_set) | |
50 | return bridge->br_ops->enable_set(bridge, 1); | |
51 | ||
52 | return 0; | |
53 | } | |
54 | EXPORT_SYMBOL_GPL(fpga_bridge_enable); | |
55 | ||
56 | /** | |
57 | * fpga_bridge_disable - Disable transactions on the bridge | |
58 | * | |
59 | * @bridge: FPGA bridge | |
60 | * | |
61 | * Return: 0 for success, error code otherwise. | |
62 | */ | |
63 | int fpga_bridge_disable(struct fpga_bridge *bridge) | |
64 | { | |
65 | dev_dbg(&bridge->dev, "disable\n"); | |
66 | ||
67 | if (bridge->br_ops && bridge->br_ops->enable_set) | |
68 | return bridge->br_ops->enable_set(bridge, 0); | |
69 | ||
70 | return 0; | |
71 | } | |
72 | EXPORT_SYMBOL_GPL(fpga_bridge_disable); | |
73 | ||
9c1c4b27 AT |
74 | static struct fpga_bridge *__fpga_bridge_get(struct device *dev, |
75 | struct fpga_image_info *info) | |
21aeda95 | 76 | { |
21aeda95 AT |
77 | struct fpga_bridge *bridge; |
78 | int ret = -ENODEV; | |
79 | ||
21aeda95 | 80 | bridge = to_fpga_bridge(dev); |
21aeda95 AT |
81 | |
82 | bridge->info = info; | |
83 | ||
84 | if (!mutex_trylock(&bridge->mutex)) { | |
85 | ret = -EBUSY; | |
86 | goto err_dev; | |
87 | } | |
88 | ||
89 | if (!try_module_get(dev->parent->driver->owner)) | |
90 | goto err_ll_mod; | |
91 | ||
92 | dev_dbg(&bridge->dev, "get\n"); | |
93 | ||
94 | return bridge; | |
95 | ||
96 | err_ll_mod: | |
97 | mutex_unlock(&bridge->mutex); | |
98 | err_dev: | |
99 | put_device(dev); | |
100 | return ERR_PTR(ret); | |
101 | } | |
9c1c4b27 AT |
102 | |
103 | /** | |
104 | * of_fpga_bridge_get - get an exclusive reference to a fpga bridge | |
105 | * | |
106 | * @np: node pointer of a FPGA bridge | |
107 | * @info: fpga image specific information | |
108 | * | |
109 | * Return fpga_bridge struct if successful. | |
110 | * Return -EBUSY if someone already has a reference to the bridge. | |
111 | * Return -ENODEV if @np is not a FPGA Bridge. | |
112 | */ | |
113 | struct fpga_bridge *of_fpga_bridge_get(struct device_node *np, | |
114 | struct fpga_image_info *info) | |
115 | { | |
116 | struct device *dev; | |
117 | ||
118 | dev = class_find_device(fpga_bridge_class, NULL, np, | |
119 | fpga_bridge_of_node_match); | |
120 | if (!dev) | |
121 | return ERR_PTR(-ENODEV); | |
122 | ||
123 | return __fpga_bridge_get(dev, info); | |
124 | } | |
21aeda95 AT |
125 | EXPORT_SYMBOL_GPL(of_fpga_bridge_get); |
126 | ||
9c1c4b27 AT |
127 | static int fpga_bridge_dev_match(struct device *dev, const void *data) |
128 | { | |
129 | return dev->parent == data; | |
130 | } | |
131 | ||
132 | /** | |
133 | * fpga_bridge_get - get an exclusive reference to a fpga bridge | |
134 | * @dev: parent device that fpga bridge was registered with | |
135 | * | |
136 | * Given a device, get an exclusive reference to a fpga bridge. | |
137 | * | |
138 | * Return: fpga manager struct or IS_ERR() condition containing error code. | |
139 | */ | |
140 | struct fpga_bridge *fpga_bridge_get(struct device *dev, | |
141 | struct fpga_image_info *info) | |
142 | { | |
143 | struct device *bridge_dev; | |
144 | ||
145 | bridge_dev = class_find_device(fpga_bridge_class, NULL, dev, | |
146 | fpga_bridge_dev_match); | |
147 | if (!bridge_dev) | |
148 | return ERR_PTR(-ENODEV); | |
149 | ||
150 | return __fpga_bridge_get(bridge_dev, info); | |
151 | } | |
152 | EXPORT_SYMBOL_GPL(fpga_bridge_get); | |
153 | ||
21aeda95 AT |
154 | /** |
155 | * fpga_bridge_put - release a reference to a bridge | |
156 | * | |
157 | * @bridge: FPGA bridge | |
158 | */ | |
159 | void fpga_bridge_put(struct fpga_bridge *bridge) | |
160 | { | |
161 | dev_dbg(&bridge->dev, "put\n"); | |
162 | ||
163 | bridge->info = NULL; | |
164 | module_put(bridge->dev.parent->driver->owner); | |
165 | mutex_unlock(&bridge->mutex); | |
166 | put_device(&bridge->dev); | |
167 | } | |
168 | EXPORT_SYMBOL_GPL(fpga_bridge_put); | |
169 | ||
170 | /** | |
171 | * fpga_bridges_enable - enable bridges in a list | |
172 | * @bridge_list: list of FPGA bridges | |
173 | * | |
174 | * Enable each bridge in the list. If list is empty, do nothing. | |
175 | * | |
176 | * Return 0 for success or empty bridge list; return error code otherwise. | |
177 | */ | |
178 | int fpga_bridges_enable(struct list_head *bridge_list) | |
179 | { | |
180 | struct fpga_bridge *bridge; | |
21aeda95 AT |
181 | int ret; |
182 | ||
c37235cc | 183 | list_for_each_entry(bridge, bridge_list, node) { |
21aeda95 AT |
184 | ret = fpga_bridge_enable(bridge); |
185 | if (ret) | |
186 | return ret; | |
187 | } | |
188 | ||
189 | return 0; | |
190 | } | |
191 | EXPORT_SYMBOL_GPL(fpga_bridges_enable); | |
192 | ||
193 | /** | |
194 | * fpga_bridges_disable - disable bridges in a list | |
195 | * | |
196 | * @bridge_list: list of FPGA bridges | |
197 | * | |
198 | * Disable each bridge in the list. If list is empty, do nothing. | |
199 | * | |
200 | * Return 0 for success or empty bridge list; return error code otherwise. | |
201 | */ | |
202 | int fpga_bridges_disable(struct list_head *bridge_list) | |
203 | { | |
204 | struct fpga_bridge *bridge; | |
21aeda95 AT |
205 | int ret; |
206 | ||
c37235cc | 207 | list_for_each_entry(bridge, bridge_list, node) { |
21aeda95 AT |
208 | ret = fpga_bridge_disable(bridge); |
209 | if (ret) | |
210 | return ret; | |
211 | } | |
212 | ||
213 | return 0; | |
214 | } | |
215 | EXPORT_SYMBOL_GPL(fpga_bridges_disable); | |
216 | ||
217 | /** | |
218 | * fpga_bridges_put - put bridges | |
219 | * | |
220 | * @bridge_list: list of FPGA bridges | |
221 | * | |
222 | * For each bridge in the list, put the bridge and remove it from the list. | |
223 | * If list is empty, do nothing. | |
224 | */ | |
225 | void fpga_bridges_put(struct list_head *bridge_list) | |
226 | { | |
c37235cc | 227 | struct fpga_bridge *bridge, *next; |
21aeda95 AT |
228 | unsigned long flags; |
229 | ||
c37235cc | 230 | list_for_each_entry_safe(bridge, next, bridge_list, node) { |
21aeda95 AT |
231 | fpga_bridge_put(bridge); |
232 | ||
233 | spin_lock_irqsave(&bridge_list_lock, flags); | |
234 | list_del(&bridge->node); | |
235 | spin_unlock_irqrestore(&bridge_list_lock, flags); | |
236 | } | |
237 | } | |
238 | EXPORT_SYMBOL_GPL(fpga_bridges_put); | |
239 | ||
240 | /** | |
9c1c4b27 | 241 | * of_fpga_bridge_get_to_list - get a bridge, add it to a list |
21aeda95 AT |
242 | * |
243 | * @np: node pointer of a FPGA bridge | |
244 | * @info: fpga image specific information | |
245 | * @bridge_list: list of FPGA bridges | |
246 | * | |
247 | * Get an exclusive reference to the bridge and and it to the list. | |
248 | * | |
249 | * Return 0 for success, error code from of_fpga_bridge_get() othewise. | |
250 | */ | |
9c1c4b27 AT |
251 | int of_fpga_bridge_get_to_list(struct device_node *np, |
252 | struct fpga_image_info *info, | |
253 | struct list_head *bridge_list) | |
254 | { | |
255 | struct fpga_bridge *bridge; | |
256 | unsigned long flags; | |
257 | ||
258 | bridge = of_fpga_bridge_get(np, info); | |
259 | if (IS_ERR(bridge)) | |
260 | return PTR_ERR(bridge); | |
261 | ||
262 | spin_lock_irqsave(&bridge_list_lock, flags); | |
263 | list_add(&bridge->node, bridge_list); | |
264 | spin_unlock_irqrestore(&bridge_list_lock, flags); | |
265 | ||
266 | return 0; | |
267 | } | |
268 | EXPORT_SYMBOL_GPL(of_fpga_bridge_get_to_list); | |
269 | ||
270 | /** | |
271 | * fpga_bridge_get_to_list - given device, get a bridge, add it to a list | |
272 | * | |
273 | * @dev: FPGA bridge device | |
274 | * @info: fpga image specific information | |
275 | * @bridge_list: list of FPGA bridges | |
276 | * | |
277 | * Get an exclusive reference to the bridge and and it to the list. | |
278 | * | |
279 | * Return 0 for success, error code from fpga_bridge_get() othewise. | |
280 | */ | |
281 | int fpga_bridge_get_to_list(struct device *dev, | |
21aeda95 AT |
282 | struct fpga_image_info *info, |
283 | struct list_head *bridge_list) | |
284 | { | |
285 | struct fpga_bridge *bridge; | |
286 | unsigned long flags; | |
287 | ||
9c1c4b27 | 288 | bridge = fpga_bridge_get(dev, info); |
21aeda95 AT |
289 | if (IS_ERR(bridge)) |
290 | return PTR_ERR(bridge); | |
291 | ||
292 | spin_lock_irqsave(&bridge_list_lock, flags); | |
293 | list_add(&bridge->node, bridge_list); | |
294 | spin_unlock_irqrestore(&bridge_list_lock, flags); | |
295 | ||
296 | return 0; | |
297 | } | |
298 | EXPORT_SYMBOL_GPL(fpga_bridge_get_to_list); | |
299 | ||
300 | static ssize_t name_show(struct device *dev, | |
301 | struct device_attribute *attr, char *buf) | |
302 | { | |
303 | struct fpga_bridge *bridge = to_fpga_bridge(dev); | |
304 | ||
305 | return sprintf(buf, "%s\n", bridge->name); | |
306 | } | |
307 | ||
308 | static ssize_t state_show(struct device *dev, | |
309 | struct device_attribute *attr, char *buf) | |
310 | { | |
311 | struct fpga_bridge *bridge = to_fpga_bridge(dev); | |
312 | int enable = 1; | |
313 | ||
314 | if (bridge->br_ops && bridge->br_ops->enable_show) | |
315 | enable = bridge->br_ops->enable_show(bridge); | |
316 | ||
317 | return sprintf(buf, "%s\n", enable ? "enabled" : "disabled"); | |
318 | } | |
319 | ||
320 | static DEVICE_ATTR_RO(name); | |
321 | static DEVICE_ATTR_RO(state); | |
322 | ||
323 | static struct attribute *fpga_bridge_attrs[] = { | |
324 | &dev_attr_name.attr, | |
325 | &dev_attr_state.attr, | |
326 | NULL, | |
327 | }; | |
328 | ATTRIBUTE_GROUPS(fpga_bridge); | |
329 | ||
330 | /** | |
371cd1b1 | 331 | * fpga_bridge_create - create and initialize a struct fpga_bridge |
21aeda95 AT |
332 | * @dev: FPGA bridge device from pdev |
333 | * @name: FPGA bridge name | |
334 | * @br_ops: pointer to structure of fpga bridge ops | |
335 | * @priv: FPGA bridge private data | |
336 | * | |
371cd1b1 | 337 | * Return: struct fpga_bridge or NULL |
21aeda95 | 338 | */ |
371cd1b1 AT |
339 | struct fpga_bridge *fpga_bridge_create(struct device *dev, const char *name, |
340 | const struct fpga_bridge_ops *br_ops, | |
341 | void *priv) | |
21aeda95 AT |
342 | { |
343 | struct fpga_bridge *bridge; | |
344 | int id, ret = 0; | |
345 | ||
346 | if (!name || !strlen(name)) { | |
347 | dev_err(dev, "Attempt to register with no name!\n"); | |
371cd1b1 | 348 | return NULL; |
21aeda95 AT |
349 | } |
350 | ||
351 | bridge = kzalloc(sizeof(*bridge), GFP_KERNEL); | |
352 | if (!bridge) | |
371cd1b1 | 353 | return NULL; |
21aeda95 AT |
354 | |
355 | id = ida_simple_get(&fpga_bridge_ida, 0, 0, GFP_KERNEL); | |
356 | if (id < 0) { | |
357 | ret = id; | |
358 | goto error_kfree; | |
359 | } | |
360 | ||
361 | mutex_init(&bridge->mutex); | |
362 | INIT_LIST_HEAD(&bridge->node); | |
363 | ||
364 | bridge->name = name; | |
365 | bridge->br_ops = br_ops; | |
366 | bridge->priv = priv; | |
367 | ||
368 | device_initialize(&bridge->dev); | |
845089bb | 369 | bridge->dev.groups = br_ops->groups; |
21aeda95 AT |
370 | bridge->dev.class = fpga_bridge_class; |
371 | bridge->dev.parent = dev; | |
372 | bridge->dev.of_node = dev->of_node; | |
373 | bridge->dev.id = id; | |
21aeda95 AT |
374 | |
375 | ret = dev_set_name(&bridge->dev, "br%d", id); | |
376 | if (ret) | |
377 | goto error_device; | |
378 | ||
371cd1b1 | 379 | return bridge; |
21aeda95 AT |
380 | |
381 | error_device: | |
382 | ida_simple_remove(&fpga_bridge_ida, id); | |
383 | error_kfree: | |
384 | kfree(bridge); | |
385 | ||
371cd1b1 AT |
386 | return NULL; |
387 | } | |
388 | EXPORT_SYMBOL_GPL(fpga_bridge_create); | |
389 | ||
390 | /** | |
391 | * fpga_bridge_free - free a fpga bridge and its id | |
392 | * @bridge: FPGA bridge struct created by fpga_bridge_create | |
393 | */ | |
394 | void fpga_bridge_free(struct fpga_bridge *bridge) | |
395 | { | |
396 | ida_simple_remove(&fpga_bridge_ida, bridge->dev.id); | |
397 | kfree(bridge); | |
398 | } | |
399 | EXPORT_SYMBOL_GPL(fpga_bridge_free); | |
400 | ||
401 | /** | |
402 | * fpga_bridge_register - register a fpga bridge | |
403 | * @bridge: FPGA bridge struct created by fpga_bridge_create | |
404 | * | |
405 | * Return: 0 for success, error code otherwise. | |
406 | */ | |
407 | int fpga_bridge_register(struct fpga_bridge *bridge) | |
408 | { | |
409 | struct device *dev = &bridge->dev; | |
410 | int ret; | |
411 | ||
412 | ret = device_add(dev); | |
413 | if (ret) | |
414 | return ret; | |
415 | ||
416 | of_platform_populate(dev->of_node, NULL, NULL, dev); | |
417 | ||
418 | dev_info(dev->parent, "fpga bridge [%s] registered\n", bridge->name); | |
419 | ||
420 | return 0; | |
21aeda95 AT |
421 | } |
422 | EXPORT_SYMBOL_GPL(fpga_bridge_register); | |
423 | ||
424 | /** | |
425 | * fpga_bridge_unregister - unregister a fpga bridge driver | |
371cd1b1 | 426 | * @bridge: FPGA bridge struct created by fpga_bridge_create |
21aeda95 | 427 | */ |
371cd1b1 | 428 | void fpga_bridge_unregister(struct fpga_bridge *bridge) |
21aeda95 | 429 | { |
21aeda95 AT |
430 | /* |
431 | * If the low level driver provides a method for putting bridge into | |
432 | * a desired state upon unregister, do it. | |
433 | */ | |
434 | if (bridge->br_ops && bridge->br_ops->fpga_bridge_remove) | |
435 | bridge->br_ops->fpga_bridge_remove(bridge); | |
436 | ||
437 | device_unregister(&bridge->dev); | |
438 | } | |
439 | EXPORT_SYMBOL_GPL(fpga_bridge_unregister); | |
440 | ||
441 | static void fpga_bridge_dev_release(struct device *dev) | |
442 | { | |
443 | struct fpga_bridge *bridge = to_fpga_bridge(dev); | |
444 | ||
371cd1b1 | 445 | fpga_bridge_free(bridge); |
21aeda95 AT |
446 | } |
447 | ||
448 | static int __init fpga_bridge_dev_init(void) | |
449 | { | |
450 | spin_lock_init(&bridge_list_lock); | |
451 | ||
452 | fpga_bridge_class = class_create(THIS_MODULE, "fpga_bridge"); | |
453 | if (IS_ERR(fpga_bridge_class)) | |
454 | return PTR_ERR(fpga_bridge_class); | |
455 | ||
456 | fpga_bridge_class->dev_groups = fpga_bridge_groups; | |
457 | fpga_bridge_class->dev_release = fpga_bridge_dev_release; | |
458 | ||
459 | return 0; | |
460 | } | |
461 | ||
462 | static void __exit fpga_bridge_dev_exit(void) | |
463 | { | |
464 | class_destroy(fpga_bridge_class); | |
465 | ida_destroy(&fpga_bridge_ida); | |
466 | } | |
467 | ||
468 | MODULE_DESCRIPTION("FPGA Bridge Driver"); | |
9c1c4b27 | 469 | MODULE_AUTHOR("Alan Tull <atull@kernel.org>"); |
21aeda95 AT |
470 | MODULE_LICENSE("GPL v2"); |
471 | ||
472 | subsys_initcall(fpga_bridge_dev_init); | |
473 | module_exit(fpga_bridge_dev_exit); |