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9952f691 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
8cb7cf56 SH |
2 | /* |
3 | * System Control and Power Interface (SCPI) Message Protocol driver | |
4 | * | |
5 | * SCPI Message Protocol is used between the System Control Processor(SCP) | |
6 | * and the Application Processors(AP). The Message Handling Unit(MHU) | |
7 | * provides a mechanism for inter-processor communication between SCP's | |
8 | * Cortex M3 and AP. | |
9 | * | |
10 | * SCP offers control and management of the core/cluster power states, | |
11 | * various power domain DVFS including the core/cluster, certain system | |
12 | * clocks configuration, thermal sensors and many others. | |
13 | * | |
14 | * Copyright (C) 2015 ARM Ltd. | |
8cb7cf56 SH |
15 | */ |
16 | ||
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
18 | ||
19 | #include <linux/bitmap.h> | |
7cd49a26 | 20 | #include <linux/bitfield.h> |
8cb7cf56 SH |
21 | #include <linux/device.h> |
22 | #include <linux/err.h> | |
23 | #include <linux/export.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/kernel.h> | |
26 | #include <linux/list.h> | |
27 | #include <linux/mailbox_client.h> | |
28 | #include <linux/module.h> | |
908af696 | 29 | #include <linux/of.h> |
8cb7cf56 SH |
30 | #include <linux/of_address.h> |
31 | #include <linux/of_platform.h> | |
908af696 | 32 | #include <linux/platform_device.h> |
8cb7cf56 | 33 | #include <linux/printk.h> |
908af696 | 34 | #include <linux/property.h> |
45ca7df7 | 35 | #include <linux/pm_opp.h> |
8cb7cf56 SH |
36 | #include <linux/scpi_protocol.h> |
37 | #include <linux/slab.h> | |
38 | #include <linux/sort.h> | |
39 | #include <linux/spinlock.h> | |
40 | ||
96fe77b6 HK |
41 | #define CMD_ID_MASK GENMASK(6, 0) |
42 | #define CMD_TOKEN_ID_MASK GENMASK(15, 8) | |
43 | #define CMD_DATA_SIZE_MASK GENMASK(24, 16) | |
44 | #define CMD_LEGACY_DATA_SIZE_MASK GENMASK(28, 20) | |
45 | #define PACK_SCPI_CMD(cmd_id, tx_sz) \ | |
46 | (FIELD_PREP(CMD_ID_MASK, cmd_id) | \ | |
47 | FIELD_PREP(CMD_DATA_SIZE_MASK, tx_sz)) | |
48 | #define PACK_LEGACY_SCPI_CMD(cmd_id, tx_sz) \ | |
49 | (FIELD_PREP(CMD_ID_MASK, cmd_id) | \ | |
50 | FIELD_PREP(CMD_LEGACY_DATA_SIZE_MASK, tx_sz)) | |
51 | ||
52 | #define CMD_SIZE(cmd) FIELD_GET(CMD_DATA_SIZE_MASK, cmd) | |
53 | #define CMD_UNIQ_MASK (CMD_TOKEN_ID_MASK | CMD_ID_MASK) | |
8cb7cf56 SH |
54 | #define CMD_XTRACT_UNIQ(cmd) ((cmd) & CMD_UNIQ_MASK) |
55 | ||
56 | #define SCPI_SLOT 0 | |
57 | ||
58 | #define MAX_DVFS_DOMAINS 8 | |
bb789cd1 | 59 | #define MAX_DVFS_OPPS 16 |
81faa556 | 60 | |
7cd49a26 HK |
61 | #define PROTO_REV_MAJOR_MASK GENMASK(31, 16) |
62 | #define PROTO_REV_MINOR_MASK GENMASK(15, 0) | |
81faa556 | 63 | |
7cd49a26 HK |
64 | #define FW_REV_MAJOR_MASK GENMASK(31, 24) |
65 | #define FW_REV_MINOR_MASK GENMASK(23, 16) | |
66 | #define FW_REV_PATCH_MASK GENMASK(15, 0) | |
8cb7cf56 | 67 | |
3bdd8843 | 68 | #define MAX_RX_TIMEOUT (msecs_to_jiffies(30)) |
8cb7cf56 SH |
69 | |
70 | enum scpi_error_codes { | |
71 | SCPI_SUCCESS = 0, /* Success */ | |
72 | SCPI_ERR_PARAM = 1, /* Invalid parameter(s) */ | |
73 | SCPI_ERR_ALIGN = 2, /* Invalid alignment */ | |
74 | SCPI_ERR_SIZE = 3, /* Invalid size */ | |
75 | SCPI_ERR_HANDLER = 4, /* Invalid handler/callback */ | |
76 | SCPI_ERR_ACCESS = 5, /* Invalid access/permission denied */ | |
77 | SCPI_ERR_RANGE = 6, /* Value out of range */ | |
78 | SCPI_ERR_TIMEOUT = 7, /* Timeout has occurred */ | |
79 | SCPI_ERR_NOMEM = 8, /* Invalid memory area or pointer */ | |
80 | SCPI_ERR_PWRSTATE = 9, /* Invalid power state */ | |
81 | SCPI_ERR_SUPPORT = 10, /* Not supported or disabled */ | |
82 | SCPI_ERR_DEVICE = 11, /* Device error */ | |
83 | SCPI_ERR_BUSY = 12, /* Device busy */ | |
84 | SCPI_ERR_MAX | |
85 | }; | |
86 | ||
761d0efe | 87 | /* SCPI Standard commands */ |
8cb7cf56 SH |
88 | enum scpi_std_cmd { |
89 | SCPI_CMD_INVALID = 0x00, | |
90 | SCPI_CMD_SCPI_READY = 0x01, | |
91 | SCPI_CMD_SCPI_CAPABILITIES = 0x02, | |
92 | SCPI_CMD_SET_CSS_PWR_STATE = 0x03, | |
93 | SCPI_CMD_GET_CSS_PWR_STATE = 0x04, | |
94 | SCPI_CMD_SET_SYS_PWR_STATE = 0x05, | |
95 | SCPI_CMD_SET_CPU_TIMER = 0x06, | |
96 | SCPI_CMD_CANCEL_CPU_TIMER = 0x07, | |
97 | SCPI_CMD_DVFS_CAPABILITIES = 0x08, | |
98 | SCPI_CMD_GET_DVFS_INFO = 0x09, | |
99 | SCPI_CMD_SET_DVFS = 0x0a, | |
100 | SCPI_CMD_GET_DVFS = 0x0b, | |
101 | SCPI_CMD_GET_DVFS_STAT = 0x0c, | |
102 | SCPI_CMD_CLOCK_CAPABILITIES = 0x0d, | |
103 | SCPI_CMD_GET_CLOCK_INFO = 0x0e, | |
104 | SCPI_CMD_SET_CLOCK_VALUE = 0x0f, | |
105 | SCPI_CMD_GET_CLOCK_VALUE = 0x10, | |
106 | SCPI_CMD_PSU_CAPABILITIES = 0x11, | |
107 | SCPI_CMD_GET_PSU_INFO = 0x12, | |
108 | SCPI_CMD_SET_PSU = 0x13, | |
109 | SCPI_CMD_GET_PSU = 0x14, | |
110 | SCPI_CMD_SENSOR_CAPABILITIES = 0x15, | |
111 | SCPI_CMD_SENSOR_INFO = 0x16, | |
112 | SCPI_CMD_SENSOR_VALUE = 0x17, | |
113 | SCPI_CMD_SENSOR_CFG_PERIODIC = 0x18, | |
114 | SCPI_CMD_SENSOR_CFG_BOUNDS = 0x19, | |
115 | SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1a, | |
116 | SCPI_CMD_SET_DEVICE_PWR_STATE = 0x1b, | |
117 | SCPI_CMD_GET_DEVICE_PWR_STATE = 0x1c, | |
118 | SCPI_CMD_COUNT | |
119 | }; | |
120 | ||
4dfe32d5 NA |
121 | /* SCPI Legacy Commands */ |
122 | enum legacy_scpi_std_cmd { | |
123 | LEGACY_SCPI_CMD_INVALID = 0x00, | |
124 | LEGACY_SCPI_CMD_SCPI_READY = 0x01, | |
125 | LEGACY_SCPI_CMD_SCPI_CAPABILITIES = 0x02, | |
126 | LEGACY_SCPI_CMD_EVENT = 0x03, | |
127 | LEGACY_SCPI_CMD_SET_CSS_PWR_STATE = 0x04, | |
128 | LEGACY_SCPI_CMD_GET_CSS_PWR_STATE = 0x05, | |
129 | LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT = 0x06, | |
130 | LEGACY_SCPI_CMD_GET_PWR_STATE_STAT = 0x07, | |
131 | LEGACY_SCPI_CMD_SYS_PWR_STATE = 0x08, | |
132 | LEGACY_SCPI_CMD_L2_READY = 0x09, | |
133 | LEGACY_SCPI_CMD_SET_AP_TIMER = 0x0a, | |
134 | LEGACY_SCPI_CMD_CANCEL_AP_TIME = 0x0b, | |
135 | LEGACY_SCPI_CMD_DVFS_CAPABILITIES = 0x0c, | |
136 | LEGACY_SCPI_CMD_GET_DVFS_INFO = 0x0d, | |
137 | LEGACY_SCPI_CMD_SET_DVFS = 0x0e, | |
138 | LEGACY_SCPI_CMD_GET_DVFS = 0x0f, | |
139 | LEGACY_SCPI_CMD_GET_DVFS_STAT = 0x10, | |
140 | LEGACY_SCPI_CMD_SET_RTC = 0x11, | |
141 | LEGACY_SCPI_CMD_GET_RTC = 0x12, | |
142 | LEGACY_SCPI_CMD_CLOCK_CAPABILITIES = 0x13, | |
143 | LEGACY_SCPI_CMD_SET_CLOCK_INDEX = 0x14, | |
144 | LEGACY_SCPI_CMD_SET_CLOCK_VALUE = 0x15, | |
145 | LEGACY_SCPI_CMD_GET_CLOCK_VALUE = 0x16, | |
146 | LEGACY_SCPI_CMD_PSU_CAPABILITIES = 0x17, | |
147 | LEGACY_SCPI_CMD_SET_PSU = 0x18, | |
148 | LEGACY_SCPI_CMD_GET_PSU = 0x19, | |
149 | LEGACY_SCPI_CMD_SENSOR_CAPABILITIES = 0x1a, | |
150 | LEGACY_SCPI_CMD_SENSOR_INFO = 0x1b, | |
151 | LEGACY_SCPI_CMD_SENSOR_VALUE = 0x1c, | |
152 | LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC = 0x1d, | |
153 | LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS = 0x1e, | |
154 | LEGACY_SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1f, | |
155 | LEGACY_SCPI_CMD_COUNT | |
156 | }; | |
157 | ||
158 | /* List all commands that are required to go through the high priority link */ | |
159 | static int legacy_hpriority_cmds[] = { | |
160 | LEGACY_SCPI_CMD_GET_CSS_PWR_STATE, | |
161 | LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT, | |
162 | LEGACY_SCPI_CMD_GET_PWR_STATE_STAT, | |
163 | LEGACY_SCPI_CMD_SET_DVFS, | |
164 | LEGACY_SCPI_CMD_GET_DVFS, | |
165 | LEGACY_SCPI_CMD_SET_RTC, | |
166 | LEGACY_SCPI_CMD_GET_RTC, | |
167 | LEGACY_SCPI_CMD_SET_CLOCK_INDEX, | |
168 | LEGACY_SCPI_CMD_SET_CLOCK_VALUE, | |
169 | LEGACY_SCPI_CMD_GET_CLOCK_VALUE, | |
170 | LEGACY_SCPI_CMD_SET_PSU, | |
171 | LEGACY_SCPI_CMD_GET_PSU, | |
172 | LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC, | |
173 | LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS, | |
174 | }; | |
175 | ||
176 | /* List all commands used by this driver, used as indexes */ | |
761d0efe SH |
177 | enum scpi_drv_cmds { |
178 | CMD_SCPI_CAPABILITIES = 0, | |
179 | CMD_GET_CLOCK_INFO, | |
180 | CMD_GET_CLOCK_VALUE, | |
181 | CMD_SET_CLOCK_VALUE, | |
182 | CMD_GET_DVFS, | |
183 | CMD_SET_DVFS, | |
184 | CMD_GET_DVFS_INFO, | |
185 | CMD_SENSOR_CAPABILITIES, | |
186 | CMD_SENSOR_INFO, | |
187 | CMD_SENSOR_VALUE, | |
188 | CMD_SET_DEVICE_PWR_STATE, | |
189 | CMD_GET_DEVICE_PWR_STATE, | |
190 | CMD_MAX_COUNT, | |
191 | }; | |
192 | ||
193 | static int scpi_std_commands[CMD_MAX_COUNT] = { | |
194 | SCPI_CMD_SCPI_CAPABILITIES, | |
195 | SCPI_CMD_GET_CLOCK_INFO, | |
196 | SCPI_CMD_GET_CLOCK_VALUE, | |
197 | SCPI_CMD_SET_CLOCK_VALUE, | |
198 | SCPI_CMD_GET_DVFS, | |
199 | SCPI_CMD_SET_DVFS, | |
200 | SCPI_CMD_GET_DVFS_INFO, | |
201 | SCPI_CMD_SENSOR_CAPABILITIES, | |
202 | SCPI_CMD_SENSOR_INFO, | |
203 | SCPI_CMD_SENSOR_VALUE, | |
204 | SCPI_CMD_SET_DEVICE_PWR_STATE, | |
205 | SCPI_CMD_GET_DEVICE_PWR_STATE, | |
206 | }; | |
207 | ||
4dfe32d5 NA |
208 | static int scpi_legacy_commands[CMD_MAX_COUNT] = { |
209 | LEGACY_SCPI_CMD_SCPI_CAPABILITIES, | |
210 | -1, /* GET_CLOCK_INFO */ | |
211 | LEGACY_SCPI_CMD_GET_CLOCK_VALUE, | |
212 | LEGACY_SCPI_CMD_SET_CLOCK_VALUE, | |
213 | LEGACY_SCPI_CMD_GET_DVFS, | |
214 | LEGACY_SCPI_CMD_SET_DVFS, | |
215 | LEGACY_SCPI_CMD_GET_DVFS_INFO, | |
216 | LEGACY_SCPI_CMD_SENSOR_CAPABILITIES, | |
217 | LEGACY_SCPI_CMD_SENSOR_INFO, | |
218 | LEGACY_SCPI_CMD_SENSOR_VALUE, | |
219 | -1, /* SET_DEVICE_PWR_STATE */ | |
220 | -1, /* GET_DEVICE_PWR_STATE */ | |
221 | }; | |
222 | ||
8cb7cf56 SH |
223 | struct scpi_xfer { |
224 | u32 slot; /* has to be first element */ | |
225 | u32 cmd; | |
226 | u32 status; | |
227 | const void *tx_buf; | |
228 | void *rx_buf; | |
229 | unsigned int tx_len; | |
230 | unsigned int rx_len; | |
231 | struct list_head node; | |
232 | struct completion done; | |
233 | }; | |
234 | ||
235 | struct scpi_chan { | |
236 | struct mbox_client cl; | |
237 | struct mbox_chan *chan; | |
238 | void __iomem *tx_payload; | |
239 | void __iomem *rx_payload; | |
240 | struct list_head rx_pending; | |
241 | struct list_head xfers_list; | |
242 | struct scpi_xfer *xfers; | |
243 | spinlock_t rx_lock; /* locking for the rx pending list */ | |
244 | struct mutex xfers_lock; | |
245 | u8 token; | |
246 | }; | |
247 | ||
248 | struct scpi_drvinfo { | |
249 | u32 protocol_version; | |
250 | u32 firmware_version; | |
4dfe32d5 | 251 | bool is_legacy; |
8cb7cf56 | 252 | int num_chans; |
761d0efe | 253 | int *commands; |
4dfe32d5 | 254 | DECLARE_BITMAP(cmd_priority, LEGACY_SCPI_CMD_COUNT); |
8cb7cf56 SH |
255 | atomic_t next_chan; |
256 | struct scpi_ops *scpi_ops; | |
257 | struct scpi_chan *channels; | |
258 | struct scpi_dvfs_info *dvfs[MAX_DVFS_DOMAINS]; | |
259 | }; | |
260 | ||
261 | /* | |
262 | * The SCP firmware only executes in little-endian mode, so any buffers | |
263 | * shared through SCPI should have their contents converted to little-endian | |
264 | */ | |
265 | struct scpi_shared_mem { | |
266 | __le32 command; | |
267 | __le32 status; | |
539db762 | 268 | u8 payload[]; |
8cb7cf56 SH |
269 | } __packed; |
270 | ||
4dfe32d5 NA |
271 | struct legacy_scpi_shared_mem { |
272 | __le32 status; | |
539db762 | 273 | u8 payload[]; |
4dfe32d5 NA |
274 | } __packed; |
275 | ||
8cb7cf56 SH |
276 | struct scp_capabilities { |
277 | __le32 protocol_version; | |
278 | __le32 event_version; | |
279 | __le32 platform_version; | |
280 | __le32 commands[4]; | |
281 | } __packed; | |
282 | ||
283 | struct clk_get_info { | |
284 | __le16 id; | |
285 | __le16 flags; | |
286 | __le32 min_rate; | |
287 | __le32 max_rate; | |
288 | u8 name[20]; | |
289 | } __packed; | |
290 | ||
8cb7cf56 SH |
291 | struct clk_set_value { |
292 | __le16 id; | |
293 | __le16 reserved; | |
294 | __le32 rate; | |
295 | } __packed; | |
296 | ||
4dfe32d5 NA |
297 | struct legacy_clk_set_value { |
298 | __le32 rate; | |
299 | __le16 id; | |
300 | __le16 reserved; | |
301 | } __packed; | |
302 | ||
8cb7cf56 | 303 | struct dvfs_info { |
a963d7c5 HK |
304 | u8 domain; |
305 | u8 opp_count; | |
306 | __le16 latency; | |
8cb7cf56 SH |
307 | struct { |
308 | __le32 freq; | |
309 | __le32 m_volt; | |
310 | } opps[MAX_DVFS_OPPS]; | |
311 | } __packed; | |
312 | ||
8cb7cf56 SH |
313 | struct dvfs_set { |
314 | u8 domain; | |
315 | u8 index; | |
316 | } __packed; | |
317 | ||
38a1bdc9 PA |
318 | struct _scpi_sensor_info { |
319 | __le16 sensor_id; | |
320 | u8 class; | |
321 | u8 trigger_type; | |
322 | char name[20]; | |
323 | }; | |
324 | ||
37a441dc | 325 | struct dev_pstate_set { |
0d301768 | 326 | __le16 dev_id; |
37a441dc SH |
327 | u8 pstate; |
328 | } __packed; | |
329 | ||
8cb7cf56 SH |
330 | static struct scpi_drvinfo *scpi_info; |
331 | ||
332 | static int scpi_linux_errmap[SCPI_ERR_MAX] = { | |
333 | /* better than switch case as long as return value is continuous */ | |
334 | 0, /* SCPI_SUCCESS */ | |
335 | -EINVAL, /* SCPI_ERR_PARAM */ | |
336 | -ENOEXEC, /* SCPI_ERR_ALIGN */ | |
337 | -EMSGSIZE, /* SCPI_ERR_SIZE */ | |
338 | -EINVAL, /* SCPI_ERR_HANDLER */ | |
339 | -EACCES, /* SCPI_ERR_ACCESS */ | |
340 | -ERANGE, /* SCPI_ERR_RANGE */ | |
341 | -ETIMEDOUT, /* SCPI_ERR_TIMEOUT */ | |
342 | -ENOMEM, /* SCPI_ERR_NOMEM */ | |
343 | -EINVAL, /* SCPI_ERR_PWRSTATE */ | |
344 | -EOPNOTSUPP, /* SCPI_ERR_SUPPORT */ | |
345 | -EIO, /* SCPI_ERR_DEVICE */ | |
346 | -EBUSY, /* SCPI_ERR_BUSY */ | |
347 | }; | |
348 | ||
349 | static inline int scpi_to_linux_errno(int errno) | |
350 | { | |
351 | if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX) | |
352 | return scpi_linux_errmap[errno]; | |
353 | return -EIO; | |
354 | } | |
355 | ||
356 | static void scpi_process_cmd(struct scpi_chan *ch, u32 cmd) | |
357 | { | |
358 | unsigned long flags; | |
359 | struct scpi_xfer *t, *match = NULL; | |
360 | ||
361 | spin_lock_irqsave(&ch->rx_lock, flags); | |
362 | if (list_empty(&ch->rx_pending)) { | |
363 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
364 | return; | |
365 | } | |
366 | ||
4dfe32d5 NA |
367 | /* Command type is not replied by the SCP Firmware in legacy Mode |
368 | * We should consider that command is the head of pending RX commands | |
369 | * if the list is not empty. In TX only mode, the list would be empty. | |
370 | */ | |
371 | if (scpi_info->is_legacy) { | |
372 | match = list_first_entry(&ch->rx_pending, struct scpi_xfer, | |
373 | node); | |
374 | list_del(&match->node); | |
375 | } else { | |
376 | list_for_each_entry(t, &ch->rx_pending, node) | |
377 | if (CMD_XTRACT_UNIQ(t->cmd) == CMD_XTRACT_UNIQ(cmd)) { | |
378 | list_del(&t->node); | |
379 | match = t; | |
380 | break; | |
381 | } | |
382 | } | |
8cb7cf56 SH |
383 | /* check if wait_for_completion is in progress or timed-out */ |
384 | if (match && !completion_done(&match->done)) { | |
4dfe32d5 NA |
385 | unsigned int len; |
386 | ||
387 | if (scpi_info->is_legacy) { | |
5204abd3 HK |
388 | struct legacy_scpi_shared_mem __iomem *mem = |
389 | ch->rx_payload; | |
4dfe32d5 NA |
390 | |
391 | /* RX Length is not replied by the legacy Firmware */ | |
392 | len = match->rx_len; | |
393 | ||
5204abd3 | 394 | match->status = ioread32(&mem->status); |
4dfe32d5 NA |
395 | memcpy_fromio(match->rx_buf, mem->payload, len); |
396 | } else { | |
5204abd3 | 397 | struct scpi_shared_mem __iomem *mem = ch->rx_payload; |
4dfe32d5 | 398 | |
96fe77b6 | 399 | len = min_t(unsigned int, match->rx_len, CMD_SIZE(cmd)); |
4dfe32d5 | 400 | |
5204abd3 | 401 | match->status = ioread32(&mem->status); |
4dfe32d5 NA |
402 | memcpy_fromio(match->rx_buf, mem->payload, len); |
403 | } | |
8cb7cf56 | 404 | |
8cb7cf56 SH |
405 | if (match->rx_len > len) |
406 | memset(match->rx_buf + len, 0, match->rx_len - len); | |
407 | complete(&match->done); | |
408 | } | |
409 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
410 | } | |
411 | ||
412 | static void scpi_handle_remote_msg(struct mbox_client *c, void *msg) | |
413 | { | |
414 | struct scpi_chan *ch = container_of(c, struct scpi_chan, cl); | |
5204abd3 | 415 | struct scpi_shared_mem __iomem *mem = ch->rx_payload; |
4dfe32d5 NA |
416 | u32 cmd = 0; |
417 | ||
418 | if (!scpi_info->is_legacy) | |
5204abd3 | 419 | cmd = ioread32(&mem->command); |
8cb7cf56 SH |
420 | |
421 | scpi_process_cmd(ch, cmd); | |
422 | } | |
423 | ||
424 | static void scpi_tx_prepare(struct mbox_client *c, void *msg) | |
425 | { | |
426 | unsigned long flags; | |
427 | struct scpi_xfer *t = msg; | |
428 | struct scpi_chan *ch = container_of(c, struct scpi_chan, cl); | |
5204abd3 | 429 | struct scpi_shared_mem __iomem *mem = ch->tx_payload; |
8cb7cf56 | 430 | |
4dfe32d5 NA |
431 | if (t->tx_buf) { |
432 | if (scpi_info->is_legacy) | |
433 | memcpy_toio(ch->tx_payload, t->tx_buf, t->tx_len); | |
434 | else | |
435 | memcpy_toio(mem->payload, t->tx_buf, t->tx_len); | |
436 | } | |
437 | ||
8cb7cf56 SH |
438 | if (t->rx_buf) { |
439 | if (!(++ch->token)) | |
440 | ++ch->token; | |
96fe77b6 | 441 | t->cmd |= FIELD_PREP(CMD_TOKEN_ID_MASK, ch->token); |
8cb7cf56 SH |
442 | spin_lock_irqsave(&ch->rx_lock, flags); |
443 | list_add_tail(&t->node, &ch->rx_pending); | |
444 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
445 | } | |
4dfe32d5 NA |
446 | |
447 | if (!scpi_info->is_legacy) | |
5204abd3 | 448 | iowrite32(t->cmd, &mem->command); |
8cb7cf56 SH |
449 | } |
450 | ||
451 | static struct scpi_xfer *get_scpi_xfer(struct scpi_chan *ch) | |
452 | { | |
453 | struct scpi_xfer *t; | |
454 | ||
455 | mutex_lock(&ch->xfers_lock); | |
456 | if (list_empty(&ch->xfers_list)) { | |
457 | mutex_unlock(&ch->xfers_lock); | |
458 | return NULL; | |
459 | } | |
460 | t = list_first_entry(&ch->xfers_list, struct scpi_xfer, node); | |
461 | list_del(&t->node); | |
462 | mutex_unlock(&ch->xfers_lock); | |
463 | return t; | |
464 | } | |
465 | ||
466 | static void put_scpi_xfer(struct scpi_xfer *t, struct scpi_chan *ch) | |
467 | { | |
468 | mutex_lock(&ch->xfers_lock); | |
469 | list_add_tail(&t->node, &ch->xfers_list); | |
470 | mutex_unlock(&ch->xfers_lock); | |
471 | } | |
472 | ||
761d0efe | 473 | static int scpi_send_message(u8 idx, void *tx_buf, unsigned int tx_len, |
8cb7cf56 SH |
474 | void *rx_buf, unsigned int rx_len) |
475 | { | |
476 | int ret; | |
477 | u8 chan; | |
761d0efe | 478 | u8 cmd; |
8cb7cf56 SH |
479 | struct scpi_xfer *msg; |
480 | struct scpi_chan *scpi_chan; | |
481 | ||
761d0efe SH |
482 | if (scpi_info->commands[idx] < 0) |
483 | return -EOPNOTSUPP; | |
484 | ||
485 | cmd = scpi_info->commands[idx]; | |
486 | ||
4dfe32d5 NA |
487 | if (scpi_info->is_legacy) |
488 | chan = test_bit(cmd, scpi_info->cmd_priority) ? 1 : 0; | |
489 | else | |
490 | chan = atomic_inc_return(&scpi_info->next_chan) % | |
491 | scpi_info->num_chans; | |
8cb7cf56 SH |
492 | scpi_chan = scpi_info->channels + chan; |
493 | ||
494 | msg = get_scpi_xfer(scpi_chan); | |
495 | if (!msg) | |
496 | return -ENOMEM; | |
497 | ||
4dfe32d5 NA |
498 | if (scpi_info->is_legacy) { |
499 | msg->cmd = PACK_LEGACY_SCPI_CMD(cmd, tx_len); | |
500 | msg->slot = msg->cmd; | |
501 | } else { | |
502 | msg->slot = BIT(SCPI_SLOT); | |
503 | msg->cmd = PACK_SCPI_CMD(cmd, tx_len); | |
504 | } | |
8cb7cf56 SH |
505 | msg->tx_buf = tx_buf; |
506 | msg->tx_len = tx_len; | |
507 | msg->rx_buf = rx_buf; | |
508 | msg->rx_len = rx_len; | |
c511fa3f | 509 | reinit_completion(&msg->done); |
8cb7cf56 SH |
510 | |
511 | ret = mbox_send_message(scpi_chan->chan, msg); | |
512 | if (ret < 0 || !rx_buf) | |
513 | goto out; | |
514 | ||
515 | if (!wait_for_completion_timeout(&msg->done, MAX_RX_TIMEOUT)) | |
516 | ret = -ETIMEDOUT; | |
517 | else | |
518 | /* first status word */ | |
dd9a1d69 | 519 | ret = msg->status; |
8cb7cf56 SH |
520 | out: |
521 | if (ret < 0 && rx_buf) /* remove entry from the list if timed-out */ | |
522 | scpi_process_cmd(scpi_chan, msg->cmd); | |
523 | ||
524 | put_scpi_xfer(msg, scpi_chan); | |
525 | /* SCPI error codes > 0, translate them to Linux scale*/ | |
526 | return ret > 0 ? scpi_to_linux_errno(ret) : ret; | |
527 | } | |
528 | ||
529 | static u32 scpi_get_version(void) | |
530 | { | |
531 | return scpi_info->protocol_version; | |
532 | } | |
533 | ||
534 | static int | |
535 | scpi_clk_get_range(u16 clk_id, unsigned long *min, unsigned long *max) | |
536 | { | |
537 | int ret; | |
538 | struct clk_get_info clk; | |
539 | __le16 le_clk_id = cpu_to_le16(clk_id); | |
540 | ||
761d0efe | 541 | ret = scpi_send_message(CMD_GET_CLOCK_INFO, &le_clk_id, |
8cb7cf56 SH |
542 | sizeof(le_clk_id), &clk, sizeof(clk)); |
543 | if (!ret) { | |
544 | *min = le32_to_cpu(clk.min_rate); | |
545 | *max = le32_to_cpu(clk.max_rate); | |
546 | } | |
547 | return ret; | |
548 | } | |
549 | ||
550 | static unsigned long scpi_clk_get_val(u16 clk_id) | |
551 | { | |
552 | int ret; | |
c10bd41a | 553 | __le32 rate; |
8cb7cf56 SH |
554 | __le16 le_clk_id = cpu_to_le16(clk_id); |
555 | ||
761d0efe | 556 | ret = scpi_send_message(CMD_GET_CLOCK_VALUE, &le_clk_id, |
c10bd41a | 557 | sizeof(le_clk_id), &rate, sizeof(rate)); |
d9cd78ed DC |
558 | if (ret) |
559 | return 0; | |
761d0efe | 560 | |
d9cd78ed | 561 | return le32_to_cpu(rate); |
8cb7cf56 SH |
562 | } |
563 | ||
564 | static int scpi_clk_set_val(u16 clk_id, unsigned long rate) | |
565 | { | |
566 | int stat; | |
567 | struct clk_set_value clk = { | |
568 | .id = cpu_to_le16(clk_id), | |
569 | .rate = cpu_to_le32(rate) | |
570 | }; | |
571 | ||
761d0efe | 572 | return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk), |
8cb7cf56 SH |
573 | &stat, sizeof(stat)); |
574 | } | |
575 | ||
4dfe32d5 NA |
576 | static int legacy_scpi_clk_set_val(u16 clk_id, unsigned long rate) |
577 | { | |
578 | int stat; | |
579 | struct legacy_clk_set_value clk = { | |
580 | .id = cpu_to_le16(clk_id), | |
581 | .rate = cpu_to_le32(rate) | |
582 | }; | |
583 | ||
584 | return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk), | |
585 | &stat, sizeof(stat)); | |
586 | } | |
587 | ||
8cb7cf56 SH |
588 | static int scpi_dvfs_get_idx(u8 domain) |
589 | { | |
590 | int ret; | |
f9d91de0 | 591 | u8 dvfs_idx; |
8cb7cf56 | 592 | |
761d0efe | 593 | ret = scpi_send_message(CMD_GET_DVFS, &domain, sizeof(domain), |
f9d91de0 | 594 | &dvfs_idx, sizeof(dvfs_idx)); |
761d0efe | 595 | |
f9d91de0 | 596 | return ret ? ret : dvfs_idx; |
8cb7cf56 SH |
597 | } |
598 | ||
599 | static int scpi_dvfs_set_idx(u8 domain, u8 index) | |
600 | { | |
601 | int stat; | |
602 | struct dvfs_set dvfs = {domain, index}; | |
603 | ||
761d0efe | 604 | return scpi_send_message(CMD_SET_DVFS, &dvfs, sizeof(dvfs), |
8cb7cf56 SH |
605 | &stat, sizeof(stat)); |
606 | } | |
607 | ||
608 | static int opp_cmp_func(const void *opp1, const void *opp2) | |
609 | { | |
610 | const struct scpi_opp *t1 = opp1, *t2 = opp2; | |
611 | ||
612 | return t1->freq - t2->freq; | |
613 | } | |
614 | ||
615 | static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain) | |
616 | { | |
617 | struct scpi_dvfs_info *info; | |
618 | struct scpi_opp *opp; | |
619 | struct dvfs_info buf; | |
620 | int ret, i; | |
621 | ||
81faa556 OJ |
622 | if (domain >= MAX_DVFS_DOMAINS) |
623 | return ERR_PTR(-EINVAL); | |
624 | ||
625 | if (scpi_info->dvfs[domain]) /* data already populated */ | |
626 | return scpi_info->dvfs[domain]; | |
627 | ||
761d0efe | 628 | ret = scpi_send_message(CMD_GET_DVFS_INFO, &domain, sizeof(domain), |
8cb7cf56 | 629 | &buf, sizeof(buf)); |
8cb7cf56 | 630 | if (ret) |
81faa556 | 631 | return ERR_PTR(ret); |
8cb7cf56 | 632 | |
81faa556 | 633 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
8cb7cf56 | 634 | if (!info) |
81faa556 | 635 | return ERR_PTR(-ENOMEM); |
8cb7cf56 | 636 | |
a963d7c5 HK |
637 | info->count = buf.opp_count; |
638 | info->latency = le16_to_cpu(buf.latency) * 1000; /* uS to nS */ | |
8cb7cf56 | 639 | |
81faa556 OJ |
640 | info->opps = kcalloc(info->count, sizeof(*opp), GFP_KERNEL); |
641 | if (!info->opps) { | |
642 | kfree(info); | |
643 | return ERR_PTR(-ENOMEM); | |
644 | } | |
8cb7cf56 SH |
645 | |
646 | for (i = 0, opp = info->opps; i < info->count; i++, opp++) { | |
647 | opp->freq = le32_to_cpu(buf.opps[i].freq); | |
648 | opp->m_volt = le32_to_cpu(buf.opps[i].m_volt); | |
649 | } | |
650 | ||
651 | sort(info->opps, info->count, sizeof(*opp), opp_cmp_func, NULL); | |
652 | ||
653 | scpi_info->dvfs[domain] = info; | |
81faa556 | 654 | return info; |
8cb7cf56 SH |
655 | } |
656 | ||
45ca7df7 SH |
657 | static int scpi_dev_domain_id(struct device *dev) |
658 | { | |
659 | struct of_phandle_args clkspec; | |
660 | ||
661 | if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells", | |
662 | 0, &clkspec)) | |
663 | return -EINVAL; | |
664 | ||
665 | return clkspec.args[0]; | |
666 | } | |
667 | ||
668 | static struct scpi_dvfs_info *scpi_dvfs_info(struct device *dev) | |
669 | { | |
670 | int domain = scpi_dev_domain_id(dev); | |
671 | ||
672 | if (domain < 0) | |
673 | return ERR_PTR(domain); | |
674 | ||
675 | return scpi_dvfs_get_info(domain); | |
676 | } | |
677 | ||
678 | static int scpi_dvfs_get_transition_latency(struct device *dev) | |
679 | { | |
680 | struct scpi_dvfs_info *info = scpi_dvfs_info(dev); | |
681 | ||
682 | if (IS_ERR(info)) | |
683 | return PTR_ERR(info); | |
684 | ||
45ca7df7 SH |
685 | return info->latency; |
686 | } | |
687 | ||
688 | static int scpi_dvfs_add_opps_to_device(struct device *dev) | |
689 | { | |
690 | int idx, ret; | |
691 | struct scpi_opp *opp; | |
692 | struct scpi_dvfs_info *info = scpi_dvfs_info(dev); | |
693 | ||
694 | if (IS_ERR(info)) | |
695 | return PTR_ERR(info); | |
696 | ||
697 | if (!info->opps) | |
698 | return -EIO; | |
699 | ||
700 | for (opp = info->opps, idx = 0; idx < info->count; idx++, opp++) { | |
701 | ret = dev_pm_opp_add(dev, opp->freq, opp->m_volt * 1000); | |
702 | if (ret) { | |
703 | dev_warn(dev, "failed to add opp %uHz %umV\n", | |
704 | opp->freq, opp->m_volt); | |
705 | while (idx-- > 0) | |
706 | dev_pm_opp_remove(dev, (--opp)->freq); | |
707 | return ret; | |
708 | } | |
709 | } | |
710 | return 0; | |
711 | } | |
712 | ||
38a1bdc9 PA |
713 | static int scpi_sensor_get_capability(u16 *sensors) |
714 | { | |
17431b78 | 715 | __le16 cap; |
38a1bdc9 PA |
716 | int ret; |
717 | ||
17431b78 HK |
718 | ret = scpi_send_message(CMD_SENSOR_CAPABILITIES, NULL, 0, &cap, |
719 | sizeof(cap)); | |
38a1bdc9 | 720 | if (!ret) |
17431b78 | 721 | *sensors = le16_to_cpu(cap); |
38a1bdc9 PA |
722 | |
723 | return ret; | |
724 | } | |
725 | ||
726 | static int scpi_sensor_get_info(u16 sensor_id, struct scpi_sensor_info *info) | |
727 | { | |
728 | __le16 id = cpu_to_le16(sensor_id); | |
729 | struct _scpi_sensor_info _info; | |
730 | int ret; | |
731 | ||
761d0efe | 732 | ret = scpi_send_message(CMD_SENSOR_INFO, &id, sizeof(id), |
38a1bdc9 PA |
733 | &_info, sizeof(_info)); |
734 | if (!ret) { | |
735 | memcpy(info, &_info, sizeof(*info)); | |
736 | info->sensor_id = le16_to_cpu(_info.sensor_id); | |
737 | } | |
738 | ||
739 | return ret; | |
740 | } | |
741 | ||
3678b98f | 742 | static int scpi_sensor_get_value(u16 sensor, u64 *val) |
38a1bdc9 | 743 | { |
dd9a1d69 | 744 | __le16 id = cpu_to_le16(sensor); |
c10bd41a | 745 | __le64 value; |
38a1bdc9 PA |
746 | int ret; |
747 | ||
761d0efe | 748 | ret = scpi_send_message(CMD_SENSOR_VALUE, &id, sizeof(id), |
c10bd41a | 749 | &value, sizeof(value)); |
a766347b MB |
750 | if (ret) |
751 | return ret; | |
752 | ||
753 | if (scpi_info->is_legacy) | |
83a6060c | 754 | /* only 32-bits supported, upper 32 bits can be junk */ |
c10bd41a | 755 | *val = le32_to_cpup((__le32 *)&value); |
a766347b | 756 | else |
c10bd41a | 757 | *val = le64_to_cpu(value); |
38a1bdc9 | 758 | |
a766347b | 759 | return 0; |
38a1bdc9 PA |
760 | } |
761 | ||
37a441dc SH |
762 | static int scpi_device_get_power_state(u16 dev_id) |
763 | { | |
764 | int ret; | |
765 | u8 pstate; | |
766 | __le16 id = cpu_to_le16(dev_id); | |
767 | ||
761d0efe | 768 | ret = scpi_send_message(CMD_GET_DEVICE_PWR_STATE, &id, |
37a441dc SH |
769 | sizeof(id), &pstate, sizeof(pstate)); |
770 | return ret ? ret : pstate; | |
771 | } | |
772 | ||
773 | static int scpi_device_set_power_state(u16 dev_id, u8 pstate) | |
774 | { | |
775 | int stat; | |
776 | struct dev_pstate_set dev_set = { | |
777 | .dev_id = cpu_to_le16(dev_id), | |
778 | .pstate = pstate, | |
779 | }; | |
780 | ||
761d0efe | 781 | return scpi_send_message(CMD_SET_DEVICE_PWR_STATE, &dev_set, |
37a441dc SH |
782 | sizeof(dev_set), &stat, sizeof(stat)); |
783 | } | |
784 | ||
8cb7cf56 SH |
785 | static struct scpi_ops scpi_ops = { |
786 | .get_version = scpi_get_version, | |
787 | .clk_get_range = scpi_clk_get_range, | |
788 | .clk_get_val = scpi_clk_get_val, | |
789 | .clk_set_val = scpi_clk_set_val, | |
790 | .dvfs_get_idx = scpi_dvfs_get_idx, | |
791 | .dvfs_set_idx = scpi_dvfs_set_idx, | |
792 | .dvfs_get_info = scpi_dvfs_get_info, | |
45ca7df7 SH |
793 | .device_domain_id = scpi_dev_domain_id, |
794 | .get_transition_latency = scpi_dvfs_get_transition_latency, | |
795 | .add_opps_to_device = scpi_dvfs_add_opps_to_device, | |
38a1bdc9 PA |
796 | .sensor_get_capability = scpi_sensor_get_capability, |
797 | .sensor_get_info = scpi_sensor_get_info, | |
798 | .sensor_get_value = scpi_sensor_get_value, | |
37a441dc SH |
799 | .device_get_power_state = scpi_device_get_power_state, |
800 | .device_set_power_state = scpi_device_set_power_state, | |
8cb7cf56 SH |
801 | }; |
802 | ||
803 | struct scpi_ops *get_scpi_ops(void) | |
804 | { | |
805 | return scpi_info ? scpi_info->scpi_ops : NULL; | |
806 | } | |
807 | EXPORT_SYMBOL_GPL(get_scpi_ops); | |
808 | ||
809 | static int scpi_init_versions(struct scpi_drvinfo *info) | |
810 | { | |
811 | int ret; | |
812 | struct scp_capabilities caps; | |
813 | ||
761d0efe | 814 | ret = scpi_send_message(CMD_SCPI_CAPABILITIES, NULL, 0, |
8cb7cf56 SH |
815 | &caps, sizeof(caps)); |
816 | if (!ret) { | |
817 | info->protocol_version = le32_to_cpu(caps.protocol_version); | |
818 | info->firmware_version = le32_to_cpu(caps.platform_version); | |
819 | } | |
abd3e805 | 820 | /* Ignore error if not implemented */ |
689640ef | 821 | if (info->is_legacy && ret == -EOPNOTSUPP) |
abd3e805 NA |
822 | return 0; |
823 | ||
8cb7cf56 SH |
824 | return ret; |
825 | } | |
826 | ||
827 | static ssize_t protocol_version_show(struct device *dev, | |
828 | struct device_attribute *attr, char *buf) | |
829 | { | |
81faa556 OJ |
830 | struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev); |
831 | ||
7cd49a26 HK |
832 | return sprintf(buf, "%lu.%lu\n", |
833 | FIELD_GET(PROTO_REV_MAJOR_MASK, scpi_info->protocol_version), | |
834 | FIELD_GET(PROTO_REV_MINOR_MASK, scpi_info->protocol_version)); | |
8cb7cf56 SH |
835 | } |
836 | static DEVICE_ATTR_RO(protocol_version); | |
837 | ||
838 | static ssize_t firmware_version_show(struct device *dev, | |
839 | struct device_attribute *attr, char *buf) | |
840 | { | |
81faa556 OJ |
841 | struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev); |
842 | ||
7cd49a26 HK |
843 | return sprintf(buf, "%lu.%lu.%lu\n", |
844 | FIELD_GET(FW_REV_MAJOR_MASK, scpi_info->firmware_version), | |
845 | FIELD_GET(FW_REV_MINOR_MASK, scpi_info->firmware_version), | |
846 | FIELD_GET(FW_REV_PATCH_MASK, scpi_info->firmware_version)); | |
8cb7cf56 SH |
847 | } |
848 | static DEVICE_ATTR_RO(firmware_version); | |
849 | ||
850 | static struct attribute *versions_attrs[] = { | |
851 | &dev_attr_firmware_version.attr, | |
852 | &dev_attr_protocol_version.attr, | |
853 | NULL, | |
854 | }; | |
855 | ATTRIBUTE_GROUPS(versions); | |
856 | ||
c14f1db4 | 857 | static void scpi_free_channels(void *data) |
8cb7cf56 | 858 | { |
c14f1db4 | 859 | struct scpi_drvinfo *info = data; |
8cb7cf56 SH |
860 | int i; |
861 | ||
c14f1db4 HK |
862 | for (i = 0; i < info->num_chans; i++) |
863 | mbox_free_channel(info->channels[i].chan); | |
81faa556 OJ |
864 | } |
865 | ||
25956650 | 866 | static void scpi_remove(struct platform_device *pdev) |
81faa556 OJ |
867 | { |
868 | int i; | |
81faa556 OJ |
869 | struct scpi_drvinfo *info = platform_get_drvdata(pdev); |
870 | ||
871 | scpi_info = NULL; /* stop exporting SCPI ops through get_scpi_ops */ | |
872 | ||
81faa556 OJ |
873 | for (i = 0; i < MAX_DVFS_DOMAINS && info->dvfs[i]; i++) { |
874 | kfree(info->dvfs[i]->opps); | |
875 | kfree(info->dvfs[i]); | |
876 | } | |
8cb7cf56 SH |
877 | } |
878 | ||
8cb7cf56 SH |
879 | #define MAX_SCPI_XFERS 10 |
880 | static int scpi_alloc_xfer_list(struct device *dev, struct scpi_chan *ch) | |
881 | { | |
882 | int i; | |
883 | struct scpi_xfer *xfers; | |
884 | ||
a86854d0 | 885 | xfers = devm_kcalloc(dev, MAX_SCPI_XFERS, sizeof(*xfers), GFP_KERNEL); |
8cb7cf56 SH |
886 | if (!xfers) |
887 | return -ENOMEM; | |
888 | ||
889 | ch->xfers = xfers; | |
c511fa3f AK |
890 | for (i = 0; i < MAX_SCPI_XFERS; i++, xfers++) { |
891 | init_completion(&xfers->done); | |
8cb7cf56 | 892 | list_add_tail(&xfers->node, &ch->xfers_list); |
c511fa3f AK |
893 | } |
894 | ||
8cb7cf56 SH |
895 | return 0; |
896 | } | |
897 | ||
ed7ecb88 SH |
898 | static const struct of_device_id shmem_of_match[] __maybe_unused = { |
899 | { .compatible = "amlogic,meson-gxbb-scp-shmem", }, | |
900 | { .compatible = "amlogic,meson-axg-scp-shmem", }, | |
901 | { .compatible = "arm,juno-scp-shmem", }, | |
902 | { .compatible = "arm,scp-shmem", }, | |
903 | { } | |
904 | }; | |
905 | ||
8cb7cf56 SH |
906 | static int scpi_probe(struct platform_device *pdev) |
907 | { | |
908 | int count, idx, ret; | |
909 | struct resource res; | |
8cb7cf56 SH |
910 | struct device *dev = &pdev->dev; |
911 | struct device_node *np = dev->of_node; | |
689640ef | 912 | struct scpi_drvinfo *scpi_drvinfo; |
8cb7cf56 | 913 | |
689640ef SH |
914 | scpi_drvinfo = devm_kzalloc(dev, sizeof(*scpi_drvinfo), GFP_KERNEL); |
915 | if (!scpi_drvinfo) | |
8cb7cf56 SH |
916 | return -ENOMEM; |
917 | ||
908af696 | 918 | scpi_drvinfo->is_legacy = !!device_get_match_data(dev); |
8358c6b5 | 919 | |
8cb7cf56 SH |
920 | count = of_count_phandle_with_args(np, "mboxes", "#mbox-cells"); |
921 | if (count < 0) { | |
9deee319 | 922 | dev_err(dev, "no mboxes property in '%pOF'\n", np); |
8cb7cf56 SH |
923 | return -ENODEV; |
924 | } | |
925 | ||
689640ef SH |
926 | scpi_drvinfo->channels = |
927 | devm_kcalloc(dev, count, sizeof(struct scpi_chan), GFP_KERNEL); | |
928 | if (!scpi_drvinfo->channels) | |
8cb7cf56 SH |
929 | return -ENOMEM; |
930 | ||
689640ef | 931 | ret = devm_add_action(dev, scpi_free_channels, scpi_drvinfo); |
c14f1db4 HK |
932 | if (ret) |
933 | return ret; | |
934 | ||
689640ef | 935 | for (; scpi_drvinfo->num_chans < count; scpi_drvinfo->num_chans++) { |
8cb7cf56 | 936 | resource_size_t size; |
689640ef SH |
937 | int idx = scpi_drvinfo->num_chans; |
938 | struct scpi_chan *pchan = scpi_drvinfo->channels + idx; | |
8cb7cf56 SH |
939 | struct mbox_client *cl = &pchan->cl; |
940 | struct device_node *shmem = of_parse_phandle(np, "shmem", idx); | |
941 | ||
ed7ecb88 SH |
942 | if (!of_match_node(shmem_of_match, shmem)) |
943 | return -ENXIO; | |
944 | ||
b079bd55 PC |
945 | ret = of_address_to_resource(shmem, 0, &res); |
946 | of_node_put(shmem); | |
947 | if (ret) { | |
8cb7cf56 | 948 | dev_err(dev, "failed to get SCPI payload mem resource\n"); |
c14f1db4 | 949 | return ret; |
8cb7cf56 SH |
950 | } |
951 | ||
952 | size = resource_size(&res); | |
953 | pchan->rx_payload = devm_ioremap(dev, res.start, size); | |
954 | if (!pchan->rx_payload) { | |
955 | dev_err(dev, "failed to ioremap SCPI payload\n"); | |
c14f1db4 | 956 | return -EADDRNOTAVAIL; |
8cb7cf56 SH |
957 | } |
958 | pchan->tx_payload = pchan->rx_payload + (size >> 1); | |
959 | ||
960 | cl->dev = dev; | |
961 | cl->rx_callback = scpi_handle_remote_msg; | |
962 | cl->tx_prepare = scpi_tx_prepare; | |
963 | cl->tx_block = true; | |
3bdd8843 | 964 | cl->tx_tout = 20; |
8cb7cf56 SH |
965 | cl->knows_txdone = false; /* controller can't ack */ |
966 | ||
967 | INIT_LIST_HEAD(&pchan->rx_pending); | |
968 | INIT_LIST_HEAD(&pchan->xfers_list); | |
969 | spin_lock_init(&pchan->rx_lock); | |
970 | mutex_init(&pchan->xfers_lock); | |
971 | ||
972 | ret = scpi_alloc_xfer_list(dev, pchan); | |
973 | if (!ret) { | |
974 | pchan->chan = mbox_request_channel(cl, idx); | |
975 | if (!IS_ERR(pchan->chan)) | |
976 | continue; | |
977 | ret = PTR_ERR(pchan->chan); | |
978 | if (ret != -EPROBE_DEFER) | |
979 | dev_err(dev, "failed to get channel%d err %d\n", | |
980 | idx, ret); | |
981 | } | |
8cb7cf56 SH |
982 | return ret; |
983 | } | |
984 | ||
689640ef | 985 | scpi_drvinfo->commands = scpi_std_commands; |
81faa556 | 986 | |
689640ef | 987 | platform_set_drvdata(pdev, scpi_drvinfo); |
761d0efe | 988 | |
689640ef | 989 | if (scpi_drvinfo->is_legacy) { |
4dfe32d5 NA |
990 | /* Replace with legacy variants */ |
991 | scpi_ops.clk_set_val = legacy_scpi_clk_set_val; | |
689640ef | 992 | scpi_drvinfo->commands = scpi_legacy_commands; |
4dfe32d5 NA |
993 | |
994 | /* Fill priority bitmap */ | |
995 | for (idx = 0; idx < ARRAY_SIZE(legacy_hpriority_cmds); idx++) | |
996 | set_bit(legacy_hpriority_cmds[idx], | |
689640ef | 997 | scpi_drvinfo->cmd_priority); |
4dfe32d5 NA |
998 | } |
999 | ||
689640ef SH |
1000 | scpi_info = scpi_drvinfo; |
1001 | ||
1002 | ret = scpi_init_versions(scpi_drvinfo); | |
8cb7cf56 SH |
1003 | if (ret) { |
1004 | dev_err(dev, "incorrect or no SCP firmware found\n"); | |
689640ef | 1005 | scpi_info = NULL; |
8cb7cf56 SH |
1006 | return ret; |
1007 | } | |
1008 | ||
689640ef SH |
1009 | if (scpi_drvinfo->is_legacy && !scpi_drvinfo->protocol_version && |
1010 | !scpi_drvinfo->firmware_version) | |
62c60efb HK |
1011 | dev_info(dev, "SCP Protocol legacy pre-1.0 firmware\n"); |
1012 | else | |
1013 | dev_info(dev, "SCP Protocol %lu.%lu Firmware %lu.%lu.%lu version\n", | |
1014 | FIELD_GET(PROTO_REV_MAJOR_MASK, | |
689640ef | 1015 | scpi_drvinfo->protocol_version), |
62c60efb | 1016 | FIELD_GET(PROTO_REV_MINOR_MASK, |
689640ef | 1017 | scpi_drvinfo->protocol_version), |
62c60efb | 1018 | FIELD_GET(FW_REV_MAJOR_MASK, |
689640ef | 1019 | scpi_drvinfo->firmware_version), |
62c60efb | 1020 | FIELD_GET(FW_REV_MINOR_MASK, |
689640ef | 1021 | scpi_drvinfo->firmware_version), |
62c60efb | 1022 | FIELD_GET(FW_REV_PATCH_MASK, |
689640ef SH |
1023 | scpi_drvinfo->firmware_version)); |
1024 | ||
1025 | scpi_drvinfo->scpi_ops = &scpi_ops; | |
8cb7cf56 | 1026 | |
689640ef SH |
1027 | ret = devm_of_platform_populate(dev); |
1028 | if (ret) | |
1029 | scpi_info = NULL; | |
1030 | ||
1031 | return ret; | |
8cb7cf56 SH |
1032 | } |
1033 | ||
1034 | static const struct of_device_id scpi_of_match[] = { | |
1035 | {.compatible = "arm,scpi"}, | |
908af696 | 1036 | {.compatible = "arm,scpi-pre-1.0", .data = (void *)1UL }, |
8cb7cf56 SH |
1037 | {}, |
1038 | }; | |
1039 | ||
1040 | MODULE_DEVICE_TABLE(of, scpi_of_match); | |
1041 | ||
1042 | static struct platform_driver scpi_driver = { | |
1043 | .driver = { | |
1044 | .name = "scpi_protocol", | |
1045 | .of_match_table = scpi_of_match, | |
43b9ac93 | 1046 | .dev_groups = versions_groups, |
8cb7cf56 SH |
1047 | }, |
1048 | .probe = scpi_probe, | |
25956650 | 1049 | .remove_new = scpi_remove, |
8cb7cf56 SH |
1050 | }; |
1051 | module_platform_driver(scpi_driver); | |
1052 | ||
1053 | MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>"); | |
1054 | MODULE_DESCRIPTION("ARM SCPI mailbox protocol driver"); | |
1055 | MODULE_LICENSE("GPL v2"); |