nbd: Fix debugfs_create_dir error checking
[linux-block.git] / drivers / firmware / arm_scpi.c
CommitLineData
9952f691 1// SPDX-License-Identifier: GPL-2.0-only
8cb7cf56
SH
2/*
3 * System Control and Power Interface (SCPI) Message Protocol driver
4 *
5 * SCPI Message Protocol is used between the System Control Processor(SCP)
6 * and the Application Processors(AP). The Message Handling Unit(MHU)
7 * provides a mechanism for inter-processor communication between SCP's
8 * Cortex M3 and AP.
9 *
10 * SCP offers control and management of the core/cluster power states,
11 * various power domain DVFS including the core/cluster, certain system
12 * clocks configuration, thermal sensors and many others.
13 *
14 * Copyright (C) 2015 ARM Ltd.
8cb7cf56
SH
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include <linux/bitmap.h>
7cd49a26 20#include <linux/bitfield.h>
8cb7cf56
SH
21#include <linux/device.h>
22#include <linux/err.h>
23#include <linux/export.h>
24#include <linux/io.h>
25#include <linux/kernel.h>
26#include <linux/list.h>
27#include <linux/mailbox_client.h>
28#include <linux/module.h>
29#include <linux/of_address.h>
30#include <linux/of_platform.h>
31#include <linux/printk.h>
45ca7df7 32#include <linux/pm_opp.h>
8cb7cf56
SH
33#include <linux/scpi_protocol.h>
34#include <linux/slab.h>
35#include <linux/sort.h>
36#include <linux/spinlock.h>
37
96fe77b6
HK
38#define CMD_ID_MASK GENMASK(6, 0)
39#define CMD_TOKEN_ID_MASK GENMASK(15, 8)
40#define CMD_DATA_SIZE_MASK GENMASK(24, 16)
41#define CMD_LEGACY_DATA_SIZE_MASK GENMASK(28, 20)
42#define PACK_SCPI_CMD(cmd_id, tx_sz) \
43 (FIELD_PREP(CMD_ID_MASK, cmd_id) | \
44 FIELD_PREP(CMD_DATA_SIZE_MASK, tx_sz))
45#define PACK_LEGACY_SCPI_CMD(cmd_id, tx_sz) \
46 (FIELD_PREP(CMD_ID_MASK, cmd_id) | \
47 FIELD_PREP(CMD_LEGACY_DATA_SIZE_MASK, tx_sz))
48
49#define CMD_SIZE(cmd) FIELD_GET(CMD_DATA_SIZE_MASK, cmd)
50#define CMD_UNIQ_MASK (CMD_TOKEN_ID_MASK | CMD_ID_MASK)
8cb7cf56
SH
51#define CMD_XTRACT_UNIQ(cmd) ((cmd) & CMD_UNIQ_MASK)
52
53#define SCPI_SLOT 0
54
55#define MAX_DVFS_DOMAINS 8
bb789cd1 56#define MAX_DVFS_OPPS 16
81faa556 57
7cd49a26
HK
58#define PROTO_REV_MAJOR_MASK GENMASK(31, 16)
59#define PROTO_REV_MINOR_MASK GENMASK(15, 0)
81faa556 60
7cd49a26
HK
61#define FW_REV_MAJOR_MASK GENMASK(31, 24)
62#define FW_REV_MINOR_MASK GENMASK(23, 16)
63#define FW_REV_PATCH_MASK GENMASK(15, 0)
8cb7cf56 64
3bdd8843 65#define MAX_RX_TIMEOUT (msecs_to_jiffies(30))
8cb7cf56
SH
66
67enum scpi_error_codes {
68 SCPI_SUCCESS = 0, /* Success */
69 SCPI_ERR_PARAM = 1, /* Invalid parameter(s) */
70 SCPI_ERR_ALIGN = 2, /* Invalid alignment */
71 SCPI_ERR_SIZE = 3, /* Invalid size */
72 SCPI_ERR_HANDLER = 4, /* Invalid handler/callback */
73 SCPI_ERR_ACCESS = 5, /* Invalid access/permission denied */
74 SCPI_ERR_RANGE = 6, /* Value out of range */
75 SCPI_ERR_TIMEOUT = 7, /* Timeout has occurred */
76 SCPI_ERR_NOMEM = 8, /* Invalid memory area or pointer */
77 SCPI_ERR_PWRSTATE = 9, /* Invalid power state */
78 SCPI_ERR_SUPPORT = 10, /* Not supported or disabled */
79 SCPI_ERR_DEVICE = 11, /* Device error */
80 SCPI_ERR_BUSY = 12, /* Device busy */
81 SCPI_ERR_MAX
82};
83
761d0efe 84/* SCPI Standard commands */
8cb7cf56
SH
85enum scpi_std_cmd {
86 SCPI_CMD_INVALID = 0x00,
87 SCPI_CMD_SCPI_READY = 0x01,
88 SCPI_CMD_SCPI_CAPABILITIES = 0x02,
89 SCPI_CMD_SET_CSS_PWR_STATE = 0x03,
90 SCPI_CMD_GET_CSS_PWR_STATE = 0x04,
91 SCPI_CMD_SET_SYS_PWR_STATE = 0x05,
92 SCPI_CMD_SET_CPU_TIMER = 0x06,
93 SCPI_CMD_CANCEL_CPU_TIMER = 0x07,
94 SCPI_CMD_DVFS_CAPABILITIES = 0x08,
95 SCPI_CMD_GET_DVFS_INFO = 0x09,
96 SCPI_CMD_SET_DVFS = 0x0a,
97 SCPI_CMD_GET_DVFS = 0x0b,
98 SCPI_CMD_GET_DVFS_STAT = 0x0c,
99 SCPI_CMD_CLOCK_CAPABILITIES = 0x0d,
100 SCPI_CMD_GET_CLOCK_INFO = 0x0e,
101 SCPI_CMD_SET_CLOCK_VALUE = 0x0f,
102 SCPI_CMD_GET_CLOCK_VALUE = 0x10,
103 SCPI_CMD_PSU_CAPABILITIES = 0x11,
104 SCPI_CMD_GET_PSU_INFO = 0x12,
105 SCPI_CMD_SET_PSU = 0x13,
106 SCPI_CMD_GET_PSU = 0x14,
107 SCPI_CMD_SENSOR_CAPABILITIES = 0x15,
108 SCPI_CMD_SENSOR_INFO = 0x16,
109 SCPI_CMD_SENSOR_VALUE = 0x17,
110 SCPI_CMD_SENSOR_CFG_PERIODIC = 0x18,
111 SCPI_CMD_SENSOR_CFG_BOUNDS = 0x19,
112 SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1a,
113 SCPI_CMD_SET_DEVICE_PWR_STATE = 0x1b,
114 SCPI_CMD_GET_DEVICE_PWR_STATE = 0x1c,
115 SCPI_CMD_COUNT
116};
117
4dfe32d5
NA
118/* SCPI Legacy Commands */
119enum legacy_scpi_std_cmd {
120 LEGACY_SCPI_CMD_INVALID = 0x00,
121 LEGACY_SCPI_CMD_SCPI_READY = 0x01,
122 LEGACY_SCPI_CMD_SCPI_CAPABILITIES = 0x02,
123 LEGACY_SCPI_CMD_EVENT = 0x03,
124 LEGACY_SCPI_CMD_SET_CSS_PWR_STATE = 0x04,
125 LEGACY_SCPI_CMD_GET_CSS_PWR_STATE = 0x05,
126 LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT = 0x06,
127 LEGACY_SCPI_CMD_GET_PWR_STATE_STAT = 0x07,
128 LEGACY_SCPI_CMD_SYS_PWR_STATE = 0x08,
129 LEGACY_SCPI_CMD_L2_READY = 0x09,
130 LEGACY_SCPI_CMD_SET_AP_TIMER = 0x0a,
131 LEGACY_SCPI_CMD_CANCEL_AP_TIME = 0x0b,
132 LEGACY_SCPI_CMD_DVFS_CAPABILITIES = 0x0c,
133 LEGACY_SCPI_CMD_GET_DVFS_INFO = 0x0d,
134 LEGACY_SCPI_CMD_SET_DVFS = 0x0e,
135 LEGACY_SCPI_CMD_GET_DVFS = 0x0f,
136 LEGACY_SCPI_CMD_GET_DVFS_STAT = 0x10,
137 LEGACY_SCPI_CMD_SET_RTC = 0x11,
138 LEGACY_SCPI_CMD_GET_RTC = 0x12,
139 LEGACY_SCPI_CMD_CLOCK_CAPABILITIES = 0x13,
140 LEGACY_SCPI_CMD_SET_CLOCK_INDEX = 0x14,
141 LEGACY_SCPI_CMD_SET_CLOCK_VALUE = 0x15,
142 LEGACY_SCPI_CMD_GET_CLOCK_VALUE = 0x16,
143 LEGACY_SCPI_CMD_PSU_CAPABILITIES = 0x17,
144 LEGACY_SCPI_CMD_SET_PSU = 0x18,
145 LEGACY_SCPI_CMD_GET_PSU = 0x19,
146 LEGACY_SCPI_CMD_SENSOR_CAPABILITIES = 0x1a,
147 LEGACY_SCPI_CMD_SENSOR_INFO = 0x1b,
148 LEGACY_SCPI_CMD_SENSOR_VALUE = 0x1c,
149 LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC = 0x1d,
150 LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS = 0x1e,
151 LEGACY_SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1f,
152 LEGACY_SCPI_CMD_COUNT
153};
154
155/* List all commands that are required to go through the high priority link */
156static int legacy_hpriority_cmds[] = {
157 LEGACY_SCPI_CMD_GET_CSS_PWR_STATE,
158 LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT,
159 LEGACY_SCPI_CMD_GET_PWR_STATE_STAT,
160 LEGACY_SCPI_CMD_SET_DVFS,
161 LEGACY_SCPI_CMD_GET_DVFS,
162 LEGACY_SCPI_CMD_SET_RTC,
163 LEGACY_SCPI_CMD_GET_RTC,
164 LEGACY_SCPI_CMD_SET_CLOCK_INDEX,
165 LEGACY_SCPI_CMD_SET_CLOCK_VALUE,
166 LEGACY_SCPI_CMD_GET_CLOCK_VALUE,
167 LEGACY_SCPI_CMD_SET_PSU,
168 LEGACY_SCPI_CMD_GET_PSU,
169 LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC,
170 LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS,
171};
172
173/* List all commands used by this driver, used as indexes */
761d0efe
SH
174enum scpi_drv_cmds {
175 CMD_SCPI_CAPABILITIES = 0,
176 CMD_GET_CLOCK_INFO,
177 CMD_GET_CLOCK_VALUE,
178 CMD_SET_CLOCK_VALUE,
179 CMD_GET_DVFS,
180 CMD_SET_DVFS,
181 CMD_GET_DVFS_INFO,
182 CMD_SENSOR_CAPABILITIES,
183 CMD_SENSOR_INFO,
184 CMD_SENSOR_VALUE,
185 CMD_SET_DEVICE_PWR_STATE,
186 CMD_GET_DEVICE_PWR_STATE,
187 CMD_MAX_COUNT,
188};
189
190static int scpi_std_commands[CMD_MAX_COUNT] = {
191 SCPI_CMD_SCPI_CAPABILITIES,
192 SCPI_CMD_GET_CLOCK_INFO,
193 SCPI_CMD_GET_CLOCK_VALUE,
194 SCPI_CMD_SET_CLOCK_VALUE,
195 SCPI_CMD_GET_DVFS,
196 SCPI_CMD_SET_DVFS,
197 SCPI_CMD_GET_DVFS_INFO,
198 SCPI_CMD_SENSOR_CAPABILITIES,
199 SCPI_CMD_SENSOR_INFO,
200 SCPI_CMD_SENSOR_VALUE,
201 SCPI_CMD_SET_DEVICE_PWR_STATE,
202 SCPI_CMD_GET_DEVICE_PWR_STATE,
203};
204
4dfe32d5
NA
205static int scpi_legacy_commands[CMD_MAX_COUNT] = {
206 LEGACY_SCPI_CMD_SCPI_CAPABILITIES,
207 -1, /* GET_CLOCK_INFO */
208 LEGACY_SCPI_CMD_GET_CLOCK_VALUE,
209 LEGACY_SCPI_CMD_SET_CLOCK_VALUE,
210 LEGACY_SCPI_CMD_GET_DVFS,
211 LEGACY_SCPI_CMD_SET_DVFS,
212 LEGACY_SCPI_CMD_GET_DVFS_INFO,
213 LEGACY_SCPI_CMD_SENSOR_CAPABILITIES,
214 LEGACY_SCPI_CMD_SENSOR_INFO,
215 LEGACY_SCPI_CMD_SENSOR_VALUE,
216 -1, /* SET_DEVICE_PWR_STATE */
217 -1, /* GET_DEVICE_PWR_STATE */
218};
219
8cb7cf56
SH
220struct scpi_xfer {
221 u32 slot; /* has to be first element */
222 u32 cmd;
223 u32 status;
224 const void *tx_buf;
225 void *rx_buf;
226 unsigned int tx_len;
227 unsigned int rx_len;
228 struct list_head node;
229 struct completion done;
230};
231
232struct scpi_chan {
233 struct mbox_client cl;
234 struct mbox_chan *chan;
235 void __iomem *tx_payload;
236 void __iomem *rx_payload;
237 struct list_head rx_pending;
238 struct list_head xfers_list;
239 struct scpi_xfer *xfers;
240 spinlock_t rx_lock; /* locking for the rx pending list */
241 struct mutex xfers_lock;
242 u8 token;
243};
244
245struct scpi_drvinfo {
246 u32 protocol_version;
247 u32 firmware_version;
4dfe32d5 248 bool is_legacy;
8cb7cf56 249 int num_chans;
761d0efe 250 int *commands;
4dfe32d5 251 DECLARE_BITMAP(cmd_priority, LEGACY_SCPI_CMD_COUNT);
8cb7cf56
SH
252 atomic_t next_chan;
253 struct scpi_ops *scpi_ops;
254 struct scpi_chan *channels;
255 struct scpi_dvfs_info *dvfs[MAX_DVFS_DOMAINS];
256};
257
258/*
259 * The SCP firmware only executes in little-endian mode, so any buffers
260 * shared through SCPI should have their contents converted to little-endian
261 */
262struct scpi_shared_mem {
263 __le32 command;
264 __le32 status;
539db762 265 u8 payload[];
8cb7cf56
SH
266} __packed;
267
4dfe32d5
NA
268struct legacy_scpi_shared_mem {
269 __le32 status;
539db762 270 u8 payload[];
4dfe32d5
NA
271} __packed;
272
8cb7cf56
SH
273struct scp_capabilities {
274 __le32 protocol_version;
275 __le32 event_version;
276 __le32 platform_version;
277 __le32 commands[4];
278} __packed;
279
280struct clk_get_info {
281 __le16 id;
282 __le16 flags;
283 __le32 min_rate;
284 __le32 max_rate;
285 u8 name[20];
286} __packed;
287
8cb7cf56
SH
288struct clk_set_value {
289 __le16 id;
290 __le16 reserved;
291 __le32 rate;
292} __packed;
293
4dfe32d5
NA
294struct legacy_clk_set_value {
295 __le32 rate;
296 __le16 id;
297 __le16 reserved;
298} __packed;
299
8cb7cf56 300struct dvfs_info {
a963d7c5
HK
301 u8 domain;
302 u8 opp_count;
303 __le16 latency;
8cb7cf56
SH
304 struct {
305 __le32 freq;
306 __le32 m_volt;
307 } opps[MAX_DVFS_OPPS];
308} __packed;
309
8cb7cf56
SH
310struct dvfs_set {
311 u8 domain;
312 u8 index;
313} __packed;
314
38a1bdc9
PA
315struct _scpi_sensor_info {
316 __le16 sensor_id;
317 u8 class;
318 u8 trigger_type;
319 char name[20];
320};
321
37a441dc 322struct dev_pstate_set {
0d301768 323 __le16 dev_id;
37a441dc
SH
324 u8 pstate;
325} __packed;
326
8cb7cf56
SH
327static struct scpi_drvinfo *scpi_info;
328
329static int scpi_linux_errmap[SCPI_ERR_MAX] = {
330 /* better than switch case as long as return value is continuous */
331 0, /* SCPI_SUCCESS */
332 -EINVAL, /* SCPI_ERR_PARAM */
333 -ENOEXEC, /* SCPI_ERR_ALIGN */
334 -EMSGSIZE, /* SCPI_ERR_SIZE */
335 -EINVAL, /* SCPI_ERR_HANDLER */
336 -EACCES, /* SCPI_ERR_ACCESS */
337 -ERANGE, /* SCPI_ERR_RANGE */
338 -ETIMEDOUT, /* SCPI_ERR_TIMEOUT */
339 -ENOMEM, /* SCPI_ERR_NOMEM */
340 -EINVAL, /* SCPI_ERR_PWRSTATE */
341 -EOPNOTSUPP, /* SCPI_ERR_SUPPORT */
342 -EIO, /* SCPI_ERR_DEVICE */
343 -EBUSY, /* SCPI_ERR_BUSY */
344};
345
346static inline int scpi_to_linux_errno(int errno)
347{
348 if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX)
349 return scpi_linux_errmap[errno];
350 return -EIO;
351}
352
353static void scpi_process_cmd(struct scpi_chan *ch, u32 cmd)
354{
355 unsigned long flags;
356 struct scpi_xfer *t, *match = NULL;
357
358 spin_lock_irqsave(&ch->rx_lock, flags);
359 if (list_empty(&ch->rx_pending)) {
360 spin_unlock_irqrestore(&ch->rx_lock, flags);
361 return;
362 }
363
4dfe32d5
NA
364 /* Command type is not replied by the SCP Firmware in legacy Mode
365 * We should consider that command is the head of pending RX commands
366 * if the list is not empty. In TX only mode, the list would be empty.
367 */
368 if (scpi_info->is_legacy) {
369 match = list_first_entry(&ch->rx_pending, struct scpi_xfer,
370 node);
371 list_del(&match->node);
372 } else {
373 list_for_each_entry(t, &ch->rx_pending, node)
374 if (CMD_XTRACT_UNIQ(t->cmd) == CMD_XTRACT_UNIQ(cmd)) {
375 list_del(&t->node);
376 match = t;
377 break;
378 }
379 }
8cb7cf56
SH
380 /* check if wait_for_completion is in progress or timed-out */
381 if (match && !completion_done(&match->done)) {
4dfe32d5
NA
382 unsigned int len;
383
384 if (scpi_info->is_legacy) {
5204abd3
HK
385 struct legacy_scpi_shared_mem __iomem *mem =
386 ch->rx_payload;
4dfe32d5
NA
387
388 /* RX Length is not replied by the legacy Firmware */
389 len = match->rx_len;
390
5204abd3 391 match->status = ioread32(&mem->status);
4dfe32d5
NA
392 memcpy_fromio(match->rx_buf, mem->payload, len);
393 } else {
5204abd3 394 struct scpi_shared_mem __iomem *mem = ch->rx_payload;
4dfe32d5 395
96fe77b6 396 len = min_t(unsigned int, match->rx_len, CMD_SIZE(cmd));
4dfe32d5 397
5204abd3 398 match->status = ioread32(&mem->status);
4dfe32d5
NA
399 memcpy_fromio(match->rx_buf, mem->payload, len);
400 }
8cb7cf56 401
8cb7cf56
SH
402 if (match->rx_len > len)
403 memset(match->rx_buf + len, 0, match->rx_len - len);
404 complete(&match->done);
405 }
406 spin_unlock_irqrestore(&ch->rx_lock, flags);
407}
408
409static void scpi_handle_remote_msg(struct mbox_client *c, void *msg)
410{
411 struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
5204abd3 412 struct scpi_shared_mem __iomem *mem = ch->rx_payload;
4dfe32d5
NA
413 u32 cmd = 0;
414
415 if (!scpi_info->is_legacy)
5204abd3 416 cmd = ioread32(&mem->command);
8cb7cf56
SH
417
418 scpi_process_cmd(ch, cmd);
419}
420
421static void scpi_tx_prepare(struct mbox_client *c, void *msg)
422{
423 unsigned long flags;
424 struct scpi_xfer *t = msg;
425 struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
5204abd3 426 struct scpi_shared_mem __iomem *mem = ch->tx_payload;
8cb7cf56 427
4dfe32d5
NA
428 if (t->tx_buf) {
429 if (scpi_info->is_legacy)
430 memcpy_toio(ch->tx_payload, t->tx_buf, t->tx_len);
431 else
432 memcpy_toio(mem->payload, t->tx_buf, t->tx_len);
433 }
434
8cb7cf56
SH
435 if (t->rx_buf) {
436 if (!(++ch->token))
437 ++ch->token;
96fe77b6 438 t->cmd |= FIELD_PREP(CMD_TOKEN_ID_MASK, ch->token);
8cb7cf56
SH
439 spin_lock_irqsave(&ch->rx_lock, flags);
440 list_add_tail(&t->node, &ch->rx_pending);
441 spin_unlock_irqrestore(&ch->rx_lock, flags);
442 }
4dfe32d5
NA
443
444 if (!scpi_info->is_legacy)
5204abd3 445 iowrite32(t->cmd, &mem->command);
8cb7cf56
SH
446}
447
448static struct scpi_xfer *get_scpi_xfer(struct scpi_chan *ch)
449{
450 struct scpi_xfer *t;
451
452 mutex_lock(&ch->xfers_lock);
453 if (list_empty(&ch->xfers_list)) {
454 mutex_unlock(&ch->xfers_lock);
455 return NULL;
456 }
457 t = list_first_entry(&ch->xfers_list, struct scpi_xfer, node);
458 list_del(&t->node);
459 mutex_unlock(&ch->xfers_lock);
460 return t;
461}
462
463static void put_scpi_xfer(struct scpi_xfer *t, struct scpi_chan *ch)
464{
465 mutex_lock(&ch->xfers_lock);
466 list_add_tail(&t->node, &ch->xfers_list);
467 mutex_unlock(&ch->xfers_lock);
468}
469
761d0efe 470static int scpi_send_message(u8 idx, void *tx_buf, unsigned int tx_len,
8cb7cf56
SH
471 void *rx_buf, unsigned int rx_len)
472{
473 int ret;
474 u8 chan;
761d0efe 475 u8 cmd;
8cb7cf56
SH
476 struct scpi_xfer *msg;
477 struct scpi_chan *scpi_chan;
478
761d0efe
SH
479 if (scpi_info->commands[idx] < 0)
480 return -EOPNOTSUPP;
481
482 cmd = scpi_info->commands[idx];
483
4dfe32d5
NA
484 if (scpi_info->is_legacy)
485 chan = test_bit(cmd, scpi_info->cmd_priority) ? 1 : 0;
486 else
487 chan = atomic_inc_return(&scpi_info->next_chan) %
488 scpi_info->num_chans;
8cb7cf56
SH
489 scpi_chan = scpi_info->channels + chan;
490
491 msg = get_scpi_xfer(scpi_chan);
492 if (!msg)
493 return -ENOMEM;
494
4dfe32d5
NA
495 if (scpi_info->is_legacy) {
496 msg->cmd = PACK_LEGACY_SCPI_CMD(cmd, tx_len);
497 msg->slot = msg->cmd;
498 } else {
499 msg->slot = BIT(SCPI_SLOT);
500 msg->cmd = PACK_SCPI_CMD(cmd, tx_len);
501 }
8cb7cf56
SH
502 msg->tx_buf = tx_buf;
503 msg->tx_len = tx_len;
504 msg->rx_buf = rx_buf;
505 msg->rx_len = rx_len;
c511fa3f 506 reinit_completion(&msg->done);
8cb7cf56
SH
507
508 ret = mbox_send_message(scpi_chan->chan, msg);
509 if (ret < 0 || !rx_buf)
510 goto out;
511
512 if (!wait_for_completion_timeout(&msg->done, MAX_RX_TIMEOUT))
513 ret = -ETIMEDOUT;
514 else
515 /* first status word */
dd9a1d69 516 ret = msg->status;
8cb7cf56
SH
517out:
518 if (ret < 0 && rx_buf) /* remove entry from the list if timed-out */
519 scpi_process_cmd(scpi_chan, msg->cmd);
520
521 put_scpi_xfer(msg, scpi_chan);
522 /* SCPI error codes > 0, translate them to Linux scale*/
523 return ret > 0 ? scpi_to_linux_errno(ret) : ret;
524}
525
526static u32 scpi_get_version(void)
527{
528 return scpi_info->protocol_version;
529}
530
531static int
532scpi_clk_get_range(u16 clk_id, unsigned long *min, unsigned long *max)
533{
534 int ret;
535 struct clk_get_info clk;
536 __le16 le_clk_id = cpu_to_le16(clk_id);
537
761d0efe 538 ret = scpi_send_message(CMD_GET_CLOCK_INFO, &le_clk_id,
8cb7cf56
SH
539 sizeof(le_clk_id), &clk, sizeof(clk));
540 if (!ret) {
541 *min = le32_to_cpu(clk.min_rate);
542 *max = le32_to_cpu(clk.max_rate);
543 }
544 return ret;
545}
546
547static unsigned long scpi_clk_get_val(u16 clk_id)
548{
549 int ret;
c10bd41a 550 __le32 rate;
8cb7cf56
SH
551 __le16 le_clk_id = cpu_to_le16(clk_id);
552
761d0efe 553 ret = scpi_send_message(CMD_GET_CLOCK_VALUE, &le_clk_id,
c10bd41a 554 sizeof(le_clk_id), &rate, sizeof(rate));
d9cd78ed
DC
555 if (ret)
556 return 0;
761d0efe 557
d9cd78ed 558 return le32_to_cpu(rate);
8cb7cf56
SH
559}
560
561static int scpi_clk_set_val(u16 clk_id, unsigned long rate)
562{
563 int stat;
564 struct clk_set_value clk = {
565 .id = cpu_to_le16(clk_id),
566 .rate = cpu_to_le32(rate)
567 };
568
761d0efe 569 return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk),
8cb7cf56
SH
570 &stat, sizeof(stat));
571}
572
4dfe32d5
NA
573static int legacy_scpi_clk_set_val(u16 clk_id, unsigned long rate)
574{
575 int stat;
576 struct legacy_clk_set_value clk = {
577 .id = cpu_to_le16(clk_id),
578 .rate = cpu_to_le32(rate)
579 };
580
581 return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk),
582 &stat, sizeof(stat));
583}
584
8cb7cf56
SH
585static int scpi_dvfs_get_idx(u8 domain)
586{
587 int ret;
f9d91de0 588 u8 dvfs_idx;
8cb7cf56 589
761d0efe 590 ret = scpi_send_message(CMD_GET_DVFS, &domain, sizeof(domain),
f9d91de0 591 &dvfs_idx, sizeof(dvfs_idx));
761d0efe 592
f9d91de0 593 return ret ? ret : dvfs_idx;
8cb7cf56
SH
594}
595
596static int scpi_dvfs_set_idx(u8 domain, u8 index)
597{
598 int stat;
599 struct dvfs_set dvfs = {domain, index};
600
761d0efe 601 return scpi_send_message(CMD_SET_DVFS, &dvfs, sizeof(dvfs),
8cb7cf56
SH
602 &stat, sizeof(stat));
603}
604
605static int opp_cmp_func(const void *opp1, const void *opp2)
606{
607 const struct scpi_opp *t1 = opp1, *t2 = opp2;
608
609 return t1->freq - t2->freq;
610}
611
612static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain)
613{
614 struct scpi_dvfs_info *info;
615 struct scpi_opp *opp;
616 struct dvfs_info buf;
617 int ret, i;
618
81faa556
OJ
619 if (domain >= MAX_DVFS_DOMAINS)
620 return ERR_PTR(-EINVAL);
621
622 if (scpi_info->dvfs[domain]) /* data already populated */
623 return scpi_info->dvfs[domain];
624
761d0efe 625 ret = scpi_send_message(CMD_GET_DVFS_INFO, &domain, sizeof(domain),
8cb7cf56 626 &buf, sizeof(buf));
8cb7cf56 627 if (ret)
81faa556 628 return ERR_PTR(ret);
8cb7cf56 629
81faa556 630 info = kmalloc(sizeof(*info), GFP_KERNEL);
8cb7cf56 631 if (!info)
81faa556 632 return ERR_PTR(-ENOMEM);
8cb7cf56 633
a963d7c5
HK
634 info->count = buf.opp_count;
635 info->latency = le16_to_cpu(buf.latency) * 1000; /* uS to nS */
8cb7cf56 636
81faa556
OJ
637 info->opps = kcalloc(info->count, sizeof(*opp), GFP_KERNEL);
638 if (!info->opps) {
639 kfree(info);
640 return ERR_PTR(-ENOMEM);
641 }
8cb7cf56
SH
642
643 for (i = 0, opp = info->opps; i < info->count; i++, opp++) {
644 opp->freq = le32_to_cpu(buf.opps[i].freq);
645 opp->m_volt = le32_to_cpu(buf.opps[i].m_volt);
646 }
647
648 sort(info->opps, info->count, sizeof(*opp), opp_cmp_func, NULL);
649
650 scpi_info->dvfs[domain] = info;
81faa556 651 return info;
8cb7cf56
SH
652}
653
45ca7df7
SH
654static int scpi_dev_domain_id(struct device *dev)
655{
656 struct of_phandle_args clkspec;
657
658 if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells",
659 0, &clkspec))
660 return -EINVAL;
661
662 return clkspec.args[0];
663}
664
665static struct scpi_dvfs_info *scpi_dvfs_info(struct device *dev)
666{
667 int domain = scpi_dev_domain_id(dev);
668
669 if (domain < 0)
670 return ERR_PTR(domain);
671
672 return scpi_dvfs_get_info(domain);
673}
674
675static int scpi_dvfs_get_transition_latency(struct device *dev)
676{
677 struct scpi_dvfs_info *info = scpi_dvfs_info(dev);
678
679 if (IS_ERR(info))
680 return PTR_ERR(info);
681
45ca7df7
SH
682 return info->latency;
683}
684
685static int scpi_dvfs_add_opps_to_device(struct device *dev)
686{
687 int idx, ret;
688 struct scpi_opp *opp;
689 struct scpi_dvfs_info *info = scpi_dvfs_info(dev);
690
691 if (IS_ERR(info))
692 return PTR_ERR(info);
693
694 if (!info->opps)
695 return -EIO;
696
697 for (opp = info->opps, idx = 0; idx < info->count; idx++, opp++) {
698 ret = dev_pm_opp_add(dev, opp->freq, opp->m_volt * 1000);
699 if (ret) {
700 dev_warn(dev, "failed to add opp %uHz %umV\n",
701 opp->freq, opp->m_volt);
702 while (idx-- > 0)
703 dev_pm_opp_remove(dev, (--opp)->freq);
704 return ret;
705 }
706 }
707 return 0;
708}
709
38a1bdc9
PA
710static int scpi_sensor_get_capability(u16 *sensors)
711{
17431b78 712 __le16 cap;
38a1bdc9
PA
713 int ret;
714
17431b78
HK
715 ret = scpi_send_message(CMD_SENSOR_CAPABILITIES, NULL, 0, &cap,
716 sizeof(cap));
38a1bdc9 717 if (!ret)
17431b78 718 *sensors = le16_to_cpu(cap);
38a1bdc9
PA
719
720 return ret;
721}
722
723static int scpi_sensor_get_info(u16 sensor_id, struct scpi_sensor_info *info)
724{
725 __le16 id = cpu_to_le16(sensor_id);
726 struct _scpi_sensor_info _info;
727 int ret;
728
761d0efe 729 ret = scpi_send_message(CMD_SENSOR_INFO, &id, sizeof(id),
38a1bdc9
PA
730 &_info, sizeof(_info));
731 if (!ret) {
732 memcpy(info, &_info, sizeof(*info));
733 info->sensor_id = le16_to_cpu(_info.sensor_id);
734 }
735
736 return ret;
737}
738
3678b98f 739static int scpi_sensor_get_value(u16 sensor, u64 *val)
38a1bdc9 740{
dd9a1d69 741 __le16 id = cpu_to_le16(sensor);
c10bd41a 742 __le64 value;
38a1bdc9
PA
743 int ret;
744
761d0efe 745 ret = scpi_send_message(CMD_SENSOR_VALUE, &id, sizeof(id),
c10bd41a 746 &value, sizeof(value));
a766347b
MB
747 if (ret)
748 return ret;
749
750 if (scpi_info->is_legacy)
83a6060c 751 /* only 32-bits supported, upper 32 bits can be junk */
c10bd41a 752 *val = le32_to_cpup((__le32 *)&value);
a766347b 753 else
c10bd41a 754 *val = le64_to_cpu(value);
38a1bdc9 755
a766347b 756 return 0;
38a1bdc9
PA
757}
758
37a441dc
SH
759static int scpi_device_get_power_state(u16 dev_id)
760{
761 int ret;
762 u8 pstate;
763 __le16 id = cpu_to_le16(dev_id);
764
761d0efe 765 ret = scpi_send_message(CMD_GET_DEVICE_PWR_STATE, &id,
37a441dc
SH
766 sizeof(id), &pstate, sizeof(pstate));
767 return ret ? ret : pstate;
768}
769
770static int scpi_device_set_power_state(u16 dev_id, u8 pstate)
771{
772 int stat;
773 struct dev_pstate_set dev_set = {
774 .dev_id = cpu_to_le16(dev_id),
775 .pstate = pstate,
776 };
777
761d0efe 778 return scpi_send_message(CMD_SET_DEVICE_PWR_STATE, &dev_set,
37a441dc
SH
779 sizeof(dev_set), &stat, sizeof(stat));
780}
781
8cb7cf56
SH
782static struct scpi_ops scpi_ops = {
783 .get_version = scpi_get_version,
784 .clk_get_range = scpi_clk_get_range,
785 .clk_get_val = scpi_clk_get_val,
786 .clk_set_val = scpi_clk_set_val,
787 .dvfs_get_idx = scpi_dvfs_get_idx,
788 .dvfs_set_idx = scpi_dvfs_set_idx,
789 .dvfs_get_info = scpi_dvfs_get_info,
45ca7df7
SH
790 .device_domain_id = scpi_dev_domain_id,
791 .get_transition_latency = scpi_dvfs_get_transition_latency,
792 .add_opps_to_device = scpi_dvfs_add_opps_to_device,
38a1bdc9
PA
793 .sensor_get_capability = scpi_sensor_get_capability,
794 .sensor_get_info = scpi_sensor_get_info,
795 .sensor_get_value = scpi_sensor_get_value,
37a441dc
SH
796 .device_get_power_state = scpi_device_get_power_state,
797 .device_set_power_state = scpi_device_set_power_state,
8cb7cf56
SH
798};
799
800struct scpi_ops *get_scpi_ops(void)
801{
802 return scpi_info ? scpi_info->scpi_ops : NULL;
803}
804EXPORT_SYMBOL_GPL(get_scpi_ops);
805
806static int scpi_init_versions(struct scpi_drvinfo *info)
807{
808 int ret;
809 struct scp_capabilities caps;
810
761d0efe 811 ret = scpi_send_message(CMD_SCPI_CAPABILITIES, NULL, 0,
8cb7cf56
SH
812 &caps, sizeof(caps));
813 if (!ret) {
814 info->protocol_version = le32_to_cpu(caps.protocol_version);
815 info->firmware_version = le32_to_cpu(caps.platform_version);
816 }
abd3e805 817 /* Ignore error if not implemented */
689640ef 818 if (info->is_legacy && ret == -EOPNOTSUPP)
abd3e805
NA
819 return 0;
820
8cb7cf56
SH
821 return ret;
822}
823
824static ssize_t protocol_version_show(struct device *dev,
825 struct device_attribute *attr, char *buf)
826{
81faa556
OJ
827 struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
828
7cd49a26
HK
829 return sprintf(buf, "%lu.%lu\n",
830 FIELD_GET(PROTO_REV_MAJOR_MASK, scpi_info->protocol_version),
831 FIELD_GET(PROTO_REV_MINOR_MASK, scpi_info->protocol_version));
8cb7cf56
SH
832}
833static DEVICE_ATTR_RO(protocol_version);
834
835static ssize_t firmware_version_show(struct device *dev,
836 struct device_attribute *attr, char *buf)
837{
81faa556
OJ
838 struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
839
7cd49a26
HK
840 return sprintf(buf, "%lu.%lu.%lu\n",
841 FIELD_GET(FW_REV_MAJOR_MASK, scpi_info->firmware_version),
842 FIELD_GET(FW_REV_MINOR_MASK, scpi_info->firmware_version),
843 FIELD_GET(FW_REV_PATCH_MASK, scpi_info->firmware_version));
8cb7cf56
SH
844}
845static DEVICE_ATTR_RO(firmware_version);
846
847static struct attribute *versions_attrs[] = {
848 &dev_attr_firmware_version.attr,
849 &dev_attr_protocol_version.attr,
850 NULL,
851};
852ATTRIBUTE_GROUPS(versions);
853
c14f1db4 854static void scpi_free_channels(void *data)
8cb7cf56 855{
c14f1db4 856 struct scpi_drvinfo *info = data;
8cb7cf56
SH
857 int i;
858
c14f1db4
HK
859 for (i = 0; i < info->num_chans; i++)
860 mbox_free_channel(info->channels[i].chan);
81faa556
OJ
861}
862
863static int scpi_remove(struct platform_device *pdev)
864{
865 int i;
81faa556
OJ
866 struct scpi_drvinfo *info = platform_get_drvdata(pdev);
867
868 scpi_info = NULL; /* stop exporting SCPI ops through get_scpi_ops */
869
81faa556
OJ
870 for (i = 0; i < MAX_DVFS_DOMAINS && info->dvfs[i]; i++) {
871 kfree(info->dvfs[i]->opps);
872 kfree(info->dvfs[i]);
873 }
81faa556
OJ
874
875 return 0;
8cb7cf56
SH
876}
877
8cb7cf56
SH
878#define MAX_SCPI_XFERS 10
879static int scpi_alloc_xfer_list(struct device *dev, struct scpi_chan *ch)
880{
881 int i;
882 struct scpi_xfer *xfers;
883
a86854d0 884 xfers = devm_kcalloc(dev, MAX_SCPI_XFERS, sizeof(*xfers), GFP_KERNEL);
8cb7cf56
SH
885 if (!xfers)
886 return -ENOMEM;
887
888 ch->xfers = xfers;
c511fa3f
AK
889 for (i = 0; i < MAX_SCPI_XFERS; i++, xfers++) {
890 init_completion(&xfers->done);
8cb7cf56 891 list_add_tail(&xfers->node, &ch->xfers_list);
c511fa3f
AK
892 }
893
8cb7cf56
SH
894 return 0;
895}
896
8358c6b5
SH
897static const struct of_device_id legacy_scpi_of_match[] = {
898 {.compatible = "arm,scpi-pre-1.0"},
899 {},
900};
901
ed7ecb88
SH
902static const struct of_device_id shmem_of_match[] __maybe_unused = {
903 { .compatible = "amlogic,meson-gxbb-scp-shmem", },
904 { .compatible = "amlogic,meson-axg-scp-shmem", },
905 { .compatible = "arm,juno-scp-shmem", },
906 { .compatible = "arm,scp-shmem", },
907 { }
908};
909
8cb7cf56
SH
910static int scpi_probe(struct platform_device *pdev)
911{
912 int count, idx, ret;
913 struct resource res;
8cb7cf56
SH
914 struct device *dev = &pdev->dev;
915 struct device_node *np = dev->of_node;
689640ef 916 struct scpi_drvinfo *scpi_drvinfo;
8cb7cf56 917
689640ef
SH
918 scpi_drvinfo = devm_kzalloc(dev, sizeof(*scpi_drvinfo), GFP_KERNEL);
919 if (!scpi_drvinfo)
8cb7cf56
SH
920 return -ENOMEM;
921
8358c6b5 922 if (of_match_device(legacy_scpi_of_match, &pdev->dev))
689640ef 923 scpi_drvinfo->is_legacy = true;
8358c6b5 924
8cb7cf56
SH
925 count = of_count_phandle_with_args(np, "mboxes", "#mbox-cells");
926 if (count < 0) {
9deee319 927 dev_err(dev, "no mboxes property in '%pOF'\n", np);
8cb7cf56
SH
928 return -ENODEV;
929 }
930
689640ef
SH
931 scpi_drvinfo->channels =
932 devm_kcalloc(dev, count, sizeof(struct scpi_chan), GFP_KERNEL);
933 if (!scpi_drvinfo->channels)
8cb7cf56
SH
934 return -ENOMEM;
935
689640ef 936 ret = devm_add_action(dev, scpi_free_channels, scpi_drvinfo);
c14f1db4
HK
937 if (ret)
938 return ret;
939
689640ef 940 for (; scpi_drvinfo->num_chans < count; scpi_drvinfo->num_chans++) {
8cb7cf56 941 resource_size_t size;
689640ef
SH
942 int idx = scpi_drvinfo->num_chans;
943 struct scpi_chan *pchan = scpi_drvinfo->channels + idx;
8cb7cf56
SH
944 struct mbox_client *cl = &pchan->cl;
945 struct device_node *shmem = of_parse_phandle(np, "shmem", idx);
946
ed7ecb88
SH
947 if (!of_match_node(shmem_of_match, shmem))
948 return -ENXIO;
949
b079bd55
PC
950 ret = of_address_to_resource(shmem, 0, &res);
951 of_node_put(shmem);
952 if (ret) {
8cb7cf56 953 dev_err(dev, "failed to get SCPI payload mem resource\n");
c14f1db4 954 return ret;
8cb7cf56
SH
955 }
956
957 size = resource_size(&res);
958 pchan->rx_payload = devm_ioremap(dev, res.start, size);
959 if (!pchan->rx_payload) {
960 dev_err(dev, "failed to ioremap SCPI payload\n");
c14f1db4 961 return -EADDRNOTAVAIL;
8cb7cf56
SH
962 }
963 pchan->tx_payload = pchan->rx_payload + (size >> 1);
964
965 cl->dev = dev;
966 cl->rx_callback = scpi_handle_remote_msg;
967 cl->tx_prepare = scpi_tx_prepare;
968 cl->tx_block = true;
3bdd8843 969 cl->tx_tout = 20;
8cb7cf56
SH
970 cl->knows_txdone = false; /* controller can't ack */
971
972 INIT_LIST_HEAD(&pchan->rx_pending);
973 INIT_LIST_HEAD(&pchan->xfers_list);
974 spin_lock_init(&pchan->rx_lock);
975 mutex_init(&pchan->xfers_lock);
976
977 ret = scpi_alloc_xfer_list(dev, pchan);
978 if (!ret) {
979 pchan->chan = mbox_request_channel(cl, idx);
980 if (!IS_ERR(pchan->chan))
981 continue;
982 ret = PTR_ERR(pchan->chan);
983 if (ret != -EPROBE_DEFER)
984 dev_err(dev, "failed to get channel%d err %d\n",
985 idx, ret);
986 }
8cb7cf56
SH
987 return ret;
988 }
989
689640ef 990 scpi_drvinfo->commands = scpi_std_commands;
81faa556 991
689640ef 992 platform_set_drvdata(pdev, scpi_drvinfo);
761d0efe 993
689640ef 994 if (scpi_drvinfo->is_legacy) {
4dfe32d5
NA
995 /* Replace with legacy variants */
996 scpi_ops.clk_set_val = legacy_scpi_clk_set_val;
689640ef 997 scpi_drvinfo->commands = scpi_legacy_commands;
4dfe32d5
NA
998
999 /* Fill priority bitmap */
1000 for (idx = 0; idx < ARRAY_SIZE(legacy_hpriority_cmds); idx++)
1001 set_bit(legacy_hpriority_cmds[idx],
689640ef 1002 scpi_drvinfo->cmd_priority);
4dfe32d5
NA
1003 }
1004
689640ef
SH
1005 scpi_info = scpi_drvinfo;
1006
1007 ret = scpi_init_versions(scpi_drvinfo);
8cb7cf56
SH
1008 if (ret) {
1009 dev_err(dev, "incorrect or no SCP firmware found\n");
689640ef 1010 scpi_info = NULL;
8cb7cf56
SH
1011 return ret;
1012 }
1013
689640ef
SH
1014 if (scpi_drvinfo->is_legacy && !scpi_drvinfo->protocol_version &&
1015 !scpi_drvinfo->firmware_version)
62c60efb
HK
1016 dev_info(dev, "SCP Protocol legacy pre-1.0 firmware\n");
1017 else
1018 dev_info(dev, "SCP Protocol %lu.%lu Firmware %lu.%lu.%lu version\n",
1019 FIELD_GET(PROTO_REV_MAJOR_MASK,
689640ef 1020 scpi_drvinfo->protocol_version),
62c60efb 1021 FIELD_GET(PROTO_REV_MINOR_MASK,
689640ef 1022 scpi_drvinfo->protocol_version),
62c60efb 1023 FIELD_GET(FW_REV_MAJOR_MASK,
689640ef 1024 scpi_drvinfo->firmware_version),
62c60efb 1025 FIELD_GET(FW_REV_MINOR_MASK,
689640ef 1026 scpi_drvinfo->firmware_version),
62c60efb 1027 FIELD_GET(FW_REV_PATCH_MASK,
689640ef
SH
1028 scpi_drvinfo->firmware_version));
1029
1030 scpi_drvinfo->scpi_ops = &scpi_ops;
8cb7cf56 1031
689640ef
SH
1032 ret = devm_of_platform_populate(dev);
1033 if (ret)
1034 scpi_info = NULL;
1035
1036 return ret;
8cb7cf56
SH
1037}
1038
1039static const struct of_device_id scpi_of_match[] = {
1040 {.compatible = "arm,scpi"},
8358c6b5 1041 {.compatible = "arm,scpi-pre-1.0"},
8cb7cf56
SH
1042 {},
1043};
1044
1045MODULE_DEVICE_TABLE(of, scpi_of_match);
1046
1047static struct platform_driver scpi_driver = {
1048 .driver = {
1049 .name = "scpi_protocol",
1050 .of_match_table = scpi_of_match,
43b9ac93 1051 .dev_groups = versions_groups,
8cb7cf56
SH
1052 },
1053 .probe = scpi_probe,
81faa556 1054 .remove = scpi_remove,
8cb7cf56
SH
1055};
1056module_platform_driver(scpi_driver);
1057
1058MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
1059MODULE_DESCRIPTION("ARM SCPI mailbox protocol driver");
1060MODULE_LICENSE("GPL v2");