[linux-2.6-block.git] / drivers / extcon / extcon-intel-cht-wc.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Extcon charger detection driver for Intel Cherrytrail Whiskey Cove PMIC
 * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
 *
 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
 * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
 */

#include <linux/extcon-provider.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/mfd/intel_soc_pmic.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/usb/role.h>

#include "extcon-intel.h"

#define CHT_WC_PHYCTRL			0x5e07

#define CHT_WC_CHGRCTRL0		0x5e16
#define CHT_WC_CHGRCTRL0_CHGRRESET	BIT(0)
#define CHT_WC_CHGRCTRL0_EMRGCHREN	BIT(1)
#define CHT_WC_CHGRCTRL0_EXTCHRDIS	BIT(2)
#define CHT_WC_CHGRCTRL0_SWCONTROL	BIT(3)
#define CHT_WC_CHGRCTRL0_TTLCK		BIT(4)
#define CHT_WC_CHGRCTRL0_CCSM_OFF	BIT(5)
#define CHT_WC_CHGRCTRL0_DBPOFF		BIT(6)
#define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK	BIT(7)

#define CHT_WC_CHGRCTRL1			0x5e17
#define CHT_WC_CHGRCTRL1_FUSB_INLMT_100		BIT(0)
#define CHT_WC_CHGRCTRL1_FUSB_INLMT_150		BIT(1)
#define CHT_WC_CHGRCTRL1_FUSB_INLMT_500		BIT(2)
#define CHT_WC_CHGRCTRL1_FUSB_INLMT_900		BIT(3)
#define CHT_WC_CHGRCTRL1_FUSB_INLMT_1500	BIT(4)
#define CHT_WC_CHGRCTRL1_FTEMP_EVENT		BIT(5)
#define CHT_WC_CHGRCTRL1_OTGMODE		BIT(6)
#define CHT_WC_CHGRCTRL1_DBPEN			BIT(7)

#define CHT_WC_USBSRC			0x5e29
#define CHT_WC_USBSRC_STS_MASK		GENMASK(1, 0)
#define CHT_WC_USBSRC_STS_SUCCESS	2
#define CHT_WC_USBSRC_STS_FAIL		3
#define CHT_WC_USBSRC_TYPE_SHIFT	2
#define CHT_WC_USBSRC_TYPE_MASK		GENMASK(5, 2)
#define CHT_WC_USBSRC_TYPE_NONE		0
#define CHT_WC_USBSRC_TYPE_SDP		1
#define CHT_WC_USBSRC_TYPE_DCP		2
#define CHT_WC_USBSRC_TYPE_CDP		3
#define CHT_WC_USBSRC_TYPE_ACA		4
#define CHT_WC_USBSRC_TYPE_SE1		5
#define CHT_WC_USBSRC_TYPE_MHL		6
#define CHT_WC_USBSRC_TYPE_FLOATING	7
#define CHT_WC_USBSRC_TYPE_OTHER	8
#define CHT_WC_USBSRC_TYPE_DCP_EXTPHY	9

#define CHT_WC_CHGDISCTRL		0x5e2f
#define CHT_WC_CHGDISCTRL_OUT		BIT(0)
/* 0 - open drain, 1 - regular push-pull output */
#define CHT_WC_CHGDISCTRL_DRV		BIT(4)
/* 0 - pin is controlled by SW, 1 - by HW */
#define CHT_WC_CHGDISCTRL_FN		BIT(6)

#define CHT_WC_PWRSRC_IRQ		0x6e03
#define CHT_WC_PWRSRC_IRQ_MASK		0x6e0f
#define CHT_WC_PWRSRC_STS		0x6e1e
#define CHT_WC_PWRSRC_VBUS		BIT(0)
#define CHT_WC_PWRSRC_DC		BIT(1)
#define CHT_WC_PWRSRC_BATT		BIT(2)
#define CHT_WC_PWRSRC_USBID_MASK	GENMASK(4, 3)
#define CHT_WC_PWRSRC_USBID_SHIFT	3
#define CHT_WC_PWRSRC_RID_ACA		0
#define CHT_WC_PWRSRC_RID_GND		1
#define CHT_WC_PWRSRC_RID_FLOAT		2

#define CHT_WC_VBUS_GPIO_CTLO		0x6e2d
#define CHT_WC_VBUS_GPIO_CTLO_OUTPUT	BIT(0)
#define CHT_WC_VBUS_GPIO_CTLO_DRV_OD	BIT(4)
#define CHT_WC_VBUS_GPIO_CTLO_DIR_OUT	BIT(5)

enum cht_wc_mux_select {
	MUX_SEL_PMIC = 0,
	MUX_SEL_SOC,
};

static const unsigned int cht_wc_extcon_cables[] = {
	EXTCON_USB,
	EXTCON_USB_HOST,
	EXTCON_CHG_USB_SDP,
	EXTCON_CHG_USB_CDP,
	EXTCON_CHG_USB_DCP,
	EXTCON_CHG_USB_ACA,
	EXTCON_NONE,
};

struct cht_wc_extcon_data {
	struct device *dev;
	struct regmap *regmap;
	struct extcon_dev *edev;
	struct usb_role_switch *role_sw;
	struct regulator *vbus_boost;
	struct power_supply *psy;
	enum power_supply_usb_type usb_type;
	unsigned int previous_cable;
	bool usb_host;
	bool vbus_boost_enabled;
};

static int cht_wc_extcon_get_id(struct cht_wc_extcon_data *ext, int pwrsrc_sts)
{
	switch ((pwrsrc_sts & CHT_WC_PWRSRC_USBID_MASK) >> CHT_WC_PWRSRC_USBID_SHIFT) {
	case CHT_WC_PWRSRC_RID_GND:
		return INTEL_USB_ID_GND;
	case CHT_WC_PWRSRC_RID_FLOAT:
		return INTEL_USB_ID_FLOAT;
	case CHT_WC_PWRSRC_RID_ACA:
	default:
		/*
		 * Once we have IIO support for the GPADC we should read
		 * the USBID GPADC channel here and determine ACA role
		 * based on that.
		 */
		return INTEL_USB_ID_FLOAT;
	}
}

static int cht_wc_extcon_get_charger(struct cht_wc_extcon_data *ext,
				     bool ignore_errors)
{
	int ret, usbsrc, status;
	unsigned long timeout;

	/* Charger detection can take upto 600ms, wait 800ms max. */
	timeout = jiffies + msecs_to_jiffies(800);
	do {
		ret = regmap_read(ext->regmap, CHT_WC_USBSRC, &usbsrc);
		if (ret) {
			dev_err(ext->dev, "Error reading usbsrc: %d\n", ret);
			return ret;
		}

		status = usbsrc & CHT_WC_USBSRC_STS_MASK;
		if (status == CHT_WC_USBSRC_STS_SUCCESS ||
		    status == CHT_WC_USBSRC_STS_FAIL)
			break;

		msleep(50); /* Wait a bit before retrying */
	} while (time_before(jiffies, timeout));

	if (status != CHT_WC_USBSRC_STS_SUCCESS) {
		if (!ignore_errors) {
			if (status == CHT_WC_USBSRC_STS_FAIL)
				dev_warn(ext->dev, "Could not detect charger type\n");
			else
				dev_warn(ext->dev, "Timeout detecting charger type\n");
		}

		/* Safe fallback */
		usbsrc = CHT_WC_USBSRC_TYPE_SDP << CHT_WC_USBSRC_TYPE_SHIFT;
	}

	usbsrc = (usbsrc & CHT_WC_USBSRC_TYPE_MASK) >> CHT_WC_USBSRC_TYPE_SHIFT;
	switch (usbsrc) {
	default:
		dev_warn(ext->dev,
			"Unhandled charger type %d, defaulting to SDP\n",
			 ret);
		ext->usb_type = POWER_SUPPLY_USB_TYPE_SDP;
		return EXTCON_CHG_USB_SDP;
	case CHT_WC_USBSRC_TYPE_SDP:
	case CHT_WC_USBSRC_TYPE_FLOATING:
	case CHT_WC_USBSRC_TYPE_OTHER:
		ext->usb_type = POWER_SUPPLY_USB_TYPE_SDP;
		return EXTCON_CHG_USB_SDP;
	case CHT_WC_USBSRC_TYPE_CDP:
		ext->usb_type = POWER_SUPPLY_USB_TYPE_CDP;
		return EXTCON_CHG_USB_CDP;
	case CHT_WC_USBSRC_TYPE_DCP:
	case CHT_WC_USBSRC_TYPE_DCP_EXTPHY:
	case CHT_WC_USBSRC_TYPE_MHL: /* MHL2+ delivers upto 2A, treat as DCP */
		ext->usb_type = POWER_SUPPLY_USB_TYPE_DCP;
		return EXTCON_CHG_USB_DCP;
	case CHT_WC_USBSRC_TYPE_ACA:
		ext->usb_type = POWER_SUPPLY_USB_TYPE_ACA;
		return EXTCON_CHG_USB_ACA;
	}
}

static void cht_wc_extcon_set_phymux(struct cht_wc_extcon_data *ext, u8 state)
{
	int ret;

	ret = regmap_write(ext->regmap, CHT_WC_PHYCTRL, state);
	if (ret)
		dev_err(ext->dev, "Error writing phyctrl: %d\n", ret);
}

static void cht_wc_extcon_set_5v_boost(struct cht_wc_extcon_data *ext,
				       bool enable)
{
	int ret, val;

	/*
	 * The 5V boost converter is enabled through a gpio on the PMIC, since
	 * there currently is no gpio driver we access the gpio reg directly.
	 */
	val = CHT_WC_VBUS_GPIO_CTLO_DRV_OD | CHT_WC_VBUS_GPIO_CTLO_DIR_OUT;
	if (enable)
		val |= CHT_WC_VBUS_GPIO_CTLO_OUTPUT;

	ret = regmap_write(ext->regmap, CHT_WC_VBUS_GPIO_CTLO, val);
	if (ret)
		dev_err(ext->dev, "Error writing Vbus GPIO CTLO: %d\n", ret);
}

static void cht_wc_extcon_set_otgmode(struct cht_wc_extcon_data *ext,
				      bool enable)
{
	unsigned int val = enable ? CHT_WC_CHGRCTRL1_OTGMODE : 0;
	int ret;

	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL1,
				 CHT_WC_CHGRCTRL1_OTGMODE, val);
	if (ret)
		dev_err(ext->dev, "Error updating CHGRCTRL1 reg: %d\n", ret);

	if (ext->vbus_boost && ext->vbus_boost_enabled != enable) {
		if (enable)
			ret = regulator_enable(ext->vbus_boost);
		else
			ret = regulator_disable(ext->vbus_boost);

		if (ret)
			dev_err(ext->dev, "Error updating Vbus boost regulator: %d\n", ret);
		else
			ext->vbus_boost_enabled = enable;
	}
}

static void cht_wc_extcon_enable_charging(struct cht_wc_extcon_data *ext,
					  bool enable)
{
	unsigned int val = enable ? 0 : CHT_WC_CHGDISCTRL_OUT;
	int ret;

	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
				 CHT_WC_CHGDISCTRL_OUT, val);
	if (ret)
		dev_err(ext->dev, "Error updating CHGDISCTRL reg: %d\n", ret);
}

/* Small helper to sync EXTCON_CHG_USB_SDP and EXTCON_USB state */
static void cht_wc_extcon_set_state(struct cht_wc_extcon_data *ext,
				    unsigned int cable, bool state)
{
	extcon_set_state_sync(ext->edev, cable, state);
	if (cable == EXTCON_CHG_USB_SDP)
		extcon_set_state_sync(ext->edev, EXTCON_USB, state);
}

static void cht_wc_extcon_pwrsrc_event(struct cht_wc_extcon_data *ext)
{
	int ret, pwrsrc_sts, id;
	unsigned int cable = EXTCON_NONE;
	/* Ignore errors in host mode, as the 5v boost converter is on then */
	bool ignore_get_charger_errors = ext->usb_host;
	enum usb_role role;

	ext->usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;

	ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_STS, &pwrsrc_sts);
	if (ret) {
		dev_err(ext->dev, "Error reading pwrsrc status: %d\n", ret);
		return;
	}

	id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
	if (id == INTEL_USB_ID_GND) {
		cht_wc_extcon_enable_charging(ext, false);
		cht_wc_extcon_set_otgmode(ext, true);

		/* The 5v boost causes a false VBUS / SDP detect, skip */
		goto charger_det_done;
	}

	cht_wc_extcon_set_otgmode(ext, false);
	cht_wc_extcon_enable_charging(ext, true);

	/* Plugged into a host/charger or not connected? */
	if (!(pwrsrc_sts & CHT_WC_PWRSRC_VBUS)) {
		/* Route D+ and D- to PMIC for future charger detection */
		cht_wc_extcon_set_phymux(ext, MUX_SEL_PMIC);
		goto set_state;
	}

	ret = cht_wc_extcon_get_charger(ext, ignore_get_charger_errors);
	if (ret >= 0)
		cable = ret;

charger_det_done:
	/* Route D+ and D- to SoC for the host or gadget controller */
	cht_wc_extcon_set_phymux(ext, MUX_SEL_SOC);

set_state:
	if (cable != ext->previous_cable) {
		cht_wc_extcon_set_state(ext, cable, true);
		cht_wc_extcon_set_state(ext, ext->previous_cable, false);
		ext->previous_cable = cable;
	}

	ext->usb_host = ((id == INTEL_USB_ID_GND) || (id == INTEL_USB_RID_A));
	extcon_set_state_sync(ext->edev, EXTCON_USB_HOST, ext->usb_host);

	if (ext->usb_host)
		role = USB_ROLE_HOST;
	else if (pwrsrc_sts & CHT_WC_PWRSRC_VBUS)
		role = USB_ROLE_DEVICE;
	else
		role = USB_ROLE_NONE;

	/* Note: this is a no-op when ext->role_sw is NULL */
	ret = usb_role_switch_set_role(ext->role_sw, role);
	if (ret)
		dev_err(ext->dev, "Error setting USB-role: %d\n", ret);

	if (ext->psy)
		power_supply_changed(ext->psy);
}

static irqreturn_t cht_wc_extcon_isr(int irq, void *data)
{
	struct cht_wc_extcon_data *ext = data;
	int ret, irqs;

	ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_IRQ, &irqs);
	if (ret) {
		dev_err(ext->dev, "Error reading irqs: %d\n", ret);
		return IRQ_NONE;
	}

	cht_wc_extcon_pwrsrc_event(ext);

	ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ, irqs);
	if (ret) {
		dev_err(ext->dev, "Error writing irqs: %d\n", ret);
		return IRQ_NONE;
	}

	return IRQ_HANDLED;
}

static int cht_wc_extcon_sw_control(struct cht_wc_extcon_data *ext, bool enable)
{
	int ret, mask, val;

	val = enable ? 0 : CHT_WC_CHGDISCTRL_FN;
	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
				 CHT_WC_CHGDISCTRL_FN, val);
	if (ret)
		dev_err(ext->dev,
			"Error setting sw control for CHGDIS pin: %d\n",
			ret);

	mask = CHT_WC_CHGRCTRL0_SWCONTROL | CHT_WC_CHGRCTRL0_CCSM_OFF;
	val = enable ? mask : 0;
	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL0, mask, val);
	if (ret)
		dev_err(ext->dev, "Error setting sw control: %d\n", ret);

	return ret;
}

static int cht_wc_extcon_find_role_sw(struct cht_wc_extcon_data *ext)
{
	const struct software_node *swnode;
	struct fwnode_handle *fwnode;

	swnode = software_node_find_by_name(NULL, "intel-xhci-usb-sw");
	if (!swnode)
		return -EPROBE_DEFER;

	fwnode = software_node_fwnode(swnode);
	ext->role_sw = usb_role_switch_find_by_fwnode(fwnode);
	fwnode_handle_put(fwnode);

	return ext->role_sw ? 0 : -EPROBE_DEFER;
}

static void cht_wc_extcon_put_role_sw(void *data)
{
	struct cht_wc_extcon_data *ext = data;

	usb_role_switch_put(ext->role_sw);
}

/* Some boards require controlling the role-sw and Vbus based on the id-pin */
static int cht_wc_extcon_get_role_sw_and_regulator(struct cht_wc_extcon_data *ext)
{
	int ret;

	ret = cht_wc_extcon_find_role_sw(ext);
	if (ret)
		return ret;

	ret = devm_add_action_or_reset(ext->dev, cht_wc_extcon_put_role_sw, ext);
	if (ret)
		return ret;

	/*
	 * On x86/ACPI platforms the regulator <-> consumer link is provided
	 * by platform_data passed to the regulator driver. This means that
	 * this info is not available before the regulator driver has bound.
	 * Use devm_regulator_get_optional() to avoid getting a dummy
	 * regulator and wait for the regulator to show up if necessary.
	 */
	ext->vbus_boost = devm_regulator_get_optional(ext->dev, "vbus");
	if (IS_ERR(ext->vbus_boost)) {
		ret = PTR_ERR(ext->vbus_boost);
		if (ret == -ENODEV)
			ret = -EPROBE_DEFER;

		return dev_err_probe(ext->dev, ret, "getting Vbus regulator");
	}

	return 0;
}

static int cht_wc_extcon_psy_get_prop(struct power_supply *psy,
				      enum power_supply_property psp,
				      union power_supply_propval *val)
{
	struct cht_wc_extcon_data *ext = power_supply_get_drvdata(psy);

	switch (psp) {
	case POWER_SUPPLY_PROP_USB_TYPE:
		val->intval = ext->usb_type;
		break;
	case POWER_SUPPLY_PROP_ONLINE:
		val->intval = ext->usb_type ? 1 : 0;
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static const enum power_supply_usb_type cht_wc_extcon_psy_usb_types[] = {
	POWER_SUPPLY_USB_TYPE_SDP,
	POWER_SUPPLY_USB_TYPE_CDP,
	POWER_SUPPLY_USB_TYPE_DCP,
	POWER_SUPPLY_USB_TYPE_ACA,
	POWER_SUPPLY_USB_TYPE_UNKNOWN,
};

static const enum power_supply_property cht_wc_extcon_psy_props[] = {
	POWER_SUPPLY_PROP_USB_TYPE,
	POWER_SUPPLY_PROP_ONLINE,
};

static const struct power_supply_desc cht_wc_extcon_psy_desc = {
	.name = "cht_wcove_pwrsrc",
	.type = POWER_SUPPLY_TYPE_USB,
	.usb_types = cht_wc_extcon_psy_usb_types,
	.num_usb_types = ARRAY_SIZE(cht_wc_extcon_psy_usb_types),
	.properties = cht_wc_extcon_psy_props,
	.num_properties = ARRAY_SIZE(cht_wc_extcon_psy_props),
	.get_property = cht_wc_extcon_psy_get_prop,
};

static int cht_wc_extcon_register_psy(struct cht_wc_extcon_data *ext)
{
	struct power_supply_config psy_cfg = { .drv_data = ext };

	ext->psy = devm_power_supply_register(ext->dev,
					      &cht_wc_extcon_psy_desc,
					      &psy_cfg);
	return PTR_ERR_OR_ZERO(ext->psy);
}

static int cht_wc_extcon_probe(struct platform_device *pdev)
{
	struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
	struct cht_wc_extcon_data *ext;
	unsigned long mask = ~(CHT_WC_PWRSRC_VBUS | CHT_WC_PWRSRC_USBID_MASK);
	int pwrsrc_sts, id;
	int irq, ret;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;

	ext = devm_kzalloc(&pdev->dev, sizeof(*ext), GFP_KERNEL);
	if (!ext)
		return -ENOMEM;

	ext->dev = &pdev->dev;
	ext->regmap = pmic->regmap;
	ext->previous_cable = EXTCON_NONE;

	/* Initialize extcon device */
	ext->edev = devm_extcon_dev_allocate(ext->dev, cht_wc_extcon_cables);
	if (IS_ERR(ext->edev))
		return PTR_ERR(ext->edev);

	switch (pmic->cht_wc_model) {
	case INTEL_CHT_WC_GPD_WIN_POCKET:
		/*
		 * When a host-cable is detected the BIOS enables an external 5v boost
		 * converter to power connected devices there are 2 problems with this:
		 * 1) This gets seen by the external battery charger as a valid Vbus
		 *    supply and it then tries to feed Vsys from this creating a
		 *    feedback loop which causes aprox. 300 mA extra battery drain
		 *    (and unless we drive the external-charger-disable pin high it
		 *    also tries to charge the battery causing even more feedback).
		 * 2) This gets seen by the pwrsrc block as a SDP USB Vbus supply
		 * Since the external battery charger has its own 5v boost converter
		 * which does not have these issues, we simply turn the separate
		 * external 5v boost converter off and leave it off entirely.
		 */
		cht_wc_extcon_set_5v_boost(ext, false);
		break;
	case INTEL_CHT_WC_LENOVO_YOGABOOK1:
		/* Do this first, as it may very well return -EPROBE_DEFER. */
		ret = cht_wc_extcon_get_role_sw_and_regulator(ext);
		if (ret)
			return ret;
		/*
		 * The bq25890 used here relies on this driver's BC-1.2 charger
		 * detection, and the bq25890 driver expect this info to be
		 * available through a parent power_supply class device which
		 * models the detected charger (idem to how the Type-C TCPM code
		 * registers a power_supply classdev for the connected charger).
		 */
		ret = cht_wc_extcon_register_psy(ext);
		if (ret)
			return ret;
		break;
	case INTEL_CHT_WC_XIAOMI_MIPAD2:
		ret = cht_wc_extcon_get_role_sw_and_regulator(ext);
		if (ret)
			return ret;
		break;
	default:
		break;
	}

	/* Enable sw control */
	ret = cht_wc_extcon_sw_control(ext, true);
	if (ret)
		goto disable_sw_control;

	/* Disable charging by external battery charger */
	cht_wc_extcon_enable_charging(ext, false);

	/* Register extcon device */
	ret = devm_extcon_dev_register(ext->dev, ext->edev);
	if (ret) {
		dev_err(ext->dev, "Error registering extcon device: %d\n", ret);
		goto disable_sw_control;
	}

	ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_STS, &pwrsrc_sts);
	if (ret) {
		dev_err(ext->dev, "Error reading pwrsrc status: %d\n", ret);
		goto disable_sw_control;
	}

	/*
	 * If no USB host or device connected, route D+ and D- to PMIC for
	 * initial charger detection
	 */
	id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
	if (id != INTEL_USB_ID_GND)
		cht_wc_extcon_set_phymux(ext, MUX_SEL_PMIC);

	/* Get initial state */
	cht_wc_extcon_pwrsrc_event(ext);

	ret = devm_request_threaded_irq(ext->dev, irq, NULL, cht_wc_extcon_isr,
					IRQF_ONESHOT, pdev->name, ext);
	if (ret) {
		dev_err(ext->dev, "Error requesting interrupt: %d\n", ret);
		goto disable_sw_control;
	}

	/* Unmask irqs */
	ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ_MASK, mask);
	if (ret) {
		dev_err(ext->dev, "Error writing irq-mask: %d\n", ret);
		goto disable_sw_control;
	}

	platform_set_drvdata(pdev, ext);

	return 0;

disable_sw_control:
	cht_wc_extcon_sw_control(ext, false);
	return ret;
}

static int cht_wc_extcon_remove(struct platform_device *pdev)
{
	struct cht_wc_extcon_data *ext = platform_get_drvdata(pdev);

	cht_wc_extcon_sw_control(ext, false);

	return 0;
}

static const struct platform_device_id cht_wc_extcon_table[] = {
	{ .name = "cht_wcove_pwrsrc" },
	{},
};
MODULE_DEVICE_TABLE(platform, cht_wc_extcon_table);

static struct platform_driver cht_wc_extcon_driver = {
	.probe = cht_wc_extcon_probe,
	.remove = cht_wc_extcon_remove,
	.id_table = cht_wc_extcon_table,
	.driver = {
		.name = "cht_wcove_pwrsrc",
	},
};
module_platform_driver(cht_wc_extcon_driver);

MODULE_DESCRIPTION("Intel Cherrytrail Whiskey Cove PMIC extcon driver");
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
900ed555	1	// SPDX-License-Identifier: GPL-2.0
db0f3baa HG	2	/*
	3	* Extcon charger detection driver for Intel Cherrytrail Whiskey Cove PMIC
	4	* Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
	5	*
	6	* Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
	7	* Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
db0f3baa HG	8	*/
db0f3baa HG	9
176aa360	10	#include <linux/extcon-provider.h>
db0f3baa HG	11	#include <linux/interrupt.h>
	12	#include <linux/kernel.h>
	13	#include <linux/mfd/intel_soc_pmic.h>
	14	#include <linux/module.h>
ac316725	15	#include <linux/mod_devicetable.h>
db0f3baa	16	#include <linux/platform_device.h>
66e31186	17	#include <linux/power_supply.h>
b910a9ce	18	#include <linux/property.h>
db0f3baa	19	#include <linux/regmap.h>
b7fa2cd3	20	#include <linux/regulator/consumer.h>
db0f3baa	21	#include <linux/slab.h>
b7fa2cd3	22	#include <linux/usb/role.h>
db0f3baa	23
098b7ae8 AS	24	#include "extcon-intel.h"
098b7ae8 AS	25
db0f3baa HG	26	#define CHT_WC_PHYCTRL 0x5e07
	27
	28	#define CHT_WC_CHGRCTRL0 0x5e16
	29	#define CHT_WC_CHGRCTRL0_CHGRRESET BIT(0)
	30	#define CHT_WC_CHGRCTRL0_EMRGCHREN BIT(1)
	31	#define CHT_WC_CHGRCTRL0_EXTCHRDIS BIT(2)
	32	#define CHT_WC_CHGRCTRL0_SWCONTROL BIT(3)
001d3ecc AS	33	#define CHT_WC_CHGRCTRL0_TTLCK BIT(4)
	34	#define CHT_WC_CHGRCTRL0_CCSM_OFF BIT(5)
	35	#define CHT_WC_CHGRCTRL0_DBPOFF BIT(6)
	36	#define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK BIT(7)
db0f3baa	37
3137301b YK	38	#define CHT_WC_CHGRCTRL1 0x5e17
	39	#define CHT_WC_CHGRCTRL1_FUSB_INLMT_100 BIT(0)
	40	#define CHT_WC_CHGRCTRL1_FUSB_INLMT_150 BIT(1)
	41	#define CHT_WC_CHGRCTRL1_FUSB_INLMT_500 BIT(2)
	42	#define CHT_WC_CHGRCTRL1_FUSB_INLMT_900 BIT(3)
	43	#define CHT_WC_CHGRCTRL1_FUSB_INLMT_1500 BIT(4)
	44	#define CHT_WC_CHGRCTRL1_FTEMP_EVENT BIT(5)
	45	#define CHT_WC_CHGRCTRL1_OTGMODE BIT(6)
	46	#define CHT_WC_CHGRCTRL1_DBPEN BIT(7)
db0f3baa HG	47
	48	#define CHT_WC_USBSRC 0x5e29
	49	#define CHT_WC_USBSRC_STS_MASK GENMASK(1, 0)
	50	#define CHT_WC_USBSRC_STS_SUCCESS 2
	51	#define CHT_WC_USBSRC_STS_FAIL 3
	52	#define CHT_WC_USBSRC_TYPE_SHIFT 2
	53	#define CHT_WC_USBSRC_TYPE_MASK GENMASK(5, 2)
	54	#define CHT_WC_USBSRC_TYPE_NONE 0
	55	#define CHT_WC_USBSRC_TYPE_SDP 1
	56	#define CHT_WC_USBSRC_TYPE_DCP 2
	57	#define CHT_WC_USBSRC_TYPE_CDP 3
	58	#define CHT_WC_USBSRC_TYPE_ACA 4
	59	#define CHT_WC_USBSRC_TYPE_SE1 5
	60	#define CHT_WC_USBSRC_TYPE_MHL 6
001d3ecc	61	#define CHT_WC_USBSRC_TYPE_FLOATING 7
db0f3baa HG	62	#define CHT_WC_USBSRC_TYPE_OTHER 8
	63	#define CHT_WC_USBSRC_TYPE_DCP_EXTPHY 9
	64
a72a1be0 YK	65	#define CHT_WC_CHGDISCTRL 0x5e2f
	66	#define CHT_WC_CHGDISCTRL_OUT BIT(0)
	67	/* 0 - open drain, 1 - regular push-pull output */
	68	#define CHT_WC_CHGDISCTRL_DRV BIT(4)
	69	/* 0 - pin is controlled by SW, 1 - by HW */
	70	#define CHT_WC_CHGDISCTRL_FN BIT(6)
	71
db0f3baa HG	72	#define CHT_WC_PWRSRC_IRQ 0x6e03
	73	#define CHT_WC_PWRSRC_IRQ_MASK 0x6e0f
	74	#define CHT_WC_PWRSRC_STS 0x6e1e
	75	#define CHT_WC_PWRSRC_VBUS BIT(0)
	76	#define CHT_WC_PWRSRC_DC BIT(1)
001d3ecc	77	#define CHT_WC_PWRSRC_BATT BIT(2)
a4722503 AS	78	#define CHT_WC_PWRSRC_USBID_MASK GENMASK(4, 3)
	79	#define CHT_WC_PWRSRC_USBID_SHIFT 3
	80	#define CHT_WC_PWRSRC_RID_ACA 0
	81	#define CHT_WC_PWRSRC_RID_GND 1
	82	#define CHT_WC_PWRSRC_RID_FLOAT 2
db0f3baa	83
585cb239 HG	84	#define CHT_WC_VBUS_GPIO_CTLO 0x6e2d
585cb239 HG	85	#define CHT_WC_VBUS_GPIO_CTLO_OUTPUT BIT(0)
ad49aee4 HG	86	#define CHT_WC_VBUS_GPIO_CTLO_DRV_OD BIT(4)
ad49aee4 HG	87	#define CHT_WC_VBUS_GPIO_CTLO_DIR_OUT BIT(5)
585cb239	88
db0f3baa HG	89	enum cht_wc_mux_select {
	90	MUX_SEL_PMIC = 0,
	91	MUX_SEL_SOC,
	92	};
	93
	94	static const unsigned int cht_wc_extcon_cables[] = {
	95	EXTCON_USB,
	96	EXTCON_USB_HOST,
	97	EXTCON_CHG_USB_SDP,
	98	EXTCON_CHG_USB_CDP,
	99	EXTCON_CHG_USB_DCP,
	100	EXTCON_CHG_USB_ACA,
	101	EXTCON_NONE,
	102	};
	103
	104	struct cht_wc_extcon_data {
	105	struct device *dev;
	106	struct regmap *regmap;
	107	struct extcon_dev *edev;
b7fa2cd3 HG	108	struct usb_role_switch *role_sw;
b7fa2cd3 HG	109	struct regulator *vbus_boost;
66e31186 HG	110	struct power_supply *psy;
66e31186 HG	111	enum power_supply_usb_type usb_type;
db0f3baa	112	unsigned int previous_cable;
c42a880c	113	bool usb_host;
b7fa2cd3	114	bool vbus_boost_enabled;
db0f3baa HG	115	};
	116
	117	static int cht_wc_extcon_get_id(struct cht_wc_extcon_data *ext, int pwrsrc_sts)
	118	{
a4722503 AS	119	switch ((pwrsrc_sts & CHT_WC_PWRSRC_USBID_MASK) >> CHT_WC_PWRSRC_USBID_SHIFT) {
a4722503 AS	120	case CHT_WC_PWRSRC_RID_GND:
098b7ae8	121	return INTEL_USB_ID_GND;
a4722503	122	case CHT_WC_PWRSRC_RID_FLOAT:
098b7ae8	123	return INTEL_USB_ID_FLOAT;
a4722503 AS	124	case CHT_WC_PWRSRC_RID_ACA:
	125	default:
	126	/*
	127	* Once we have IIO support for the GPADC we should read
	128	* the USBID GPADC channel here and determine ACA role
	129	* based on that.
	130	*/
098b7ae8	131	return INTEL_USB_ID_FLOAT;
a4722503	132	}
db0f3baa HG	133	}
db0f3baa HG	134
c42a880c HG	135	static int cht_wc_extcon_get_charger(struct cht_wc_extcon_data *ext,
c42a880c HG	136	bool ignore_errors)
db0f3baa HG	137	{
	138	int ret, usbsrc, status;
	139	unsigned long timeout;
	140
	141	/* Charger detection can take upto 600ms, wait 800ms max. */
	142	timeout = jiffies + msecs_to_jiffies(800);
	143	do {
	144	ret = regmap_read(ext->regmap, CHT_WC_USBSRC, &usbsrc);
	145	if (ret) {
	146	dev_err(ext->dev, "Error reading usbsrc: %d\n", ret);
	147	return ret;
	148	}
	149
	150	status = usbsrc & CHT_WC_USBSRC_STS_MASK;
	151	if (status == CHT_WC_USBSRC_STS_SUCCESS \|\|
	152	status == CHT_WC_USBSRC_STS_FAIL)
	153	break;
	154
	155	msleep(50); /* Wait a bit before retrying */
	156	} while (time_before(jiffies, timeout));
	157
	158	if (status != CHT_WC_USBSRC_STS_SUCCESS) {
73b5ae34 HG	159	if (!ignore_errors) {
	160	if (status == CHT_WC_USBSRC_STS_FAIL)
	161	dev_warn(ext->dev, "Could not detect charger type\n");
	162	else
	163	dev_warn(ext->dev, "Timeout detecting charger type\n");
	164	}
	165
	166	/* Safe fallback */
	167	usbsrc = CHT_WC_USBSRC_TYPE_SDP << CHT_WC_USBSRC_TYPE_SHIFT;
db0f3baa HG	168	}
	169
	170	usbsrc = (usbsrc & CHT_WC_USBSRC_TYPE_MASK) >> CHT_WC_USBSRC_TYPE_SHIFT;
	171	switch (usbsrc) {
	172	default:
	173	dev_warn(ext->dev,
	174	"Unhandled charger type %d, defaulting to SDP\n",
	175	ret);
66e31186	176	ext->usb_type = POWER_SUPPLY_USB_TYPE_SDP;
962341b5	177	return EXTCON_CHG_USB_SDP;
db0f3baa	178	case CHT_WC_USBSRC_TYPE_SDP:
001d3ecc	179	case CHT_WC_USBSRC_TYPE_FLOATING:
db0f3baa	180	case CHT_WC_USBSRC_TYPE_OTHER:
66e31186	181	ext->usb_type = POWER_SUPPLY_USB_TYPE_SDP;
db0f3baa HG	182	return EXTCON_CHG_USB_SDP;
db0f3baa HG	183	case CHT_WC_USBSRC_TYPE_CDP:
66e31186	184	ext->usb_type = POWER_SUPPLY_USB_TYPE_CDP;
db0f3baa HG	185	return EXTCON_CHG_USB_CDP;
	186	case CHT_WC_USBSRC_TYPE_DCP:
	187	case CHT_WC_USBSRC_TYPE_DCP_EXTPHY:
	188	case CHT_WC_USBSRC_TYPE_MHL: /* MHL2+ delivers upto 2A, treat as DCP */
66e31186	189	ext->usb_type = POWER_SUPPLY_USB_TYPE_DCP;
db0f3baa HG	190	return EXTCON_CHG_USB_DCP;
db0f3baa HG	191	case CHT_WC_USBSRC_TYPE_ACA:
66e31186	192	ext->usb_type = POWER_SUPPLY_USB_TYPE_ACA;
db0f3baa HG	193	return EXTCON_CHG_USB_ACA;
	194	}
	195	}
	196
	197	static void cht_wc_extcon_set_phymux(struct cht_wc_extcon_data *ext, u8 state)
	198	{
	199	int ret;
	200
	201	ret = regmap_write(ext->regmap, CHT_WC_PHYCTRL, state);
	202	if (ret)
	203	dev_err(ext->dev, "Error writing phyctrl: %d\n", ret);
	204	}
	205
585cb239 HG	206	static void cht_wc_extcon_set_5v_boost(struct cht_wc_extcon_data *ext,
	207	bool enable)
	208	{
	209	int ret, val;
	210
585cb239 HG	211	/*
	212	* The 5V boost converter is enabled through a gpio on the PMIC, since
	213	* there currently is no gpio driver we access the gpio reg directly.
	214	*/
ad49aee4 HG	215	val = CHT_WC_VBUS_GPIO_CTLO_DRV_OD \| CHT_WC_VBUS_GPIO_CTLO_DIR_OUT;
	216	if (enable)
	217	val \|= CHT_WC_VBUS_GPIO_CTLO_OUTPUT;
	218
	219	ret = regmap_write(ext->regmap, CHT_WC_VBUS_GPIO_CTLO, val);
585cb239 HG	220	if (ret)
	221	dev_err(ext->dev, "Error writing Vbus GPIO CTLO: %d\n", ret);
	222	}
	223
3137301b YK	224	static void cht_wc_extcon_set_otgmode(struct cht_wc_extcon_data *ext,
	225	bool enable)
	226	{
	227	unsigned int val = enable ? CHT_WC_CHGRCTRL1_OTGMODE : 0;
	228	int ret;
	229
	230	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL1,
	231	CHT_WC_CHGRCTRL1_OTGMODE, val);
	232	if (ret)
	233	dev_err(ext->dev, "Error updating CHGRCTRL1 reg: %d\n", ret);
b7fa2cd3 HG	234
	235	if (ext->vbus_boost && ext->vbus_boost_enabled != enable) {
	236	if (enable)
	237	ret = regulator_enable(ext->vbus_boost);
	238	else
	239	ret = regulator_disable(ext->vbus_boost);
	240
	241	if (ret)
	242	dev_err(ext->dev, "Error updating Vbus boost regulator: %d\n", ret);
	243	else
	244	ext->vbus_boost_enabled = enable;
	245	}
3137301b YK	246	}
3137301b YK	247
a72a1be0 YK	248	static void cht_wc_extcon_enable_charging(struct cht_wc_extcon_data *ext,
	249	bool enable)
	250	{
	251	unsigned int val = enable ? 0 : CHT_WC_CHGDISCTRL_OUT;
	252	int ret;
	253
	254	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
	255	CHT_WC_CHGDISCTRL_OUT, val);
	256	if (ret)
	257	dev_err(ext->dev, "Error updating CHGDISCTRL reg: %d\n", ret);
	258	}
	259
db0f3baa HG	260	/* Small helper to sync EXTCON_CHG_USB_SDP and EXTCON_USB state */
	261	static void cht_wc_extcon_set_state(struct cht_wc_extcon_data *ext,
	262	unsigned int cable, bool state)
	263	{
	264	extcon_set_state_sync(ext->edev, cable, state);
	265	if (cable == EXTCON_CHG_USB_SDP)
	266	extcon_set_state_sync(ext->edev, EXTCON_USB, state);
	267	}
	268
	269	static void cht_wc_extcon_pwrsrc_event(struct cht_wc_extcon_data *ext)
	270	{
	271	int ret, pwrsrc_sts, id;
	272	unsigned int cable = EXTCON_NONE;
c42a880c HG	273	/* Ignore errors in host mode, as the 5v boost converter is on then */
c42a880c HG	274	bool ignore_get_charger_errors = ext->usb_host;
b7fa2cd3	275	enum usb_role role;
db0f3baa	276
66e31186 HG	277	ext->usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
66e31186 HG	278
db0f3baa HG	279	ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_STS, &pwrsrc_sts);
	280	if (ret) {
	281	dev_err(ext->dev, "Error reading pwrsrc status: %d\n", ret);
	282	return;
	283	}
	284
	285	id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
098b7ae8	286	if (id == INTEL_USB_ID_GND) {
a72a1be0	287	cht_wc_extcon_enable_charging(ext, false);
3137301b YK	288	cht_wc_extcon_set_otgmode(ext, true);
3137301b YK	289
db0f3baa HG	290	/* The 5v boost causes a false VBUS / SDP detect, skip */
	291	goto charger_det_done;
	292	}
	293
3137301b	294	cht_wc_extcon_set_otgmode(ext, false);
a72a1be0	295	cht_wc_extcon_enable_charging(ext, true);
3137301b	296
db0f3baa HG	297	/* Plugged into a host/charger or not connected? */
	298	if (!(pwrsrc_sts & CHT_WC_PWRSRC_VBUS)) {
	299	/* Route D+ and D- to PMIC for future charger detection */
	300	cht_wc_extcon_set_phymux(ext, MUX_SEL_PMIC);
	301	goto set_state;
	302	}
	303
c42a880c	304	ret = cht_wc_extcon_get_charger(ext, ignore_get_charger_errors);
db0f3baa HG	305	if (ret >= 0)
	306	cable = ret;
	307
	308	charger_det_done:
	309	/* Route D+ and D- to SoC for the host or gadget controller */
	310	cht_wc_extcon_set_phymux(ext, MUX_SEL_SOC);
	311
	312	set_state:
	313	if (cable != ext->previous_cable) {
	314	cht_wc_extcon_set_state(ext, cable, true);
	315	cht_wc_extcon_set_state(ext, ext->previous_cable, false);
	316	ext->previous_cable = cable;
	317	}
	318
098b7ae8	319	ext->usb_host = ((id == INTEL_USB_ID_GND) \|\| (id == INTEL_USB_RID_A));
c42a880c	320	extcon_set_state_sync(ext->edev, EXTCON_USB_HOST, ext->usb_host);
b7fa2cd3 HG	321
	322	if (ext->usb_host)
	323	role = USB_ROLE_HOST;
	324	else if (pwrsrc_sts & CHT_WC_PWRSRC_VBUS)
	325	role = USB_ROLE_DEVICE;
	326	else
	327	role = USB_ROLE_NONE;
	328
	329	/* Note: this is a no-op when ext->role_sw is NULL */
	330	ret = usb_role_switch_set_role(ext->role_sw, role);
	331	if (ret)
	332	dev_err(ext->dev, "Error setting USB-role: %d\n", ret);
66e31186 HG	333
	334	if (ext->psy)
	335	power_supply_changed(ext->psy);
db0f3baa HG	336	}
	337
	338	static irqreturn_t cht_wc_extcon_isr(int irq, void *data)
	339	{
	340	struct cht_wc_extcon_data *ext = data;
	341	int ret, irqs;
	342
	343	ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_IRQ, &irqs);
	344	if (ret) {
	345	dev_err(ext->dev, "Error reading irqs: %d\n", ret);
	346	return IRQ_NONE;
	347	}
	348
	349	cht_wc_extcon_pwrsrc_event(ext);
	350
	351	ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ, irqs);
	352	if (ret) {
	353	dev_err(ext->dev, "Error writing irqs: %d\n", ret);
	354	return IRQ_NONE;
	355	}
	356
	357	return IRQ_HANDLED;
	358	}
	359
	360	static int cht_wc_extcon_sw_control(struct cht_wc_extcon_data *ext, bool enable)
	361	{
	362	int ret, mask, val;
	363
a72a1be0 YK	364	val = enable ? 0 : CHT_WC_CHGDISCTRL_FN;
	365	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
	366	CHT_WC_CHGDISCTRL_FN, val);
	367	if (ret)
	368	dev_err(ext->dev,
	369	"Error setting sw control for CHGDIS pin: %d\n",
	370	ret);
	371
001d3ecc	372	mask = CHT_WC_CHGRCTRL0_SWCONTROL \| CHT_WC_CHGRCTRL0_CCSM_OFF;
db0f3baa HG	373	val = enable ? mask : 0;
	374	ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL0, mask, val);
	375	if (ret)
	376	dev_err(ext->dev, "Error setting sw control: %d\n", ret);
	377
	378	return ret;
	379	}
	380
b7fa2cd3 HG	381	static int cht_wc_extcon_find_role_sw(struct cht_wc_extcon_data *ext)
	382	{
	383	const struct software_node *swnode;
	384	struct fwnode_handle *fwnode;
	385
	386	swnode = software_node_find_by_name(NULL, "intel-xhci-usb-sw");
	387	if (!swnode)
	388	return -EPROBE_DEFER;
	389
	390	fwnode = software_node_fwnode(swnode);
	391	ext->role_sw = usb_role_switch_find_by_fwnode(fwnode);
	392	fwnode_handle_put(fwnode);
	393
	394	return ext->role_sw ? 0 : -EPROBE_DEFER;
	395	}
	396
	397	static void cht_wc_extcon_put_role_sw(void *data)
	398	{
	399	struct cht_wc_extcon_data *ext = data;
	400
	401	usb_role_switch_put(ext->role_sw);
	402	}
	403
	404	/* Some boards require controlling the role-sw and Vbus based on the id-pin */
	405	static int cht_wc_extcon_get_role_sw_and_regulator(struct cht_wc_extcon_data *ext)
	406	{
	407	int ret;
	408
	409	ret = cht_wc_extcon_find_role_sw(ext);
	410	if (ret)
	411	return ret;
	412
	413	ret = devm_add_action_or_reset(ext->dev, cht_wc_extcon_put_role_sw, ext);
	414	if (ret)
	415	return ret;
	416
	417	/*
	418	* On x86/ACPI platforms the regulator <-> consumer link is provided
	419	* by platform_data passed to the regulator driver. This means that
	420	* this info is not available before the regulator driver has bound.
	421	* Use devm_regulator_get_optional() to avoid getting a dummy
	422	* regulator and wait for the regulator to show up if necessary.
	423	*/
	424	ext->vbus_boost = devm_regulator_get_optional(ext->dev, "vbus");
	425	if (IS_ERR(ext->vbus_boost)) {
	426	ret = PTR_ERR(ext->vbus_boost);
	427	if (ret == -ENODEV)
	428	ret = -EPROBE_DEFER;
	429
	430	return dev_err_probe(ext->dev, ret, "getting Vbus regulator");
	431	}
	432
	433	return 0;
	434	}
	435
66e31186 HG	436	static int cht_wc_extcon_psy_get_prop(struct power_supply *psy,
	437	enum power_supply_property psp,
	438	union power_supply_propval *val)
	439	{
	440	struct cht_wc_extcon_data *ext = power_supply_get_drvdata(psy);
	441
	442	switch (psp) {
	443	case POWER_SUPPLY_PROP_USB_TYPE:
	444	val->intval = ext->usb_type;
	445	break;
	446	case POWER_SUPPLY_PROP_ONLINE:
	447	val->intval = ext->usb_type ? 1 : 0;
	448	break;
	449	default:
	450	return -EINVAL;
	451	}
	452
	453	return 0;
	454	}
	455
	456	static const enum power_supply_usb_type cht_wc_extcon_psy_usb_types[] = {
	457	POWER_SUPPLY_USB_TYPE_SDP,
	458	POWER_SUPPLY_USB_TYPE_CDP,
	459	POWER_SUPPLY_USB_TYPE_DCP,
	460	POWER_SUPPLY_USB_TYPE_ACA,
	461	POWER_SUPPLY_USB_TYPE_UNKNOWN,
	462	};
	463
	464	static const enum power_supply_property cht_wc_extcon_psy_props[] = {
	465	POWER_SUPPLY_PROP_USB_TYPE,
	466	POWER_SUPPLY_PROP_ONLINE,
	467	};
	468
	469	static const struct power_supply_desc cht_wc_extcon_psy_desc = {
	470	.name = "cht_wcove_pwrsrc",
	471	.type = POWER_SUPPLY_TYPE_USB,
	472	.usb_types = cht_wc_extcon_psy_usb_types,
	473	.num_usb_types = ARRAY_SIZE(cht_wc_extcon_psy_usb_types),
	474	.properties = cht_wc_extcon_psy_props,
	475	.num_properties = ARRAY_SIZE(cht_wc_extcon_psy_props),
	476	.get_property = cht_wc_extcon_psy_get_prop,
	477	};
	478
	479	static int cht_wc_extcon_register_psy(struct cht_wc_extcon_data *ext)
	480	{
	481	struct power_supply_config psy_cfg = { .drv_data = ext };
	482
	483	ext->psy = devm_power_supply_register(ext->dev,
	484	&cht_wc_extcon_psy_desc,
	485	&psy_cfg);
	486	return PTR_ERR_OR_ZERO(ext->psy);
	487	}
	488
db0f3baa HG	489	static int cht_wc_extcon_probe(struct platform_device *pdev)
	490	{
	491	struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
	492	struct cht_wc_extcon_data *ext;
a4722503	493	unsigned long mask = ~(CHT_WC_PWRSRC_VBUS \| CHT_WC_PWRSRC_USBID_MASK);
e81b8893	494	int pwrsrc_sts, id;
db0f3baa HG	495	int irq, ret;
	496
	497	irq = platform_get_irq(pdev, 0);
	498	if (irq < 0)
	499	return irq;
	500
	501	ext = devm_kzalloc(&pdev->dev, sizeof(*ext), GFP_KERNEL);
	502	if (!ext)
	503	return -ENOMEM;
	504
	505	ext->dev = &pdev->dev;
	506	ext->regmap = pmic->regmap;
	507	ext->previous_cable = EXTCON_NONE;
	508
	509	/* Initialize extcon device */
	510	ext->edev = devm_extcon_dev_allocate(ext->dev, cht_wc_extcon_cables);
	511	if (IS_ERR(ext->edev))
	512	return PTR_ERR(ext->edev);
	513
b910a9ce HG	514	switch (pmic->cht_wc_model) {
	515	case INTEL_CHT_WC_GPD_WIN_POCKET:
	516	/*
	517	* When a host-cable is detected the BIOS enables an external 5v boost
	518	* converter to power connected devices there are 2 problems with this:
	519	* 1) This gets seen by the external battery charger as a valid Vbus
	520	* supply and it then tries to feed Vsys from this creating a
	521	* feedback loop which causes aprox. 300 mA extra battery drain
	522	* (and unless we drive the external-charger-disable pin high it
	523	* also tries to charge the battery causing even more feedback).
	524	* 2) This gets seen by the pwrsrc block as a SDP USB Vbus supply
	525	* Since the external battery charger has its own 5v boost converter
	526	* which does not have these issues, we simply turn the separate
	527	* external 5v boost converter off and leave it off entirely.
	528	*/
	529	cht_wc_extcon_set_5v_boost(ext, false);
	530	break;
b7fa2cd3	531	case INTEL_CHT_WC_LENOVO_YOGABOOK1:
66e31186 HG	532	/* Do this first, as it may very well return -EPROBE_DEFER. */
	533	ret = cht_wc_extcon_get_role_sw_and_regulator(ext);
	534	if (ret)
	535	return ret;
	536	/*
	537	* The bq25890 used here relies on this driver's BC-1.2 charger
	538	* detection, and the bq25890 driver expect this info to be
	539	* available through a parent power_supply class device which
	540	* models the detected charger (idem to how the Type-C TCPM code
	541	* registers a power_supply classdev for the connected charger).
	542	*/
	543	ret = cht_wc_extcon_register_psy(ext);
	544	if (ret)
	545	return ret;
	546	break;
b7fa2cd3 HG	547	case INTEL_CHT_WC_XIAOMI_MIPAD2:
	548	ret = cht_wc_extcon_get_role_sw_and_regulator(ext);
	549	if (ret)
	550	return ret;
	551	break;
b910a9ce HG	552	default:
	553	break;
	554	}
585cb239	555
db0f3baa HG	556	/* Enable sw control */
	557	ret = cht_wc_extcon_sw_control(ext, true);
	558	if (ret)
a72a1be0 YK	559	goto disable_sw_control;
	560
	561	/* Disable charging by external battery charger */
	562	cht_wc_extcon_enable_charging(ext, false);
db0f3baa HG	563
	564	/* Register extcon device */
	565	ret = devm_extcon_dev_register(ext->dev, ext->edev);
	566	if (ret) {
	567	dev_err(ext->dev, "Error registering extcon device: %d\n", ret);
	568	goto disable_sw_control;
	569	}
	570
e81b8893 YK	571	ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_STS, &pwrsrc_sts);
	572	if (ret) {
	573	dev_err(ext->dev, "Error reading pwrsrc status: %d\n", ret);
	574	goto disable_sw_control;
	575	}
	576
	577	/*
	578	* If no USB host or device connected, route D+ and D- to PMIC for
	579	* initial charger detection
	580	*/
	581	id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
	582	if (id != INTEL_USB_ID_GND)
	583	cht_wc_extcon_set_phymux(ext, MUX_SEL_PMIC);
db0f3baa HG	584
	585	/* Get initial state */
	586	cht_wc_extcon_pwrsrc_event(ext);
	587
	588	ret = devm_request_threaded_irq(ext->dev, irq, NULL, cht_wc_extcon_isr,
	589	IRQF_ONESHOT, pdev->name, ext);
	590	if (ret) {
	591	dev_err(ext->dev, "Error requesting interrupt: %d\n", ret);
	592	goto disable_sw_control;
	593	}
	594
	595	/* Unmask irqs */
a4722503	596	ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ_MASK, mask);
db0f3baa HG	597	if (ret) {
	598	dev_err(ext->dev, "Error writing irq-mask: %d\n", ret);
	599	goto disable_sw_control;
	600	}
	601
	602	platform_set_drvdata(pdev, ext);
	603
	604	return 0;
	605
	606	disable_sw_control:
	607	cht_wc_extcon_sw_control(ext, false);
	608	return ret;
	609	}
	610
	611	static int cht_wc_extcon_remove(struct platform_device *pdev)
	612	{
	613	struct cht_wc_extcon_data *ext = platform_get_drvdata(pdev);
	614
	615	cht_wc_extcon_sw_control(ext, false);
	616
	617	return 0;
	618	}
	619
	620	static const struct platform_device_id cht_wc_extcon_table[] = {
	621	{ .name = "cht_wcove_pwrsrc" },
	622	{},
	623	};
	624	MODULE_DEVICE_TABLE(platform, cht_wc_extcon_table);
	625
	626	static struct platform_driver cht_wc_extcon_driver = {
	627	.probe = cht_wc_extcon_probe,
	628	.remove = cht_wc_extcon_remove,
	629	.id_table = cht_wc_extcon_table,
	630	.driver = {
	631	.name = "cht_wcove_pwrsrc",
	632	},
	633	};
	634	module_platform_driver(cht_wc_extcon_driver);
	635
	636	MODULE_DESCRIPTION("Intel Cherrytrail Whiskey Cove PMIC extcon driver");
	637	MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
	638	MODULE_LICENSE("GPL v2");