[linux-2.6-block.git] / drivers / edac / edac_pci.c

/*
 * EDAC PCI component
 *
 * Author: Dave Jiang <djiang@mvista.com>
 *
 * 2007 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 *
 */
#include <linux/module.h>
#include <linux/types.h>
#include <linux/smp.h>
#include <linux/init.h>
#include <linux/sysctl.h>
#include <linux/highmem.h>
#include <linux/timer.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/ctype.h>
#include <linux/workqueue.h>
#include <asm/uaccess.h>
#include <asm/page.h>

#include "edac_core.h"
#include "edac_module.h"

static DEFINE_MUTEX(edac_pci_ctls_mutex);
static LIST_HEAD(edac_pci_list);
static atomic_t pci_indexes = ATOMIC_INIT(0);

/*
 * edac_pci_alloc_ctl_info
 *
 *	The alloc() function for the 'edac_pci' control info
 *	structure. The chip driver will allocate one of these for each
 *	edac_pci it is going to control/register with the EDAC CORE.
 */
struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
						const char *edac_pci_name)
{
	struct edac_pci_ctl_info *pci;
	void *p = NULL, *pvt;
	unsigned int size;

	edac_dbg(1, "\n");

	pci = edac_align_ptr(&p, sizeof(*pci), 1);
	pvt = edac_align_ptr(&p, 1, sz_pvt);
	size = ((unsigned long)pvt) + sz_pvt;

	/* Alloc the needed control struct memory */
	pci = kzalloc(size, GFP_KERNEL);
	if (pci  == NULL)
		return NULL;

	/* Now much private space */
	pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;

	pci->pvt_info = pvt;
	pci->op_state = OP_ALLOC;

	snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);

	return pci;
}
EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);

/*
 * edac_pci_free_ctl_info()
 *
 *	Last action on the pci control structure.
 *
 *	call the remove sysfs information, which will unregister
 *	this control struct's kobj. When that kobj's ref count
 *	goes to zero, its release function will be call and then
 *	kfree() the memory.
 */
void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
{
	edac_dbg(1, "\n");

	edac_pci_remove_sysfs(pci);
}
EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);

/*
 * find_edac_pci_by_dev()
 * 	scans the edac_pci list for a specific 'struct device *'
 *
 *	return NULL if not found, or return control struct pointer
 */
static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
{
	struct edac_pci_ctl_info *pci;
	struct list_head *item;

	edac_dbg(1, "\n");

	list_for_each(item, &edac_pci_list) {
		pci = list_entry(item, struct edac_pci_ctl_info, link);

		if (pci->dev == dev)
			return pci;
	}

	return NULL;
}

/*
 * add_edac_pci_to_global_list
 * 	Before calling this function, caller must assign a unique value to
 * 	edac_dev->pci_idx.
 * 	Return:
 * 		0 on success
 * 		1 on failure
 */
static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
{
	struct list_head *item, *insert_before;
	struct edac_pci_ctl_info *rover;

	edac_dbg(1, "\n");

	insert_before = &edac_pci_list;

	/* Determine if already on the list */
	rover = find_edac_pci_by_dev(pci->dev);
	if (unlikely(rover != NULL))
		goto fail0;

	/* Insert in ascending order by 'pci_idx', so find position */
	list_for_each(item, &edac_pci_list) {
		rover = list_entry(item, struct edac_pci_ctl_info, link);

		if (rover->pci_idx >= pci->pci_idx) {
			if (unlikely(rover->pci_idx == pci->pci_idx))
				goto fail1;

			insert_before = item;
			break;
		}
	}

	list_add_tail_rcu(&pci->link, insert_before);
	return 0;

fail0:
	edac_printk(KERN_WARNING, EDAC_PCI,
		"%s (%s) %s %s already assigned %d\n",
		dev_name(rover->dev), edac_dev_name(rover),
		rover->mod_name, rover->ctl_name, rover->pci_idx);
	return 1;

fail1:
	edac_printk(KERN_WARNING, EDAC_PCI,
		"but in low-level driver: attempt to assign\n"
		"\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
		__func__);
	return 1;
}

/*
 * del_edac_pci_from_global_list
 *
 *	remove the PCI control struct from the global list
 */
static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
{
	list_del_rcu(&pci->link);

	/* these are for safe removal of devices from global list while
	 * NMI handlers may be traversing list
	 */
	synchronize_rcu();
	INIT_LIST_HEAD(&pci->link);
}

/*
 * edac_pci_workq_function()
 *
 * 	periodic function that performs the operation
 *	scheduled by a workq request, for a given PCI control struct
 */
static void edac_pci_workq_function(struct work_struct *work_req)
{
	struct delayed_work *d_work = to_delayed_work(work_req);
	struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
	int msec;
	unsigned long delay;

	edac_dbg(3, "checking\n");

	mutex_lock(&edac_pci_ctls_mutex);

	if (pci->op_state == OP_RUNNING_POLL) {
		/* we might be in POLL mode, but there may NOT be a poll func
		 */
		if ((pci->edac_check != NULL) && edac_pci_get_check_errors())
			pci->edac_check(pci);

		/* if we are on a one second period, then use round */
		msec = edac_pci_get_poll_msec();
		if (msec == 1000)
			delay = round_jiffies_relative(msecs_to_jiffies(msec));
		else
			delay = msecs_to_jiffies(msec);

		/* Reschedule only if we are in POLL mode */
		queue_delayed_work(edac_workqueue, &pci->work, delay);
	}

	mutex_unlock(&edac_pci_ctls_mutex);
}

/*
 * edac_pci_workq_setup()
 * 	initialize a workq item for this edac_pci instance
 * 	passing in the new delay period in msec
 *
 *	locking model:
 *		called when 'edac_pci_ctls_mutex' is locked
 */
static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
				 unsigned int msec)
{
	edac_dbg(0, "\n");

	INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
	queue_delayed_work(edac_workqueue, &pci->work,
			msecs_to_jiffies(edac_pci_get_poll_msec()));
}

/*
 * edac_pci_workq_teardown()
 * 	stop the workq processing on this edac_pci instance
 */
static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
{
	edac_dbg(0, "\n");

	pci->op_state = OP_OFFLINE;

	cancel_delayed_work_sync(&pci->work);
	flush_workqueue(edac_workqueue);
}

/*
 * edac_pci_reset_delay_period
 *
 *	called with a new period value for the workq period
 *	a) stop current workq timer
 *	b) restart workq timer with new value
 */
void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
				 unsigned long value)
{
	edac_dbg(0, "\n");

	edac_pci_workq_teardown(pci);

	/* need to lock for the setup */
	mutex_lock(&edac_pci_ctls_mutex);

	edac_pci_workq_setup(pci, value);

	mutex_unlock(&edac_pci_ctls_mutex);
}
EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period);

/*
 * edac_pci_alloc_index: Allocate a unique PCI index number
 *
 * Return:
 *      allocated index number
 *
 */
int edac_pci_alloc_index(void)
{
	return atomic_inc_return(&pci_indexes) - 1;
}
EXPORT_SYMBOL_GPL(edac_pci_alloc_index);

/*
 * edac_pci_add_device: Insert the 'edac_dev' structure into the
 * edac_pci global list and create sysfs entries associated with
 * edac_pci structure.
 * @pci: pointer to the edac_device structure to be added to the list
 * @edac_idx: A unique numeric identifier to be assigned to the
 * 'edac_pci' structure.
 *
 * Return:
 *      0       Success
 *      !0      Failure
 */
int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
{
	edac_dbg(0, "\n");

	pci->pci_idx = edac_idx;
	pci->start_time = jiffies;

	mutex_lock(&edac_pci_ctls_mutex);

	if (add_edac_pci_to_global_list(pci))
		goto fail0;

	if (edac_pci_create_sysfs(pci)) {
		edac_pci_printk(pci, KERN_WARNING,
				"failed to create sysfs pci\n");
		goto fail1;
	}

	if (pci->edac_check != NULL) {
		pci->op_state = OP_RUNNING_POLL;

		edac_pci_workq_setup(pci, 1000);
	} else {
		pci->op_state = OP_RUNNING_INTERRUPT;
	}

	edac_pci_printk(pci, KERN_INFO,
		"Giving out device to module %s controller %s: DEV %s (%s)\n",
		pci->mod_name, pci->ctl_name, pci->dev_name,
		edac_op_state_to_string(pci->op_state));

	mutex_unlock(&edac_pci_ctls_mutex);
	return 0;

	/* error unwind stack */
fail1:
	del_edac_pci_from_global_list(pci);
fail0:
	mutex_unlock(&edac_pci_ctls_mutex);
	return 1;
}
EXPORT_SYMBOL_GPL(edac_pci_add_device);

/*
 * edac_pci_del_device()
 * 	Remove sysfs entries for specified edac_pci structure and
 * 	then remove edac_pci structure from global list
 *
 * @dev:
 * 	Pointer to 'struct device' representing edac_pci structure
 * 	to remove
 *
 * Return:
 * 	Pointer to removed edac_pci structure,
 * 	or NULL if device not found
 */
struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
{
	struct edac_pci_ctl_info *pci;

	edac_dbg(0, "\n");

	mutex_lock(&edac_pci_ctls_mutex);

	/* ensure the control struct is on the global list
	 * if not, then leave
	 */
	pci = find_edac_pci_by_dev(dev);
	if (pci  == NULL) {
		mutex_unlock(&edac_pci_ctls_mutex);
		return NULL;
	}

	pci->op_state = OP_OFFLINE;

	del_edac_pci_from_global_list(pci);

	mutex_unlock(&edac_pci_ctls_mutex);

	/* stop the workq timer */
	edac_pci_workq_teardown(pci);

	edac_printk(KERN_INFO, EDAC_PCI,
		"Removed device %d for %s %s: DEV %s\n",
		pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));

	return pci;
}
EXPORT_SYMBOL_GPL(edac_pci_del_device);

/*
 * edac_pci_generic_check
 *
 *	a Generic parity check API
 */
static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
{
	edac_dbg(4, "\n");
	edac_pci_do_parity_check();
}

/* free running instance index counter */
static int edac_pci_idx;
#define EDAC_PCI_GENCTL_NAME	"EDAC PCI controller"

struct edac_pci_gen_data {
	int edac_idx;
};

/*
 * edac_pci_create_generic_ctl
 *
 *	A generic constructor for a PCI parity polling device
 *	Some systems have more than one domain of PCI busses.
 *	For systems with one domain, then this API will
 *	provide for a generic poller.
 *
 *	This routine calls the edac_pci_alloc_ctl_info() for
 *	the generic device, with default values
 */
struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
						const char *mod_name)
{
	struct edac_pci_ctl_info *pci;
	struct edac_pci_gen_data *pdata;

	pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
	if (!pci)
		return NULL;

	pdata = pci->pvt_info;
	pci->dev = dev;
	dev_set_drvdata(pci->dev, pci);
	pci->dev_name = pci_name(to_pci_dev(dev));

	pci->mod_name = mod_name;
	pci->ctl_name = EDAC_PCI_GENCTL_NAME;
	if (edac_op_state == EDAC_OPSTATE_POLL)
		pci->edac_check = edac_pci_generic_check;

	pdata->edac_idx = edac_pci_idx++;

	if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
		edac_dbg(3, "failed edac_pci_add_device()\n");
		edac_pci_free_ctl_info(pci);
		return NULL;
	}

	return pci;
}
EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);

/*
 * edac_pci_release_generic_ctl
 *
 *	The release function of a generic EDAC PCI polling device
 */
void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
{
	edac_dbg(0, "pci mod=%s\n", pci->mod_name);

	edac_pci_del_device(pci->dev);
	edac_pci_free_ctl_info(pci);
}
EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);
Commit	Line	Data
91b99041 DJ	1	/*
	2	* EDAC PCI component
	3	*
	4	* Author: Dave Jiang <djiang@mvista.com>
	5	*
	6	* 2007 (c) MontaVista Software, Inc. This file is licensed under
	7	* the terms of the GNU General Public License version 2. This program
	8	* is licensed "as is" without any warranty of any kind, whether express
	9	* or implied.
	10	*
	11	*/
	12	#include <linux/module.h>
	13	#include <linux/types.h>
	14	#include <linux/smp.h>
	15	#include <linux/init.h>
	16	#include <linux/sysctl.h>
	17	#include <linux/highmem.h>
	18	#include <linux/timer.h>
	19	#include <linux/slab.h>
	20	#include <linux/spinlock.h>
	21	#include <linux/list.h>
91b99041 DJ	22	#include <linux/ctype.h>
	23	#include <linux/workqueue.h>
	24	#include <asm/uaccess.h>
	25	#include <asm/page.h>
	26
	27	#include "edac_core.h"
	28	#include "edac_module.h"
	29
	30	static DEFINE_MUTEX(edac_pci_ctls_mutex);
ff6ac2a6	31	static LIST_HEAD(edac_pci_list);
8641a384	32	static atomic_t pci_indexes = ATOMIC_INIT(0);
91b99041	33
91b99041	34	/*
d4c1465b DT	35	* edac_pci_alloc_ctl_info
	36	*
	37	* The alloc() function for the 'edac_pci' control info
	38	* structure. The chip driver will allocate one of these for each
	39	* edac_pci it is going to control/register with the EDAC CORE.
91b99041	40	*/
079708b9	41	struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
052dfb45	42	const char *edac_pci_name)
91b99041 DJ	43	{
91b99041 DJ	44	struct edac_pci_ctl_info *pci;
93e4fe64	45	void p = NULL, pvt;
91b99041 DJ	46	unsigned int size;
91b99041 DJ	47
956b9ba1	48	edac_dbg(1, "\n");
d4c1465b	49
93e4fe64 MCC	50	pci = edac_align_ptr(&p, sizeof(*pci), 1);
93e4fe64 MCC	51	pvt = edac_align_ptr(&p, 1, sz_pvt);
91b99041 DJ	52	size = ((unsigned long)pvt) + sz_pvt;
91b99041 DJ	53
d4c1465b DT	54	/* Alloc the needed control struct memory */
	55	pci = kzalloc(size, GFP_KERNEL);
	56	if (pci == NULL)
91b99041 DJ	57	return NULL;
91b99041 DJ	58
d4c1465b	59	/* Now much private space */
91b99041 DJ	60	pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
	61
	62	pci->pvt_info = pvt;
91b99041 DJ	63	pci->op_state = OP_ALLOC;
91b99041 DJ	64
079708b9	65	snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
91b99041 DJ	66
	67	return pci;
	68	}
	69	EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
	70
	71	/*
	72	* edac_pci_free_ctl_info()
d4c1465b DT	73	*
	74	* Last action on the pci control structure.
	75	*
6f042b50	76	* call the remove sysfs information, which will unregister
d4c1465b DT	77	* this control struct's kobj. When that kobj's ref count
	78	* goes to zero, its release function will be call and then
	79	* kfree() the memory.
91b99041 DJ	80	*/
	81	void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
	82	{
956b9ba1	83	edac_dbg(1, "\n");
079708b9	84
d4c1465b DT	85	edac_pci_remove_sysfs(pci);
d4c1465b DT	86	}
91b99041 DJ	87	EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
	88
	89	/*
	90	* find_edac_pci_by_dev()
	91	* scans the edac_pci list for a specific 'struct device *'
d4c1465b DT	92	*
d4c1465b DT	93	* return NULL if not found, or return control struct pointer
91b99041	94	*/
079708b9	95	static struct edac_pci_ctl_info find_edac_pci_by_dev(struct device dev)
91b99041 DJ	96	{
	97	struct edac_pci_ctl_info *pci;
	98	struct list_head *item;
	99
956b9ba1	100	edac_dbg(1, "\n");
91b99041 DJ	101
	102	list_for_each(item, &edac_pci_list) {
	103	pci = list_entry(item, struct edac_pci_ctl_info, link);
	104
	105	if (pci->dev == dev)
	106	return pci;
	107	}
	108
	109	return NULL;
	110	}
	111
	112	/*
	113	* add_edac_pci_to_global_list
	114	* Before calling this function, caller must assign a unique value to
	115	* edac_dev->pci_idx.
	116	* Return:
	117	* 0 on success
	118	* 1 on failure
	119	*/
	120	static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
	121	{
	122	struct list_head item, insert_before;
	123	struct edac_pci_ctl_info *rover;
	124
956b9ba1	125	edac_dbg(1, "\n");
d4c1465b	126
91b99041 DJ	127	insert_before = &edac_pci_list;
	128
	129	/* Determine if already on the list */
d4c1465b DT	130	rover = find_edac_pci_by_dev(pci->dev);
d4c1465b DT	131	if (unlikely(rover != NULL))
91b99041 DJ	132	goto fail0;
	133
	134	/* Insert in ascending order by 'pci_idx', so find position */
	135	list_for_each(item, &edac_pci_list) {
	136	rover = list_entry(item, struct edac_pci_ctl_info, link);
	137
	138	if (rover->pci_idx >= pci->pci_idx) {
	139	if (unlikely(rover->pci_idx == pci->pci_idx))
	140	goto fail1;
	141
	142	insert_before = item;
	143	break;
	144	}
	145	}
	146
	147	list_add_tail_rcu(&pci->link, insert_before);
	148	return 0;
	149
052dfb45	150	fail0:
91b99041	151	edac_printk(KERN_WARNING, EDAC_PCI,
052dfb45	152	"%s (%s) %s %s already assigned %d\n",
281efb17	153	dev_name(rover->dev), edac_dev_name(rover),
052dfb45	154	rover->mod_name, rover->ctl_name, rover->pci_idx);
91b99041 DJ	155	return 1;
91b99041 DJ	156
052dfb45	157	fail1:
91b99041	158	edac_printk(KERN_WARNING, EDAC_PCI,
052dfb45 DT	159	"but in low-level driver: attempt to assign\n"
	160	"\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
	161	__func__);
91b99041 DJ	162	return 1;
	163	}
	164
91b99041 DJ	165	/*
91b99041 DJ	166	* del_edac_pci_from_global_list
d4c1465b DT	167	*
d4c1465b DT	168	* remove the PCI control struct from the global list
91b99041 DJ	169	*/
	170	static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
	171	{
	172	list_del_rcu(&pci->link);
e2e77098 LJ	173
	174	/* these are for safe removal of devices from global list while
	175	* NMI handlers may be traversing list
	176	*/
	177	synchronize_rcu();
	178	INIT_LIST_HEAD(&pci->link);
91b99041 DJ	179	}
91b99041 DJ	180
91b99041 DJ	181	/*
91b99041 DJ	182	* edac_pci_workq_function()
d4c1465b DT	183	*
	184	* periodic function that performs the operation
	185	* scheduled by a workq request, for a given PCI control struct
91b99041	186	*/
91b99041 DJ	187	static void edac_pci_workq_function(struct work_struct *work_req)
91b99041 DJ	188	{
fbeb4384	189	struct delayed_work *d_work = to_delayed_work(work_req);
91b99041	190	struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
d4c1465b DT	191	int msec;
d4c1465b DT	192	unsigned long delay;
91b99041	193
956b9ba1	194	edac_dbg(3, "checking\n");
91b99041	195
d4c1465b	196	mutex_lock(&edac_pci_ctls_mutex);
91b99041	197
d4c1465b DT	198	if (pci->op_state == OP_RUNNING_POLL) {
	199	/* we might be in POLL mode, but there may NOT be a poll func
	200	*/
	201	if ((pci->edac_check != NULL) && edac_pci_get_check_errors())
	202	pci->edac_check(pci);
	203
	204	/* if we are on a one second period, then use round */
	205	msec = edac_pci_get_poll_msec();
	206	if (msec == 1000)
c2ae24cf	207	delay = round_jiffies_relative(msecs_to_jiffies(msec));
d4c1465b DT	208	else
	209	delay = msecs_to_jiffies(msec);
	210
	211	/* Reschedule only if we are in POLL mode */
	212	queue_delayed_work(edac_workqueue, &pci->work, delay);
	213	}
91b99041	214
d4c1465b	215	mutex_unlock(&edac_pci_ctls_mutex);
91b99041 DJ	216	}
	217
	218	/*
	219	* edac_pci_workq_setup()
	220	* initialize a workq item for this edac_pci instance
	221	* passing in the new delay period in msec
d4c1465b DT	222	*
	223	* locking model:
	224	* called when 'edac_pci_ctls_mutex' is locked
91b99041 DJ	225	*/
91b99041 DJ	226	static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
079708b9	227	unsigned int msec)
91b99041	228	{
956b9ba1	229	edac_dbg(0, "\n");
91b99041	230
91b99041	231	INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
4de78c68	232	queue_delayed_work(edac_workqueue, &pci->work,
052dfb45	233	msecs_to_jiffies(edac_pci_get_poll_msec()));
91b99041 DJ	234	}
	235
	236	/*
	237	* edac_pci_workq_teardown()
	238	* stop the workq processing on this edac_pci instance
	239	*/
	240	static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
	241	{
956b9ba1	242	edac_dbg(0, "\n");
d4c1465b	243
fcd5c4dd BP	244	pci->op_state = OP_OFFLINE;
	245
	246	cancel_delayed_work_sync(&pci->work);
	247	flush_workqueue(edac_workqueue);
91b99041 DJ	248	}
	249
	250	/*
	251	* edac_pci_reset_delay_period
d4c1465b DT	252	*
	253	* called with a new period value for the workq period
	254	* a) stop current workq timer
	255	* b) restart workq timer with new value
91b99041 DJ	256	*/
91b99041 DJ	257	void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
079708b9	258	unsigned long value)
91b99041	259	{
956b9ba1	260	edac_dbg(0, "\n");
91b99041 DJ	261
	262	edac_pci_workq_teardown(pci);
	263
d4c1465b DT	264	/* need to lock for the setup */
	265	mutex_lock(&edac_pci_ctls_mutex);
	266
91b99041 DJ	267	edac_pci_workq_setup(pci, value);
91b99041 DJ	268
d4c1465b	269	mutex_unlock(&edac_pci_ctls_mutex);
91b99041 DJ	270	}
	271	EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period);
	272
8641a384 HC	273	/*
	274	* edac_pci_alloc_index: Allocate a unique PCI index number
	275	*
	276	* Return:
	277	* allocated index number
	278	*
	279	*/
	280	int edac_pci_alloc_index(void)
	281	{
	282	return atomic_inc_return(&pci_indexes) - 1;
	283	}
	284	EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
	285
91b99041 DJ	286	/*
	287	* edac_pci_add_device: Insert the 'edac_dev' structure into the
	288	* edac_pci global list and create sysfs entries associated with
	289	* edac_pci structure.
	290	* @pci: pointer to the edac_device structure to be added to the list
	291	* @edac_idx: A unique numeric identifier to be assigned to the
	292	* 'edac_pci' structure.
	293	*
	294	* Return:
	295	* 0 Success
	296	* !0 Failure
	297	*/
	298	int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
	299	{
956b9ba1	300	edac_dbg(0, "\n");
91b99041 DJ	301
91b99041 DJ	302	pci->pci_idx = edac_idx;
d4c1465b	303	pci->start_time = jiffies;
91b99041	304
d4c1465b	305	mutex_lock(&edac_pci_ctls_mutex);
91b99041 DJ	306
	307	if (add_edac_pci_to_global_list(pci))
	308	goto fail0;
	309
91b99041 DJ	310	if (edac_pci_create_sysfs(pci)) {
	311	edac_pci_printk(pci, KERN_WARNING,
	312	"failed to create sysfs pci\n");
	313	goto fail1;
	314	}
	315
	316	if (pci->edac_check != NULL) {
	317	pci->op_state = OP_RUNNING_POLL;
	318
	319	edac_pci_workq_setup(pci, 1000);
	320	} else {
	321	pci->op_state = OP_RUNNING_INTERRUPT;
	322	}
	323
	324	edac_pci_printk(pci, KERN_INFO,
7270a608 RR	325	"Giving out device to module %s controller %s: DEV %s (%s)\n",
	326	pci->mod_name, pci->ctl_name, pci->dev_name,
	327	edac_op_state_to_string(pci->op_state));
91b99041	328
d4c1465b	329	mutex_unlock(&edac_pci_ctls_mutex);
91b99041 DJ	330	return 0;
91b99041 DJ	331
d4c1465b	332	/* error unwind stack */
052dfb45	333	fail1:
91b99041	334	del_edac_pci_from_global_list(pci);
052dfb45	335	fail0:
d4c1465b	336	mutex_unlock(&edac_pci_ctls_mutex);
91b99041 DJ	337	return 1;
	338	}
	339	EXPORT_SYMBOL_GPL(edac_pci_add_device);
	340
	341	/*
	342	* edac_pci_del_device()
	343	* Remove sysfs entries for specified edac_pci structure and
	344	* then remove edac_pci structure from global list
	345	*
	346	* @dev:
	347	* Pointer to 'struct device' representing edac_pci structure
	348	* to remove
	349	*
	350	* Return:
	351	* Pointer to removed edac_pci structure,
	352	* or NULL if device not found
	353	*/
079708b9	354	struct edac_pci_ctl_info edac_pci_del_device(struct device dev)
91b99041 DJ	355	{
	356	struct edac_pci_ctl_info *pci;
	357
956b9ba1	358	edac_dbg(0, "\n");
91b99041	359
d4c1465b	360	mutex_lock(&edac_pci_ctls_mutex);
91b99041	361
d4c1465b DT	362	/* ensure the control struct is on the global list
	363	* if not, then leave
	364	*/
	365	pci = find_edac_pci_by_dev(dev);
	366	if (pci == NULL) {
	367	mutex_unlock(&edac_pci_ctls_mutex);
91b99041 DJ	368	return NULL;
	369	}
	370
	371	pci->op_state = OP_OFFLINE;
	372
91b99041 DJ	373	del_edac_pci_from_global_list(pci);
91b99041 DJ	374
d4c1465b DT	375	mutex_unlock(&edac_pci_ctls_mutex);
	376
	377	/* stop the workq timer */
	378	edac_pci_workq_teardown(pci);
91b99041 DJ	379
91b99041 DJ	380	edac_printk(KERN_INFO, EDAC_PCI,
052dfb45	381	"Removed device %d for %s %s: DEV %s\n",
17aa7e03	382	pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
91b99041 DJ	383
	384	return pci;
	385	}
	386	EXPORT_SYMBOL_GPL(edac_pci_del_device);
	387
d4c1465b DT	388	/*
	389	* edac_pci_generic_check
	390	*
	391	* a Generic parity check API
	392	*/
1a45027d	393	static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
91b99041	394	{
956b9ba1	395	edac_dbg(4, "\n");
91b99041 DJ	396	edac_pci_do_parity_check();
	397	}
	398
d4c1465b	399	/* free running instance index counter */
f044091c	400	static int edac_pci_idx;
91b99041 DJ	401	#define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
	402
	403	struct edac_pci_gen_data {
	404	int edac_idx;
	405	};
	406
d4c1465b DT	407	/*
	408	* edac_pci_create_generic_ctl
	409	*
	410	* A generic constructor for a PCI parity polling device
	411	* Some systems have more than one domain of PCI busses.
	412	* For systems with one domain, then this API will
	413	* provide for a generic poller.
	414	*
	415	* This routine calls the edac_pci_alloc_ctl_info() for
	416	* the generic device, with default values
	417	*/
079708b9	418	struct edac_pci_ctl_info edac_pci_create_generic_ctl(struct device dev,
052dfb45	419	const char *mod_name)
91b99041 DJ	420	{
	421	struct edac_pci_ctl_info *pci;
	422	struct edac_pci_gen_data *pdata;
	423
	424	pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
	425	if (!pci)
	426	return NULL;
	427
	428	pdata = pci->pvt_info;
	429	pci->dev = dev;
	430	dev_set_drvdata(pci->dev, pci);
	431	pci->dev_name = pci_name(to_pci_dev(dev));
	432
	433	pci->mod_name = mod_name;
	434	pci->ctl_name = EDAC_PCI_GENCTL_NAME;
876bb331 BP	435	if (edac_op_state == EDAC_OPSTATE_POLL)
876bb331 BP	436	pci->edac_check = edac_pci_generic_check;
91b99041 DJ	437
	438	pdata->edac_idx = edac_pci_idx++;
	439
	440	if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
956b9ba1	441	edac_dbg(3, "failed edac_pci_add_device()\n");
91b99041 DJ	442	edac_pci_free_ctl_info(pci);
	443	return NULL;
	444	}
	445
	446	return pci;
	447	}
	448	EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
	449
d4c1465b DT	450	/*
	451	* edac_pci_release_generic_ctl
	452	*
	453	* The release function of a generic EDAC PCI polling device
	454	*/
91b99041 DJ	455	void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
91b99041 DJ	456	{
956b9ba1	457	edac_dbg(0, "pci mod=%s\n", pci->mod_name);
d4c1465b	458
91b99041 DJ	459	edac_pci_del_device(pci->dev);
	460	edac_pci_free_ctl_info(pci);
	461	}
	462	EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);