Merge branch 'drm/adv7511' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux...
[linux-2.6-block.git] / drivers / edac / edac_pci.c
CommitLineData
91b99041
DJ
1/*
2 * EDAC PCI component
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12#include <linux/module.h>
13#include <linux/types.h>
14#include <linux/smp.h>
15#include <linux/init.h>
16#include <linux/sysctl.h>
17#include <linux/highmem.h>
18#include <linux/timer.h>
19#include <linux/slab.h>
20#include <linux/spinlock.h>
21#include <linux/list.h>
91b99041
DJ
22#include <linux/ctype.h>
23#include <linux/workqueue.h>
24#include <asm/uaccess.h>
25#include <asm/page.h>
26
27#include "edac_core.h"
28#include "edac_module.h"
29
30static DEFINE_MUTEX(edac_pci_ctls_mutex);
ff6ac2a6 31static LIST_HEAD(edac_pci_list);
8641a384 32static atomic_t pci_indexes = ATOMIC_INIT(0);
91b99041 33
91b99041 34/*
d4c1465b
DT
35 * edac_pci_alloc_ctl_info
36 *
37 * The alloc() function for the 'edac_pci' control info
38 * structure. The chip driver will allocate one of these for each
39 * edac_pci it is going to control/register with the EDAC CORE.
91b99041 40 */
079708b9 41struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
052dfb45 42 const char *edac_pci_name)
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DJ
43{
44 struct edac_pci_ctl_info *pci;
93e4fe64 45 void *p = NULL, *pvt;
91b99041
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46 unsigned int size;
47
956b9ba1 48 edac_dbg(1, "\n");
d4c1465b 49
93e4fe64
MCC
50 pci = edac_align_ptr(&p, sizeof(*pci), 1);
51 pvt = edac_align_ptr(&p, 1, sz_pvt);
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52 size = ((unsigned long)pvt) + sz_pvt;
53
d4c1465b
DT
54 /* Alloc the needed control struct memory */
55 pci = kzalloc(size, GFP_KERNEL);
56 if (pci == NULL)
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57 return NULL;
58
d4c1465b 59 /* Now much private space */
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60 pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
61
62 pci->pvt_info = pvt;
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63 pci->op_state = OP_ALLOC;
64
079708b9 65 snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
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66
67 return pci;
68}
69EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
70
71/*
72 * edac_pci_free_ctl_info()
d4c1465b
DT
73 *
74 * Last action on the pci control structure.
75 *
6f042b50 76 * call the remove sysfs information, which will unregister
d4c1465b
DT
77 * this control struct's kobj. When that kobj's ref count
78 * goes to zero, its release function will be call and then
79 * kfree() the memory.
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80 */
81void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
82{
956b9ba1 83 edac_dbg(1, "\n");
079708b9 84
d4c1465b
DT
85 edac_pci_remove_sysfs(pci);
86}
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87EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
88
89/*
90 * find_edac_pci_by_dev()
91 * scans the edac_pci list for a specific 'struct device *'
d4c1465b
DT
92 *
93 * return NULL if not found, or return control struct pointer
91b99041 94 */
079708b9 95static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
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DJ
96{
97 struct edac_pci_ctl_info *pci;
98 struct list_head *item;
99
956b9ba1 100 edac_dbg(1, "\n");
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101
102 list_for_each(item, &edac_pci_list) {
103 pci = list_entry(item, struct edac_pci_ctl_info, link);
104
105 if (pci->dev == dev)
106 return pci;
107 }
108
109 return NULL;
110}
111
112/*
113 * add_edac_pci_to_global_list
114 * Before calling this function, caller must assign a unique value to
115 * edac_dev->pci_idx.
116 * Return:
117 * 0 on success
118 * 1 on failure
119 */
120static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
121{
122 struct list_head *item, *insert_before;
123 struct edac_pci_ctl_info *rover;
124
956b9ba1 125 edac_dbg(1, "\n");
d4c1465b 126
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127 insert_before = &edac_pci_list;
128
129 /* Determine if already on the list */
d4c1465b
DT
130 rover = find_edac_pci_by_dev(pci->dev);
131 if (unlikely(rover != NULL))
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132 goto fail0;
133
134 /* Insert in ascending order by 'pci_idx', so find position */
135 list_for_each(item, &edac_pci_list) {
136 rover = list_entry(item, struct edac_pci_ctl_info, link);
137
138 if (rover->pci_idx >= pci->pci_idx) {
139 if (unlikely(rover->pci_idx == pci->pci_idx))
140 goto fail1;
141
142 insert_before = item;
143 break;
144 }
145 }
146
147 list_add_tail_rcu(&pci->link, insert_before);
148 return 0;
149
052dfb45 150fail0:
91b99041 151 edac_printk(KERN_WARNING, EDAC_PCI,
052dfb45 152 "%s (%s) %s %s already assigned %d\n",
281efb17 153 dev_name(rover->dev), edac_dev_name(rover),
052dfb45 154 rover->mod_name, rover->ctl_name, rover->pci_idx);
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155 return 1;
156
052dfb45 157fail1:
91b99041 158 edac_printk(KERN_WARNING, EDAC_PCI,
052dfb45
DT
159 "but in low-level driver: attempt to assign\n"
160 "\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
161 __func__);
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162 return 1;
163}
164
91b99041
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165/*
166 * del_edac_pci_from_global_list
d4c1465b
DT
167 *
168 * remove the PCI control struct from the global list
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169 */
170static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
171{
172 list_del_rcu(&pci->link);
e2e77098
LJ
173
174 /* these are for safe removal of devices from global list while
175 * NMI handlers may be traversing list
176 */
177 synchronize_rcu();
178 INIT_LIST_HEAD(&pci->link);
91b99041
DJ
179}
180
91b99041
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181/*
182 * edac_pci_workq_function()
d4c1465b
DT
183 *
184 * periodic function that performs the operation
185 * scheduled by a workq request, for a given PCI control struct
91b99041 186 */
91b99041
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187static void edac_pci_workq_function(struct work_struct *work_req)
188{
fbeb4384 189 struct delayed_work *d_work = to_delayed_work(work_req);
91b99041 190 struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
d4c1465b
DT
191 int msec;
192 unsigned long delay;
91b99041 193
956b9ba1 194 edac_dbg(3, "checking\n");
91b99041 195
d4c1465b 196 mutex_lock(&edac_pci_ctls_mutex);
91b99041 197
d4c1465b
DT
198 if (pci->op_state == OP_RUNNING_POLL) {
199 /* we might be in POLL mode, but there may NOT be a poll func
200 */
201 if ((pci->edac_check != NULL) && edac_pci_get_check_errors())
202 pci->edac_check(pci);
203
204 /* if we are on a one second period, then use round */
205 msec = edac_pci_get_poll_msec();
206 if (msec == 1000)
c2ae24cf 207 delay = round_jiffies_relative(msecs_to_jiffies(msec));
d4c1465b
DT
208 else
209 delay = msecs_to_jiffies(msec);
210
211 /* Reschedule only if we are in POLL mode */
c4cf3b45 212 edac_queue_work(&pci->work, delay);
d4c1465b 213 }
91b99041 214
d4c1465b 215 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
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216}
217
218/*
219 * edac_pci_workq_setup()
220 * initialize a workq item for this edac_pci instance
221 * passing in the new delay period in msec
d4c1465b
DT
222 *
223 * locking model:
224 * called when 'edac_pci_ctls_mutex' is locked
91b99041
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225 */
226static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
079708b9 227 unsigned int msec)
91b99041 228{
956b9ba1 229 edac_dbg(0, "\n");
91b99041 230
91b99041 231 INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
c4cf3b45
BP
232
233 edac_queue_work(&pci->work, msecs_to_jiffies(edac_pci_get_poll_msec()));
91b99041
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234}
235
236/*
237 * edac_pci_workq_teardown()
238 * stop the workq processing on this edac_pci instance
239 */
240static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
241{
956b9ba1 242 edac_dbg(0, "\n");
d4c1465b 243
fcd5c4dd
BP
244 pci->op_state = OP_OFFLINE;
245
c4cf3b45 246 edac_stop_work(&pci->work);
91b99041 247}
91b99041 248
8641a384
HC
249/*
250 * edac_pci_alloc_index: Allocate a unique PCI index number
251 *
252 * Return:
253 * allocated index number
254 *
255 */
256int edac_pci_alloc_index(void)
257{
258 return atomic_inc_return(&pci_indexes) - 1;
259}
260EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
261
91b99041
DJ
262/*
263 * edac_pci_add_device: Insert the 'edac_dev' structure into the
264 * edac_pci global list and create sysfs entries associated with
265 * edac_pci structure.
266 * @pci: pointer to the edac_device structure to be added to the list
267 * @edac_idx: A unique numeric identifier to be assigned to the
268 * 'edac_pci' structure.
269 *
270 * Return:
271 * 0 Success
272 * !0 Failure
273 */
274int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
275{
956b9ba1 276 edac_dbg(0, "\n");
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277
278 pci->pci_idx = edac_idx;
d4c1465b 279 pci->start_time = jiffies;
91b99041 280
d4c1465b 281 mutex_lock(&edac_pci_ctls_mutex);
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282
283 if (add_edac_pci_to_global_list(pci))
284 goto fail0;
285
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286 if (edac_pci_create_sysfs(pci)) {
287 edac_pci_printk(pci, KERN_WARNING,
288 "failed to create sysfs pci\n");
289 goto fail1;
290 }
291
292 if (pci->edac_check != NULL) {
293 pci->op_state = OP_RUNNING_POLL;
294
295 edac_pci_workq_setup(pci, 1000);
296 } else {
297 pci->op_state = OP_RUNNING_INTERRUPT;
298 }
299
300 edac_pci_printk(pci, KERN_INFO,
7270a608
RR
301 "Giving out device to module %s controller %s: DEV %s (%s)\n",
302 pci->mod_name, pci->ctl_name, pci->dev_name,
303 edac_op_state_to_string(pci->op_state));
91b99041 304
d4c1465b 305 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
DJ
306 return 0;
307
d4c1465b 308 /* error unwind stack */
052dfb45 309fail1:
91b99041 310 del_edac_pci_from_global_list(pci);
052dfb45 311fail0:
d4c1465b 312 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
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313 return 1;
314}
315EXPORT_SYMBOL_GPL(edac_pci_add_device);
316
317/*
318 * edac_pci_del_device()
319 * Remove sysfs entries for specified edac_pci structure and
320 * then remove edac_pci structure from global list
321 *
322 * @dev:
323 * Pointer to 'struct device' representing edac_pci structure
324 * to remove
325 *
326 * Return:
327 * Pointer to removed edac_pci structure,
328 * or NULL if device not found
329 */
079708b9 330struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
91b99041
DJ
331{
332 struct edac_pci_ctl_info *pci;
333
956b9ba1 334 edac_dbg(0, "\n");
91b99041 335
d4c1465b 336 mutex_lock(&edac_pci_ctls_mutex);
91b99041 337
d4c1465b
DT
338 /* ensure the control struct is on the global list
339 * if not, then leave
340 */
341 pci = find_edac_pci_by_dev(dev);
342 if (pci == NULL) {
343 mutex_unlock(&edac_pci_ctls_mutex);
91b99041
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344 return NULL;
345 }
346
347 pci->op_state = OP_OFFLINE;
348
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349 del_edac_pci_from_global_list(pci);
350
d4c1465b
DT
351 mutex_unlock(&edac_pci_ctls_mutex);
352
353 /* stop the workq timer */
354 edac_pci_workq_teardown(pci);
91b99041
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355
356 edac_printk(KERN_INFO, EDAC_PCI,
052dfb45 357 "Removed device %d for %s %s: DEV %s\n",
17aa7e03 358 pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
91b99041
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359
360 return pci;
361}
362EXPORT_SYMBOL_GPL(edac_pci_del_device);
363
d4c1465b
DT
364/*
365 * edac_pci_generic_check
366 *
367 * a Generic parity check API
368 */
1a45027d 369static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
91b99041 370{
956b9ba1 371 edac_dbg(4, "\n");
91b99041
DJ
372 edac_pci_do_parity_check();
373}
374
d4c1465b 375/* free running instance index counter */
f044091c 376static int edac_pci_idx;
91b99041
DJ
377#define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
378
379struct edac_pci_gen_data {
380 int edac_idx;
381};
382
d4c1465b
DT
383/*
384 * edac_pci_create_generic_ctl
385 *
386 * A generic constructor for a PCI parity polling device
387 * Some systems have more than one domain of PCI busses.
388 * For systems with one domain, then this API will
389 * provide for a generic poller.
390 *
391 * This routine calls the edac_pci_alloc_ctl_info() for
392 * the generic device, with default values
393 */
079708b9 394struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
052dfb45 395 const char *mod_name)
91b99041
DJ
396{
397 struct edac_pci_ctl_info *pci;
398 struct edac_pci_gen_data *pdata;
399
400 pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
401 if (!pci)
402 return NULL;
403
404 pdata = pci->pvt_info;
405 pci->dev = dev;
406 dev_set_drvdata(pci->dev, pci);
407 pci->dev_name = pci_name(to_pci_dev(dev));
408
409 pci->mod_name = mod_name;
410 pci->ctl_name = EDAC_PCI_GENCTL_NAME;
876bb331
BP
411 if (edac_op_state == EDAC_OPSTATE_POLL)
412 pci->edac_check = edac_pci_generic_check;
91b99041
DJ
413
414 pdata->edac_idx = edac_pci_idx++;
415
416 if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
956b9ba1 417 edac_dbg(3, "failed edac_pci_add_device()\n");
91b99041
DJ
418 edac_pci_free_ctl_info(pci);
419 return NULL;
420 }
421
422 return pci;
423}
424EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
425
d4c1465b
DT
426/*
427 * edac_pci_release_generic_ctl
428 *
429 * The release function of a generic EDAC PCI polling device
430 */
91b99041
DJ
431void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
432{
956b9ba1 433 edac_dbg(0, "pci mod=%s\n", pci->mod_name);
d4c1465b 434
91b99041
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435 edac_pci_del_device(pci->dev);
436 edac_pci_free_ctl_info(pci);
437}
438EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);