Commit | Line | Data |
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b3dfbdf2 | 1 | /* |
f54d1867 | 2 | * dma-fence-array: aggregate fences to be waited together |
b3dfbdf2 GP |
3 | * |
4 | * Copyright (C) 2016 Collabora Ltd | |
5 | * Copyright (C) 2016 Advanced Micro Devices, Inc. | |
6 | * Authors: | |
7 | * Gustavo Padovan <gustavo@padovan.org> | |
8 | * Christian König <christian.koenig@amd.com> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License version 2 as published by | |
12 | * the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
15 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
16 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
17 | * more details. | |
18 | */ | |
19 | ||
20 | #include <linux/export.h> | |
21 | #include <linux/slab.h> | |
f54d1867 | 22 | #include <linux/dma-fence-array.h> |
b3dfbdf2 | 23 | |
f54d1867 | 24 | static const char *dma_fence_array_get_driver_name(struct dma_fence *fence) |
b3dfbdf2 | 25 | { |
f54d1867 | 26 | return "dma_fence_array"; |
b3dfbdf2 GP |
27 | } |
28 | ||
f54d1867 | 29 | static const char *dma_fence_array_get_timeline_name(struct dma_fence *fence) |
b3dfbdf2 GP |
30 | { |
31 | return "unbound"; | |
32 | } | |
33 | ||
03e4e0a9 CW |
34 | static void irq_dma_fence_array_work(struct irq_work *wrk) |
35 | { | |
36 | struct dma_fence_array *array = container_of(wrk, typeof(*array), work); | |
37 | ||
38 | dma_fence_signal(&array->base); | |
39 | dma_fence_put(&array->base); | |
40 | } | |
41 | ||
f54d1867 CW |
42 | static void dma_fence_array_cb_func(struct dma_fence *f, |
43 | struct dma_fence_cb *cb) | |
b3dfbdf2 | 44 | { |
f54d1867 CW |
45 | struct dma_fence_array_cb *array_cb = |
46 | container_of(cb, struct dma_fence_array_cb, cb); | |
47 | struct dma_fence_array *array = array_cb->array; | |
b3dfbdf2 GP |
48 | |
49 | if (atomic_dec_and_test(&array->num_pending)) | |
03e4e0a9 CW |
50 | irq_work_queue(&array->work); |
51 | else | |
52 | dma_fence_put(&array->base); | |
b3dfbdf2 GP |
53 | } |
54 | ||
f54d1867 | 55 | static bool dma_fence_array_enable_signaling(struct dma_fence *fence) |
b3dfbdf2 | 56 | { |
f54d1867 CW |
57 | struct dma_fence_array *array = to_dma_fence_array(fence); |
58 | struct dma_fence_array_cb *cb = (void *)(&array[1]); | |
b3dfbdf2 GP |
59 | unsigned i; |
60 | ||
61 | for (i = 0; i < array->num_fences; ++i) { | |
62 | cb[i].array = array; | |
f7104568 CK |
63 | /* |
64 | * As we may report that the fence is signaled before all | |
65 | * callbacks are complete, we need to take an additional | |
66 | * reference count on the array so that we do not free it too | |
67 | * early. The core fence handling will only hold the reference | |
68 | * until we signal the array as complete (but that is now | |
69 | * insufficient). | |
70 | */ | |
f54d1867 CW |
71 | dma_fence_get(&array->base); |
72 | if (dma_fence_add_callback(array->fences[i], &cb[i].cb, | |
73 | dma_fence_array_cb_func)) { | |
74 | dma_fence_put(&array->base); | |
b3dfbdf2 GP |
75 | if (atomic_dec_and_test(&array->num_pending)) |
76 | return false; | |
f7104568 | 77 | } |
b3dfbdf2 GP |
78 | } |
79 | ||
80 | return true; | |
81 | } | |
82 | ||
f54d1867 | 83 | static bool dma_fence_array_signaled(struct dma_fence *fence) |
b3dfbdf2 | 84 | { |
f54d1867 | 85 | struct dma_fence_array *array = to_dma_fence_array(fence); |
b3dfbdf2 | 86 | |
f7104568 | 87 | return atomic_read(&array->num_pending) <= 0; |
b3dfbdf2 GP |
88 | } |
89 | ||
f54d1867 | 90 | static void dma_fence_array_release(struct dma_fence *fence) |
b3dfbdf2 | 91 | { |
f54d1867 | 92 | struct dma_fence_array *array = to_dma_fence_array(fence); |
b3dfbdf2 GP |
93 | unsigned i; |
94 | ||
95 | for (i = 0; i < array->num_fences; ++i) | |
f54d1867 | 96 | dma_fence_put(array->fences[i]); |
b3dfbdf2 GP |
97 | |
98 | kfree(array->fences); | |
f54d1867 | 99 | dma_fence_free(fence); |
b3dfbdf2 GP |
100 | } |
101 | ||
f54d1867 CW |
102 | const struct dma_fence_ops dma_fence_array_ops = { |
103 | .get_driver_name = dma_fence_array_get_driver_name, | |
104 | .get_timeline_name = dma_fence_array_get_timeline_name, | |
105 | .enable_signaling = dma_fence_array_enable_signaling, | |
106 | .signaled = dma_fence_array_signaled, | |
f54d1867 | 107 | .release = dma_fence_array_release, |
b3dfbdf2 | 108 | }; |
f54d1867 | 109 | EXPORT_SYMBOL(dma_fence_array_ops); |
b3dfbdf2 GP |
110 | |
111 | /** | |
f54d1867 | 112 | * dma_fence_array_create - Create a custom fence array |
f7104568 CK |
113 | * @num_fences: [in] number of fences to add in the array |
114 | * @fences: [in] array containing the fences | |
115 | * @context: [in] fence context to use | |
116 | * @seqno: [in] sequence number to use | |
68acb6af | 117 | * @signal_on_any: [in] signal on any fence in the array |
b3dfbdf2 | 118 | * |
f54d1867 CW |
119 | * Allocate a dma_fence_array object and initialize the base fence with |
120 | * dma_fence_init(). | |
b3dfbdf2 GP |
121 | * In case of error it returns NULL. |
122 | * | |
68acb6af | 123 | * The caller should allocate the fences array with num_fences size |
b3dfbdf2 | 124 | * and fill it with the fences it wants to add to the object. Ownership of this |
f54d1867 | 125 | * array is taken and dma_fence_put() is used on each fence on release. |
f7104568 CK |
126 | * |
127 | * If @signal_on_any is true the fence array signals if any fence in the array | |
128 | * signals, otherwise it signals when all fences in the array signal. | |
b3dfbdf2 | 129 | */ |
f54d1867 CW |
130 | struct dma_fence_array *dma_fence_array_create(int num_fences, |
131 | struct dma_fence **fences, | |
132 | u64 context, unsigned seqno, | |
133 | bool signal_on_any) | |
b3dfbdf2 | 134 | { |
f54d1867 | 135 | struct dma_fence_array *array; |
b3dfbdf2 GP |
136 | size_t size = sizeof(*array); |
137 | ||
138 | /* Allocate the callback structures behind the array. */ | |
f54d1867 | 139 | size += num_fences * sizeof(struct dma_fence_array_cb); |
b3dfbdf2 GP |
140 | array = kzalloc(size, GFP_KERNEL); |
141 | if (!array) | |
142 | return NULL; | |
143 | ||
144 | spin_lock_init(&array->lock); | |
f54d1867 CW |
145 | dma_fence_init(&array->base, &dma_fence_array_ops, &array->lock, |
146 | context, seqno); | |
03e4e0a9 | 147 | init_irq_work(&array->work, irq_dma_fence_array_work); |
b3dfbdf2 GP |
148 | |
149 | array->num_fences = num_fences; | |
f7104568 | 150 | atomic_set(&array->num_pending, signal_on_any ? 1 : num_fences); |
b3dfbdf2 GP |
151 | array->fences = fences; |
152 | ||
153 | return array; | |
154 | } | |
f54d1867 | 155 | EXPORT_SYMBOL(dma_fence_array_create); |
d5b72a21 PZ |
156 | |
157 | /** | |
158 | * dma_fence_match_context - Check if all fences are from the given context | |
159 | * @fence: [in] fence or fence array | |
160 | * @context: [in] fence context to check all fences against | |
161 | * | |
162 | * Checks the provided fence or, for a fence array, all fences in the array | |
163 | * against the given context. Returns false if any fence is from a different | |
164 | * context. | |
165 | */ | |
166 | bool dma_fence_match_context(struct dma_fence *fence, u64 context) | |
167 | { | |
168 | struct dma_fence_array *array = to_dma_fence_array(fence); | |
169 | unsigned i; | |
170 | ||
171 | if (!dma_fence_is_array(fence)) | |
172 | return fence->context == context; | |
173 | ||
174 | for (i = 0; i < array->num_fences; i++) { | |
175 | if (array->fences[i]->context != context) | |
176 | return false; | |
177 | } | |
178 | ||
179 | return true; | |
180 | } | |
181 | EXPORT_SYMBOL(dma_fence_match_context); |