dma: sh: use an integer slave ID to improve API compatibility
[linux-2.6-block.git] / drivers / dma / sh / shdma-base.c
CommitLineData
9a7b8e00
GL
1/*
2 * Dmaengine driver base library for DMA controllers, found on SH-based SoCs
3 *
4 * extracted from shdma.c
5 *
6 * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
7 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
9 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
10 *
11 * This is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/delay.h>
17#include <linux/shdma-base.h>
18#include <linux/dmaengine.h>
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/module.h>
22#include <linux/pm_runtime.h>
23#include <linux/slab.h>
24#include <linux/spinlock.h>
25
26#include "../dmaengine.h"
27
28/* DMA descriptor control */
29enum shdma_desc_status {
30 DESC_IDLE,
31 DESC_PREPARED,
32 DESC_SUBMITTED,
33 DESC_COMPLETED, /* completed, have to call callback */
34 DESC_WAITING, /* callback called, waiting for ack / re-submit */
35};
36
37#define NR_DESCS_PER_CHANNEL 32
38
39#define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
40#define to_shdma_dev(d) container_of(d, struct shdma_dev, dma_dev)
41
42/*
43 * For slave DMA we assume, that there is a finite number of DMA slaves in the
44 * system, and that each such slave can only use a finite number of channels.
45 * We use slave channel IDs to make sure, that no such slave channel ID is
46 * allocated more than once.
47 */
48static unsigned int slave_num = 256;
49module_param(slave_num, uint, 0444);
50
51/* A bitmask with slave_num bits */
52static unsigned long *shdma_slave_used;
53
54/* Called under spin_lock_irq(&schan->chan_lock") */
55static void shdma_chan_xfer_ld_queue(struct shdma_chan *schan)
56{
57 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
58 const struct shdma_ops *ops = sdev->ops;
59 struct shdma_desc *sdesc;
60
61 /* DMA work check */
62 if (ops->channel_busy(schan))
63 return;
64
65 /* Find the first not transferred descriptor */
66 list_for_each_entry(sdesc, &schan->ld_queue, node)
67 if (sdesc->mark == DESC_SUBMITTED) {
68 ops->start_xfer(schan, sdesc);
69 break;
70 }
71}
72
73static dma_cookie_t shdma_tx_submit(struct dma_async_tx_descriptor *tx)
74{
75 struct shdma_desc *chunk, *c, *desc =
76 container_of(tx, struct shdma_desc, async_tx),
77 *last = desc;
78 struct shdma_chan *schan = to_shdma_chan(tx->chan);
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79 dma_async_tx_callback callback = tx->callback;
80 dma_cookie_t cookie;
81 bool power_up;
82
83 spin_lock_irq(&schan->chan_lock);
84
85 power_up = list_empty(&schan->ld_queue);
86
87 cookie = dma_cookie_assign(tx);
88
89 /* Mark all chunks of this descriptor as submitted, move to the queue */
90 list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
91 /*
92 * All chunks are on the global ld_free, so, we have to find
93 * the end of the chain ourselves
94 */
95 if (chunk != desc && (chunk->mark == DESC_IDLE ||
96 chunk->async_tx.cookie > 0 ||
97 chunk->async_tx.cookie == -EBUSY ||
98 &chunk->node == &schan->ld_free))
99 break;
100 chunk->mark = DESC_SUBMITTED;
101 /* Callback goes to the last chunk */
102 chunk->async_tx.callback = NULL;
103 chunk->cookie = cookie;
104 list_move_tail(&chunk->node, &schan->ld_queue);
105 last = chunk;
106
107 dev_dbg(schan->dev, "submit #%d@%p on %d\n",
108 tx->cookie, &last->async_tx, schan->id);
109 }
110
111 last->async_tx.callback = callback;
112 last->async_tx.callback_param = tx->callback_param;
113
114 if (power_up) {
115 int ret;
116 schan->pm_state = SHDMA_PM_BUSY;
117
118 ret = pm_runtime_get(schan->dev);
119
120 spin_unlock_irq(&schan->chan_lock);
121 if (ret < 0)
122 dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);
123
124 pm_runtime_barrier(schan->dev);
125
126 spin_lock_irq(&schan->chan_lock);
127
128 /* Have we been reset, while waiting? */
129 if (schan->pm_state != SHDMA_PM_ESTABLISHED) {
130 struct shdma_dev *sdev =
131 to_shdma_dev(schan->dma_chan.device);
132 const struct shdma_ops *ops = sdev->ops;
133 dev_dbg(schan->dev, "Bring up channel %d\n",
134 schan->id);
135 /*
136 * TODO: .xfer_setup() might fail on some platforms.
137 * Make it int then, on error remove chunks from the
138 * queue again
139 */
c2cdb7e4 140 ops->setup_xfer(schan, schan->slave_id);
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141
142 if (schan->pm_state == SHDMA_PM_PENDING)
143 shdma_chan_xfer_ld_queue(schan);
144 schan->pm_state = SHDMA_PM_ESTABLISHED;
145 }
146 } else {
147 /*
148 * Tell .device_issue_pending() not to run the queue, interrupts
149 * will do it anyway
150 */
151 schan->pm_state = SHDMA_PM_PENDING;
152 }
153
154 spin_unlock_irq(&schan->chan_lock);
155
156 return cookie;
157}
158
159/* Called with desc_lock held */
160static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan)
161{
162 struct shdma_desc *sdesc;
163
164 list_for_each_entry(sdesc, &schan->ld_free, node)
165 if (sdesc->mark != DESC_PREPARED) {
166 BUG_ON(sdesc->mark != DESC_IDLE);
167 list_del(&sdesc->node);
168 return sdesc;
169 }
170
171 return NULL;
172}
173
174static int shdma_alloc_chan_resources(struct dma_chan *chan)
175{
176 struct shdma_chan *schan = to_shdma_chan(chan);
177 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
178 const struct shdma_ops *ops = sdev->ops;
179 struct shdma_desc *desc;
180 struct shdma_slave *slave = chan->private;
181 int ret, i;
182
183 /*
184 * This relies on the guarantee from dmaengine that alloc_chan_resources
185 * never runs concurrently with itself or free_chan_resources.
186 */
187 if (slave) {
c2cdb7e4 188 if (slave->slave_id < 0 || slave->slave_id >= slave_num) {
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189 ret = -EINVAL;
190 goto evalid;
191 }
192
193 if (test_and_set_bit(slave->slave_id, shdma_slave_used)) {
194 ret = -EBUSY;
195 goto etestused;
196 }
197
c2cdb7e4 198 ret = ops->set_slave(schan, slave->slave_id);
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199 if (ret < 0)
200 goto esetslave;
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201
202 schan->slave_id = slave->slave_id;
203 } else {
204 schan->slave_id = -EINVAL;
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205 }
206
207 schan->desc = kcalloc(NR_DESCS_PER_CHANNEL,
208 sdev->desc_size, GFP_KERNEL);
209 if (!schan->desc) {
210 ret = -ENOMEM;
211 goto edescalloc;
212 }
213 schan->desc_num = NR_DESCS_PER_CHANNEL;
214
215 for (i = 0; i < NR_DESCS_PER_CHANNEL; i++) {
216 desc = ops->embedded_desc(schan->desc, i);
217 dma_async_tx_descriptor_init(&desc->async_tx,
218 &schan->dma_chan);
219 desc->async_tx.tx_submit = shdma_tx_submit;
220 desc->mark = DESC_IDLE;
221
222 list_add(&desc->node, &schan->ld_free);
223 }
224
225 return NR_DESCS_PER_CHANNEL;
226
227edescalloc:
228 if (slave)
229esetslave:
230 clear_bit(slave->slave_id, shdma_slave_used);
231etestused:
232evalid:
233 chan->private = NULL;
234 return ret;
235}
236
237static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
238{
239 struct shdma_desc *desc, *_desc;
240 /* Is the "exposed" head of a chain acked? */
241 bool head_acked = false;
242 dma_cookie_t cookie = 0;
243 dma_async_tx_callback callback = NULL;
244 void *param = NULL;
245 unsigned long flags;
246
247 spin_lock_irqsave(&schan->chan_lock, flags);
248 list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) {
249 struct dma_async_tx_descriptor *tx = &desc->async_tx;
250
251 BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
252 BUG_ON(desc->mark != DESC_SUBMITTED &&
253 desc->mark != DESC_COMPLETED &&
254 desc->mark != DESC_WAITING);
255
256 /*
257 * queue is ordered, and we use this loop to (1) clean up all
258 * completed descriptors, and to (2) update descriptor flags of
259 * any chunks in a (partially) completed chain
260 */
261 if (!all && desc->mark == DESC_SUBMITTED &&
262 desc->cookie != cookie)
263 break;
264
265 if (tx->cookie > 0)
266 cookie = tx->cookie;
267
268 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
269 if (schan->dma_chan.completed_cookie != desc->cookie - 1)
270 dev_dbg(schan->dev,
271 "Completing cookie %d, expected %d\n",
272 desc->cookie,
273 schan->dma_chan.completed_cookie + 1);
274 schan->dma_chan.completed_cookie = desc->cookie;
275 }
276
277 /* Call callback on the last chunk */
278 if (desc->mark == DESC_COMPLETED && tx->callback) {
279 desc->mark = DESC_WAITING;
280 callback = tx->callback;
281 param = tx->callback_param;
282 dev_dbg(schan->dev, "descriptor #%d@%p on %d callback\n",
283 tx->cookie, tx, schan->id);
284 BUG_ON(desc->chunks != 1);
285 break;
286 }
287
288 if (tx->cookie > 0 || tx->cookie == -EBUSY) {
289 if (desc->mark == DESC_COMPLETED) {
290 BUG_ON(tx->cookie < 0);
291 desc->mark = DESC_WAITING;
292 }
293 head_acked = async_tx_test_ack(tx);
294 } else {
295 switch (desc->mark) {
296 case DESC_COMPLETED:
297 desc->mark = DESC_WAITING;
298 /* Fall through */
299 case DESC_WAITING:
300 if (head_acked)
301 async_tx_ack(&desc->async_tx);
302 }
303 }
304
305 dev_dbg(schan->dev, "descriptor %p #%d completed.\n",
306 tx, tx->cookie);
307
308 if (((desc->mark == DESC_COMPLETED ||
309 desc->mark == DESC_WAITING) &&
310 async_tx_test_ack(&desc->async_tx)) || all) {
311 /* Remove from ld_queue list */
312 desc->mark = DESC_IDLE;
313
314 list_move(&desc->node, &schan->ld_free);
315
316 if (list_empty(&schan->ld_queue)) {
317 dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
318 pm_runtime_put(schan->dev);
319 schan->pm_state = SHDMA_PM_ESTABLISHED;
320 }
321 }
322 }
323
324 if (all && !callback)
325 /*
326 * Terminating and the loop completed normally: forgive
327 * uncompleted cookies
328 */
329 schan->dma_chan.completed_cookie = schan->dma_chan.cookie;
330
331 spin_unlock_irqrestore(&schan->chan_lock, flags);
332
333 if (callback)
334 callback(param);
335
336 return callback;
337}
338
339/*
340 * shdma_chan_ld_cleanup - Clean up link descriptors
341 *
342 * Clean up the ld_queue of DMA channel.
343 */
344static void shdma_chan_ld_cleanup(struct shdma_chan *schan, bool all)
345{
346 while (__ld_cleanup(schan, all))
347 ;
348}
349
350/*
351 * shdma_free_chan_resources - Free all resources of the channel.
352 */
353static void shdma_free_chan_resources(struct dma_chan *chan)
354{
355 struct shdma_chan *schan = to_shdma_chan(chan);
356 struct shdma_dev *sdev = to_shdma_dev(chan->device);
357 const struct shdma_ops *ops = sdev->ops;
358 LIST_HEAD(list);
359
360 /* Protect against ISR */
361 spin_lock_irq(&schan->chan_lock);
362 ops->halt_channel(schan);
363 spin_unlock_irq(&schan->chan_lock);
364
365 /* Now no new interrupts will occur */
366
367 /* Prepared and not submitted descriptors can still be on the queue */
368 if (!list_empty(&schan->ld_queue))
369 shdma_chan_ld_cleanup(schan, true);
370
c2cdb7e4 371 if (schan->slave_id >= 0) {
9a7b8e00 372 /* The caller is holding dma_list_mutex */
c2cdb7e4 373 clear_bit(schan->slave_id, shdma_slave_used);
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GL
374 chan->private = NULL;
375 }
376
377 spin_lock_irq(&schan->chan_lock);
378
379 list_splice_init(&schan->ld_free, &list);
380 schan->desc_num = 0;
381
382 spin_unlock_irq(&schan->chan_lock);
383
384 kfree(schan->desc);
385}
386
387/**
388 * shdma_add_desc - get, set up and return one transfer descriptor
389 * @schan: DMA channel
390 * @flags: DMA transfer flags
391 * @dst: destination DMA address, incremented when direction equals
392 * DMA_DEV_TO_MEM or DMA_MEM_TO_MEM
393 * @src: source DMA address, incremented when direction equals
394 * DMA_MEM_TO_DEV or DMA_MEM_TO_MEM
395 * @len: DMA transfer length
396 * @first: if NULL, set to the current descriptor and cookie set to -EBUSY
397 * @direction: needed for slave DMA to decide which address to keep constant,
398 * equals DMA_MEM_TO_MEM for MEMCPY
399 * Returns 0 or an error
400 * Locks: called with desc_lock held
401 */
402static struct shdma_desc *shdma_add_desc(struct shdma_chan *schan,
403 unsigned long flags, dma_addr_t *dst, dma_addr_t *src, size_t *len,
404 struct shdma_desc **first, enum dma_transfer_direction direction)
405{
406 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
407 const struct shdma_ops *ops = sdev->ops;
408 struct shdma_desc *new;
409 size_t copy_size = *len;
410
411 if (!copy_size)
412 return NULL;
413
414 /* Allocate the link descriptor from the free list */
415 new = shdma_get_desc(schan);
416 if (!new) {
417 dev_err(schan->dev, "No free link descriptor available\n");
418 return NULL;
419 }
420
421 ops->desc_setup(schan, new, *src, *dst, &copy_size);
422
423 if (!*first) {
424 /* First desc */
425 new->async_tx.cookie = -EBUSY;
426 *first = new;
427 } else {
428 /* Other desc - invisible to the user */
429 new->async_tx.cookie = -EINVAL;
430 }
431
432 dev_dbg(schan->dev,
433 "chaining (%u/%u)@%x -> %x with %p, cookie %d\n",
434 copy_size, *len, *src, *dst, &new->async_tx,
435 new->async_tx.cookie);
436
437 new->mark = DESC_PREPARED;
438 new->async_tx.flags = flags;
439 new->direction = direction;
440
441 *len -= copy_size;
442 if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV)
443 *src += copy_size;
444 if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM)
445 *dst += copy_size;
446
447 return new;
448}
449
450/*
451 * shdma_prep_sg - prepare transfer descriptors from an SG list
452 *
453 * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
454 * converted to scatter-gather to guarantee consistent locking and a correct
455 * list manipulation. For slave DMA direction carries the usual meaning, and,
456 * logically, the SG list is RAM and the addr variable contains slave address,
457 * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM
458 * and the SG list contains only one element and points at the source buffer.
459 */
460static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan,
461 struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
462 enum dma_transfer_direction direction, unsigned long flags)
463{
464 struct scatterlist *sg;
465 struct shdma_desc *first = NULL, *new = NULL /* compiler... */;
466 LIST_HEAD(tx_list);
467 int chunks = 0;
468 unsigned long irq_flags;
469 int i;
470
471 for_each_sg(sgl, sg, sg_len, i)
472 chunks += DIV_ROUND_UP(sg_dma_len(sg), schan->max_xfer_len);
473
474 /* Have to lock the whole loop to protect against concurrent release */
475 spin_lock_irqsave(&schan->chan_lock, irq_flags);
476
477 /*
478 * Chaining:
479 * first descriptor is what user is dealing with in all API calls, its
480 * cookie is at first set to -EBUSY, at tx-submit to a positive
481 * number
482 * if more than one chunk is needed further chunks have cookie = -EINVAL
483 * the last chunk, if not equal to the first, has cookie = -ENOSPC
484 * all chunks are linked onto the tx_list head with their .node heads
485 * only during this function, then they are immediately spliced
486 * back onto the free list in form of a chain
487 */
488 for_each_sg(sgl, sg, sg_len, i) {
489 dma_addr_t sg_addr = sg_dma_address(sg);
490 size_t len = sg_dma_len(sg);
491
492 if (!len)
493 goto err_get_desc;
494
495 do {
496 dev_dbg(schan->dev, "Add SG #%d@%p[%d], dma %llx\n",
497 i, sg, len, (unsigned long long)sg_addr);
498
499 if (direction == DMA_DEV_TO_MEM)
500 new = shdma_add_desc(schan, flags,
501 &sg_addr, addr, &len, &first,
502 direction);
503 else
504 new = shdma_add_desc(schan, flags,
505 addr, &sg_addr, &len, &first,
506 direction);
507 if (!new)
508 goto err_get_desc;
509
510 new->chunks = chunks--;
511 list_add_tail(&new->node, &tx_list);
512 } while (len);
513 }
514
515 if (new != first)
516 new->async_tx.cookie = -ENOSPC;
517
518 /* Put them back on the free list, so, they don't get lost */
519 list_splice_tail(&tx_list, &schan->ld_free);
520
521 spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
522
523 return &first->async_tx;
524
525err_get_desc:
526 list_for_each_entry(new, &tx_list, node)
527 new->mark = DESC_IDLE;
528 list_splice(&tx_list, &schan->ld_free);
529
530 spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
531
532 return NULL;
533}
534
535static struct dma_async_tx_descriptor *shdma_prep_memcpy(
536 struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
537 size_t len, unsigned long flags)
538{
539 struct shdma_chan *schan = to_shdma_chan(chan);
540 struct scatterlist sg;
541
542 if (!chan || !len)
543 return NULL;
544
545 BUG_ON(!schan->desc_num);
546
547 sg_init_table(&sg, 1);
548 sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
549 offset_in_page(dma_src));
550 sg_dma_address(&sg) = dma_src;
551 sg_dma_len(&sg) = len;
552
553 return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM, flags);
554}
555
556static struct dma_async_tx_descriptor *shdma_prep_slave_sg(
557 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
558 enum dma_transfer_direction direction, unsigned long flags, void *context)
559{
560 struct shdma_chan *schan = to_shdma_chan(chan);
561 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
562 const struct shdma_ops *ops = sdev->ops;
c2cdb7e4 563 int slave_id = schan->slave_id;
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564 dma_addr_t slave_addr;
565
566 if (!chan)
567 return NULL;
568
569 BUG_ON(!schan->desc_num);
570
571 /* Someone calling slave DMA on a generic channel? */
c2cdb7e4
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572 if (slave_id < 0 || !sg_len) {
573 dev_warn(schan->dev, "%s: bad parameter: len=%d, id=%d\n",
574 __func__, sg_len, slave_id);
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575 return NULL;
576 }
577
578 slave_addr = ops->slave_addr(schan);
579
580 return shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
581 direction, flags);
582}
583
584static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
585 unsigned long arg)
586{
587 struct shdma_chan *schan = to_shdma_chan(chan);
588 struct shdma_dev *sdev = to_shdma_dev(chan->device);
589 const struct shdma_ops *ops = sdev->ops;
590 unsigned long flags;
591
592 /* Only supports DMA_TERMINATE_ALL */
593 if (cmd != DMA_TERMINATE_ALL)
594 return -ENXIO;
595
596 if (!chan)
597 return -EINVAL;
598
599 spin_lock_irqsave(&schan->chan_lock, flags);
600
601 ops->halt_channel(schan);
602
603 spin_unlock_irqrestore(&schan->chan_lock, flags);
604
605 shdma_chan_ld_cleanup(schan, true);
606
607 return 0;
608}
609
610static void shdma_issue_pending(struct dma_chan *chan)
611{
612 struct shdma_chan *schan = to_shdma_chan(chan);
613
614 spin_lock_irq(&schan->chan_lock);
615 if (schan->pm_state == SHDMA_PM_ESTABLISHED)
616 shdma_chan_xfer_ld_queue(schan);
617 else
618 schan->pm_state = SHDMA_PM_PENDING;
619 spin_unlock_irq(&schan->chan_lock);
620}
621
622static enum dma_status shdma_tx_status(struct dma_chan *chan,
623 dma_cookie_t cookie,
624 struct dma_tx_state *txstate)
625{
626 struct shdma_chan *schan = to_shdma_chan(chan);
627 enum dma_status status;
628 unsigned long flags;
629
630 shdma_chan_ld_cleanup(schan, false);
631
632 spin_lock_irqsave(&schan->chan_lock, flags);
633
634 status = dma_cookie_status(chan, cookie, txstate);
635
636 /*
637 * If we don't find cookie on the queue, it has been aborted and we have
638 * to report error
639 */
640 if (status != DMA_SUCCESS) {
641 struct shdma_desc *sdesc;
642 status = DMA_ERROR;
643 list_for_each_entry(sdesc, &schan->ld_queue, node)
644 if (sdesc->cookie == cookie) {
645 status = DMA_IN_PROGRESS;
646 break;
647 }
648 }
649
650 spin_unlock_irqrestore(&schan->chan_lock, flags);
651
652 return status;
653}
654
655/* Called from error IRQ or NMI */
656bool shdma_reset(struct shdma_dev *sdev)
657{
658 const struct shdma_ops *ops = sdev->ops;
659 struct shdma_chan *schan;
660 unsigned int handled = 0;
661 int i;
662
663 /* Reset all channels */
664 shdma_for_each_chan(schan, sdev, i) {
665 struct shdma_desc *sdesc;
666 LIST_HEAD(dl);
667
668 if (!schan)
669 continue;
670
671 spin_lock(&schan->chan_lock);
672
673 /* Stop the channel */
674 ops->halt_channel(schan);
675
676 list_splice_init(&schan->ld_queue, &dl);
677
678 if (!list_empty(&dl)) {
679 dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
680 pm_runtime_put(schan->dev);
681 }
682 schan->pm_state = SHDMA_PM_ESTABLISHED;
683
684 spin_unlock(&schan->chan_lock);
685
686 /* Complete all */
687 list_for_each_entry(sdesc, &dl, node) {
688 struct dma_async_tx_descriptor *tx = &sdesc->async_tx;
689 sdesc->mark = DESC_IDLE;
690 if (tx->callback)
691 tx->callback(tx->callback_param);
692 }
693
694 spin_lock(&schan->chan_lock);
695 list_splice(&dl, &schan->ld_free);
696 spin_unlock(&schan->chan_lock);
697
698 handled++;
699 }
700
701 return !!handled;
702}
703EXPORT_SYMBOL(shdma_reset);
704
705static irqreturn_t chan_irq(int irq, void *dev)
706{
707 struct shdma_chan *schan = dev;
708 const struct shdma_ops *ops =
709 to_shdma_dev(schan->dma_chan.device)->ops;
710 irqreturn_t ret;
711
712 spin_lock(&schan->chan_lock);
713
714 ret = ops->chan_irq(schan, irq) ? IRQ_WAKE_THREAD : IRQ_NONE;
715
716 spin_unlock(&schan->chan_lock);
717
718 return ret;
719}
720
721static irqreturn_t chan_irqt(int irq, void *dev)
722{
723 struct shdma_chan *schan = dev;
724 const struct shdma_ops *ops =
725 to_shdma_dev(schan->dma_chan.device)->ops;
726 struct shdma_desc *sdesc;
727
728 spin_lock_irq(&schan->chan_lock);
729 list_for_each_entry(sdesc, &schan->ld_queue, node) {
730 if (sdesc->mark == DESC_SUBMITTED &&
731 ops->desc_completed(schan, sdesc)) {
732 dev_dbg(schan->dev, "done #%d@%p\n",
733 sdesc->async_tx.cookie, &sdesc->async_tx);
734 sdesc->mark = DESC_COMPLETED;
735 break;
736 }
737 }
738 /* Next desc */
739 shdma_chan_xfer_ld_queue(schan);
740 spin_unlock_irq(&schan->chan_lock);
741
742 shdma_chan_ld_cleanup(schan, false);
743
744 return IRQ_HANDLED;
745}
746
747int shdma_request_irq(struct shdma_chan *schan, int irq,
748 unsigned long flags, const char *name)
749{
750 int ret = request_threaded_irq(irq, chan_irq, chan_irqt,
751 flags, name, schan);
752
753 schan->irq = ret < 0 ? ret : irq;
754
755 return ret;
756}
757EXPORT_SYMBOL(shdma_request_irq);
758
759void shdma_free_irq(struct shdma_chan *schan)
760{
761 if (schan->irq >= 0)
762 free_irq(schan->irq, schan);
763}
764EXPORT_SYMBOL(shdma_free_irq);
765
766void shdma_chan_probe(struct shdma_dev *sdev,
767 struct shdma_chan *schan, int id)
768{
769 schan->pm_state = SHDMA_PM_ESTABLISHED;
770
771 /* reference struct dma_device */
772 schan->dma_chan.device = &sdev->dma_dev;
773 dma_cookie_init(&schan->dma_chan);
774
775 schan->dev = sdev->dma_dev.dev;
776 schan->id = id;
777
778 if (!schan->max_xfer_len)
779 schan->max_xfer_len = PAGE_SIZE;
780
781 spin_lock_init(&schan->chan_lock);
782
783 /* Init descripter manage list */
784 INIT_LIST_HEAD(&schan->ld_queue);
785 INIT_LIST_HEAD(&schan->ld_free);
786
787 /* Add the channel to DMA device channel list */
788 list_add_tail(&schan->dma_chan.device_node,
789 &sdev->dma_dev.channels);
790 sdev->schan[sdev->dma_dev.chancnt++] = schan;
791}
792EXPORT_SYMBOL(shdma_chan_probe);
793
794void shdma_chan_remove(struct shdma_chan *schan)
795{
796 list_del(&schan->dma_chan.device_node);
797}
798EXPORT_SYMBOL(shdma_chan_remove);
799
800int shdma_init(struct device *dev, struct shdma_dev *sdev,
801 int chan_num)
802{
803 struct dma_device *dma_dev = &sdev->dma_dev;
804
805 /*
806 * Require all call-backs for now, they can trivially be made optional
807 * later as required
808 */
809 if (!sdev->ops ||
810 !sdev->desc_size ||
811 !sdev->ops->embedded_desc ||
812 !sdev->ops->start_xfer ||
813 !sdev->ops->setup_xfer ||
814 !sdev->ops->set_slave ||
815 !sdev->ops->desc_setup ||
816 !sdev->ops->slave_addr ||
817 !sdev->ops->channel_busy ||
818 !sdev->ops->halt_channel ||
819 !sdev->ops->desc_completed)
820 return -EINVAL;
821
822 sdev->schan = kcalloc(chan_num, sizeof(*sdev->schan), GFP_KERNEL);
823 if (!sdev->schan)
824 return -ENOMEM;
825
826 INIT_LIST_HEAD(&dma_dev->channels);
827
828 /* Common and MEMCPY operations */
829 dma_dev->device_alloc_chan_resources
830 = shdma_alloc_chan_resources;
831 dma_dev->device_free_chan_resources = shdma_free_chan_resources;
832 dma_dev->device_prep_dma_memcpy = shdma_prep_memcpy;
833 dma_dev->device_tx_status = shdma_tx_status;
834 dma_dev->device_issue_pending = shdma_issue_pending;
835
836 /* Compulsory for DMA_SLAVE fields */
837 dma_dev->device_prep_slave_sg = shdma_prep_slave_sg;
838 dma_dev->device_control = shdma_control;
839
840 dma_dev->dev = dev;
841
842 return 0;
843}
844EXPORT_SYMBOL(shdma_init);
845
846void shdma_cleanup(struct shdma_dev *sdev)
847{
848 kfree(sdev->schan);
849}
850EXPORT_SYMBOL(shdma_cleanup);
851
852static int __init shdma_enter(void)
853{
854 shdma_slave_used = kzalloc(DIV_ROUND_UP(slave_num, BITS_PER_LONG) *
855 sizeof(long), GFP_KERNEL);
856 if (!shdma_slave_used)
857 return -ENOMEM;
858 return 0;
859}
860module_init(shdma_enter);
861
862static void __exit shdma_exit(void)
863{
864 kfree(shdma_slave_used);
865}
866module_exit(shdma_exit);
867
868MODULE_LICENSE("GPL v2");
869MODULE_DESCRIPTION("SH-DMA driver base library");
870MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");