[linux-2.6-block.git] / drivers / dma / mediatek / Kconfig

# SPDX-License-Identifier: GPL-2.0-only

config MTK_HSDMA
	tristate "MediaTek High-Speed DMA controller support"
	depends on ARCH_MEDIATEK || COMPILE_TEST
	select DMA_ENGINE
	select DMA_VIRTUAL_CHANNELS
	---help---
	  Enable support for High-Speed DMA controller on MediaTek
	  SoCs.

	  This controller provides the channels which is dedicated to
	  memory-to-memory transfer to offload from CPU through ring-
	  based descriptor management.

config MTK_CQDMA
	tristate "MediaTek Command-Queue DMA controller support"
	depends on ARCH_MEDIATEK || COMPILE_TEST
	select DMA_ENGINE
	select DMA_VIRTUAL_CHANNELS
	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
	help
	  Enable support for Command-Queue DMA controller on MediaTek
	  SoCs.

	  This controller provides the channels which is dedicated to
	  memory-to-memory transfer to offload from CPU.
Commit	Line	Data
ec8f24b7	1	# SPDX-License-Identifier: GPL-2.0-only
548c4597 SW	2
	3	config MTK_HSDMA
	4	tristate "MediaTek High-Speed DMA controller support"
	5	depends on ARCH_MEDIATEK \|\| COMPILE_TEST
	6	select DMA_ENGINE
	7	select DMA_VIRTUAL_CHANNELS
	8	---help---
	9	Enable support for High-Speed DMA controller on MediaTek
	10	SoCs.
	11
	12	This controller provides the channels which is dedicated to
	13	memory-to-memory transfer to offload from CPU through ring-
	14	based descriptor management.
b1f01e48 SCY	15
	16	config MTK_CQDMA
	17	tristate "MediaTek Command-Queue DMA controller support"
	18	depends on ARCH_MEDIATEK \|\| COMPILE_TEST
	19	select DMA_ENGINE
	20	select DMA_VIRTUAL_CHANNELS
	21	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
	22	help
	23	Enable support for Command-Queue DMA controller on MediaTek
	24	SoCs.
	25
	26	This controller provides the channels which is dedicated to
	27	memory-to-memory transfer to offload from CPU.