dmaengine: remove DMA unmap flags
[linux-2.6-block.git] / drivers / dma / dmatest.c
CommitLineData
4a776f0a
HS
1/*
2 * DMA Engine test module
3 *
4 * Copyright (C) 2007 Atmel Corporation
851b7e16 5 * Copyright (C) 2013 Intel Corporation
4a776f0a
HS
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/delay.h>
b7f080cf 12#include <linux/dma-mapping.h>
4a776f0a 13#include <linux/dmaengine.h>
981ed70d 14#include <linux/freezer.h>
4a776f0a
HS
15#include <linux/init.h>
16#include <linux/kthread.h>
17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/random.h>
5a0e3ad6 20#include <linux/slab.h>
4a776f0a 21#include <linux/wait.h>
851b7e16
AS
22#include <linux/ctype.h>
23#include <linux/debugfs.h>
24#include <linux/uaccess.h>
25#include <linux/seq_file.h>
4a776f0a
HS
26
27static unsigned int test_buf_size = 16384;
a6c268d0 28module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
4a776f0a
HS
29MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
30
06190d84 31static char test_channel[20];
a6c268d0
AS
32module_param_string(channel, test_channel, sizeof(test_channel),
33 S_IRUGO | S_IWUSR);
4a776f0a
HS
34MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
35
06190d84 36static char test_device[20];
a6c268d0
AS
37module_param_string(device, test_device, sizeof(test_device),
38 S_IRUGO | S_IWUSR);
4a776f0a
HS
39MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
40
41static unsigned int threads_per_chan = 1;
a6c268d0 42module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
4a776f0a
HS
43MODULE_PARM_DESC(threads_per_chan,
44 "Number of threads to start per channel (default: 1)");
45
46static unsigned int max_channels;
a6c268d0 47module_param(max_channels, uint, S_IRUGO | S_IWUSR);
33df8ca0 48MODULE_PARM_DESC(max_channels,
4a776f0a
HS
49 "Maximum number of channels to use (default: all)");
50
0a2ff57d 51static unsigned int iterations;
a6c268d0 52module_param(iterations, uint, S_IRUGO | S_IWUSR);
0a2ff57d
NF
53MODULE_PARM_DESC(iterations,
54 "Iterations before stopping test (default: infinite)");
55
b54d5cb9 56static unsigned int xor_sources = 3;
a6c268d0 57module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
b54d5cb9
DW
58MODULE_PARM_DESC(xor_sources,
59 "Number of xor source buffers (default: 3)");
60
58691d64 61static unsigned int pq_sources = 3;
a6c268d0 62module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
58691d64
DW
63MODULE_PARM_DESC(pq_sources,
64 "Number of p+q source buffers (default: 3)");
65
d42efe6b 66static int timeout = 3000;
a6c268d0 67module_param(timeout, uint, S_IRUGO | S_IWUSR);
85ee7a1d
JP
68MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
69 "Pass -1 for infinite timeout");
d42efe6b 70
74b5c07a
AS
71/* Maximum amount of mismatched bytes in buffer to print */
72#define MAX_ERROR_COUNT 32
73
4a776f0a
HS
74/*
75 * Initialization patterns. All bytes in the source buffer has bit 7
76 * set, all bytes in the destination buffer has bit 7 cleared.
77 *
78 * Bit 6 is set for all bytes which are to be copied by the DMA
79 * engine. Bit 5 is set for all bytes which are to be overwritten by
80 * the DMA engine.
81 *
82 * The remaining bits are the inverse of a counter which increments by
83 * one for each byte address.
84 */
85#define PATTERN_SRC 0x80
86#define PATTERN_DST 0x00
87#define PATTERN_COPY 0x40
88#define PATTERN_OVERWRITE 0x20
89#define PATTERN_COUNT_MASK 0x1f
90
95019c8c
AS
91enum dmatest_error_type {
92 DMATEST_ET_OK,
93 DMATEST_ET_MAP_SRC,
94 DMATEST_ET_MAP_DST,
95 DMATEST_ET_PREP,
96 DMATEST_ET_SUBMIT,
97 DMATEST_ET_TIMEOUT,
98 DMATEST_ET_DMA_ERROR,
99 DMATEST_ET_DMA_IN_PROGRESS,
100 DMATEST_ET_VERIFY,
d86b2f29
AS
101 DMATEST_ET_VERIFY_BUF,
102};
103
104struct dmatest_verify_buffer {
105 unsigned int index;
106 u8 expected;
107 u8 actual;
108};
109
110struct dmatest_verify_result {
111 unsigned int error_count;
112 struct dmatest_verify_buffer data[MAX_ERROR_COUNT];
113 u8 pattern;
114 bool is_srcbuf;
95019c8c
AS
115};
116
117struct dmatest_thread_result {
118 struct list_head node;
119 unsigned int n;
120 unsigned int src_off;
121 unsigned int dst_off;
122 unsigned int len;
123 enum dmatest_error_type type;
124 union {
d86b2f29
AS
125 unsigned long data;
126 dma_cookie_t cookie;
127 enum dma_status status;
128 int error;
129 struct dmatest_verify_result *vr;
95019c8c
AS
130 };
131};
132
133struct dmatest_result {
134 struct list_head node;
135 char *name;
136 struct list_head results;
137};
138
e03e93a9
AS
139struct dmatest_info;
140
4a776f0a
HS
141struct dmatest_thread {
142 struct list_head node;
e03e93a9 143 struct dmatest_info *info;
4a776f0a
HS
144 struct task_struct *task;
145 struct dma_chan *chan;
b54d5cb9
DW
146 u8 **srcs;
147 u8 **dsts;
148 enum dma_transaction_type type;
3e5ccd86 149 bool done;
4a776f0a
HS
150};
151
152struct dmatest_chan {
153 struct list_head node;
154 struct dma_chan *chan;
155 struct list_head threads;
156};
157
e03e93a9 158/**
15b8a8ea 159 * struct dmatest_params - test parameters.
e03e93a9
AS
160 * @buf_size: size of the memcpy test buffer
161 * @channel: bus ID of the channel to test
162 * @device: bus ID of the DMA Engine to test
163 * @threads_per_chan: number of threads to start per channel
164 * @max_channels: maximum number of channels to use
165 * @iterations: iterations before stopping test
166 * @xor_sources: number of xor source buffers
167 * @pq_sources: number of p+q source buffers
168 * @timeout: transfer timeout in msec, -1 for infinite timeout
169 */
15b8a8ea 170struct dmatest_params {
e03e93a9
AS
171 unsigned int buf_size;
172 char channel[20];
173 char device[20];
174 unsigned int threads_per_chan;
175 unsigned int max_channels;
176 unsigned int iterations;
177 unsigned int xor_sources;
178 unsigned int pq_sources;
179 int timeout;
15b8a8ea
AS
180};
181
182/**
183 * struct dmatest_info - test information.
184 * @params: test parameters
851b7e16 185 * @lock: access protection to the fields of this structure
15b8a8ea
AS
186 */
187struct dmatest_info {
188 /* Test parameters */
189 struct dmatest_params params;
838cc704
AS
190
191 /* Internal state */
192 struct list_head channels;
193 unsigned int nr_channels;
851b7e16
AS
194 struct mutex lock;
195
196 /* debugfs related stuff */
197 struct dentry *root;
95019c8c
AS
198
199 /* Test results */
200 struct list_head results;
201 struct mutex results_lock;
e03e93a9
AS
202};
203
204static struct dmatest_info test_info;
205
15b8a8ea 206static bool dmatest_match_channel(struct dmatest_params *params,
e03e93a9 207 struct dma_chan *chan)
4a776f0a 208{
15b8a8ea 209 if (params->channel[0] == '\0')
4a776f0a 210 return true;
15b8a8ea 211 return strcmp(dma_chan_name(chan), params->channel) == 0;
4a776f0a
HS
212}
213
15b8a8ea 214static bool dmatest_match_device(struct dmatest_params *params,
e03e93a9 215 struct dma_device *device)
4a776f0a 216{
15b8a8ea 217 if (params->device[0] == '\0')
4a776f0a 218 return true;
15b8a8ea 219 return strcmp(dev_name(device->dev), params->device) == 0;
4a776f0a
HS
220}
221
222static unsigned long dmatest_random(void)
223{
224 unsigned long buf;
225
226 get_random_bytes(&buf, sizeof(buf));
227 return buf;
228}
229
e03e93a9
AS
230static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
231 unsigned int buf_size)
4a776f0a
HS
232{
233 unsigned int i;
b54d5cb9
DW
234 u8 *buf;
235
236 for (; (buf = *bufs); bufs++) {
237 for (i = 0; i < start; i++)
238 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
239 for ( ; i < start + len; i++)
240 buf[i] = PATTERN_SRC | PATTERN_COPY
c019894e 241 | (~i & PATTERN_COUNT_MASK);
e03e93a9 242 for ( ; i < buf_size; i++)
b54d5cb9
DW
243 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
244 buf++;
245 }
4a776f0a
HS
246}
247
e03e93a9
AS
248static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
249 unsigned int buf_size)
4a776f0a
HS
250{
251 unsigned int i;
b54d5cb9
DW
252 u8 *buf;
253
254 for (; (buf = *bufs); bufs++) {
255 for (i = 0; i < start; i++)
256 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
257 for ( ; i < start + len; i++)
258 buf[i] = PATTERN_DST | PATTERN_OVERWRITE
259 | (~i & PATTERN_COUNT_MASK);
e03e93a9 260 for ( ; i < buf_size; i++)
b54d5cb9
DW
261 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
262 }
4a776f0a
HS
263}
264
d86b2f29
AS
265static unsigned int dmatest_verify(struct dmatest_verify_result *vr, u8 **bufs,
266 unsigned int start, unsigned int end, unsigned int counter,
267 u8 pattern, bool is_srcbuf)
4a776f0a
HS
268{
269 unsigned int i;
270 unsigned int error_count = 0;
271 u8 actual;
b54d5cb9
DW
272 u8 expected;
273 u8 *buf;
274 unsigned int counter_orig = counter;
d86b2f29 275 struct dmatest_verify_buffer *vb;
b54d5cb9
DW
276
277 for (; (buf = *bufs); bufs++) {
278 counter = counter_orig;
279 for (i = start; i < end; i++) {
280 actual = buf[i];
281 expected = pattern | (~counter & PATTERN_COUNT_MASK);
282 if (actual != expected) {
d86b2f29
AS
283 if (error_count < MAX_ERROR_COUNT && vr) {
284 vb = &vr->data[error_count];
285 vb->index = i;
286 vb->expected = expected;
287 vb->actual = actual;
288 }
b54d5cb9
DW
289 error_count++;
290 }
291 counter++;
4a776f0a 292 }
4a776f0a
HS
293 }
294
74b5c07a 295 if (error_count > MAX_ERROR_COUNT)
4a776f0a 296 pr_warning("%s: %u errors suppressed\n",
74b5c07a 297 current->comm, error_count - MAX_ERROR_COUNT);
4a776f0a
HS
298
299 return error_count;
300}
301
adfa543e
TH
302/* poor man's completion - we want to use wait_event_freezable() on it */
303struct dmatest_done {
304 bool done;
305 wait_queue_head_t *wait;
306};
307
308static void dmatest_callback(void *arg)
e44e0aa3 309{
adfa543e
TH
310 struct dmatest_done *done = arg;
311
312 done->done = true;
313 wake_up_all(done->wait);
e44e0aa3
DW
314}
315
632fd283
AS
316static inline void unmap_src(struct device *dev, dma_addr_t *addr, size_t len,
317 unsigned int count)
318{
319 while (count--)
320 dma_unmap_single(dev, addr[count], len, DMA_TO_DEVICE);
321}
322
323static inline void unmap_dst(struct device *dev, dma_addr_t *addr, size_t len,
324 unsigned int count)
325{
326 while (count--)
327 dma_unmap_single(dev, addr[count], len, DMA_BIDIRECTIONAL);
328}
329
8be9e32b
AM
330static unsigned int min_odd(unsigned int x, unsigned int y)
331{
332 unsigned int val = min(x, y);
333
334 return val % 2 ? val : val - 1;
335}
336
d86b2f29
AS
337static char *verify_result_get_one(struct dmatest_verify_result *vr,
338 unsigned int i)
339{
340 struct dmatest_verify_buffer *vb = &vr->data[i];
341 u8 diff = vb->actual ^ vr->pattern;
342 static char buf[512];
343 char *msg;
344
345 if (vr->is_srcbuf)
346 msg = "srcbuf overwritten!";
347 else if ((vr->pattern & PATTERN_COPY)
348 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
349 msg = "dstbuf not copied!";
350 else if (diff & PATTERN_SRC)
351 msg = "dstbuf was copied!";
352 else
353 msg = "dstbuf mismatch!";
354
355 snprintf(buf, sizeof(buf) - 1, "%s [0x%x] Expected %02x, got %02x", msg,
356 vb->index, vb->expected, vb->actual);
357
358 return buf;
359}
360
95019c8c
AS
361static char *thread_result_get(const char *name,
362 struct dmatest_thread_result *tr)
363{
364 static const char * const messages[] = {
365 [DMATEST_ET_OK] = "No errors",
366 [DMATEST_ET_MAP_SRC] = "src mapping error",
367 [DMATEST_ET_MAP_DST] = "dst mapping error",
368 [DMATEST_ET_PREP] = "prep error",
369 [DMATEST_ET_SUBMIT] = "submit error",
370 [DMATEST_ET_TIMEOUT] = "test timed out",
371 [DMATEST_ET_DMA_ERROR] =
372 "got completion callback (DMA_ERROR)",
373 [DMATEST_ET_DMA_IN_PROGRESS] =
374 "got completion callback (DMA_IN_PROGRESS)",
375 [DMATEST_ET_VERIFY] = "errors",
d86b2f29 376 [DMATEST_ET_VERIFY_BUF] = "verify errors",
95019c8c
AS
377 };
378 static char buf[512];
379
380 snprintf(buf, sizeof(buf) - 1,
381 "%s: #%u: %s with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)",
382 name, tr->n, messages[tr->type], tr->src_off, tr->dst_off,
383 tr->len, tr->data);
384
385 return buf;
386}
387
388static int thread_result_add(struct dmatest_info *info,
389 struct dmatest_result *r, enum dmatest_error_type type,
390 unsigned int n, unsigned int src_off, unsigned int dst_off,
391 unsigned int len, unsigned long data)
392{
393 struct dmatest_thread_result *tr;
394
395 tr = kzalloc(sizeof(*tr), GFP_KERNEL);
396 if (!tr)
397 return -ENOMEM;
398
399 tr->type = type;
400 tr->n = n;
401 tr->src_off = src_off;
402 tr->dst_off = dst_off;
403 tr->len = len;
404 tr->data = data;
405
406 mutex_lock(&info->results_lock);
407 list_add_tail(&tr->node, &r->results);
408 mutex_unlock(&info->results_lock);
409
ad5278cd
AS
410 if (tr->type == DMATEST_ET_OK)
411 pr_debug("%s\n", thread_result_get(r->name, tr));
412 else
413 pr_warn("%s\n", thread_result_get(r->name, tr));
414
95019c8c
AS
415 return 0;
416}
417
d86b2f29
AS
418static unsigned int verify_result_add(struct dmatest_info *info,
419 struct dmatest_result *r, unsigned int n,
420 unsigned int src_off, unsigned int dst_off, unsigned int len,
421 u8 **bufs, int whence, unsigned int counter, u8 pattern,
422 bool is_srcbuf)
423{
424 struct dmatest_verify_result *vr;
425 unsigned int error_count;
426 unsigned int buf_off = is_srcbuf ? src_off : dst_off;
427 unsigned int start, end;
428
429 if (whence < 0) {
430 start = 0;
431 end = buf_off;
432 } else if (whence > 0) {
433 start = buf_off + len;
434 end = info->params.buf_size;
435 } else {
436 start = buf_off;
437 end = buf_off + len;
438 }
439
440 vr = kmalloc(sizeof(*vr), GFP_KERNEL);
441 if (!vr) {
442 pr_warn("dmatest: No memory to store verify result\n");
443 return dmatest_verify(NULL, bufs, start, end, counter, pattern,
444 is_srcbuf);
445 }
446
447 vr->pattern = pattern;
448 vr->is_srcbuf = is_srcbuf;
449
450 error_count = dmatest_verify(vr, bufs, start, end, counter, pattern,
451 is_srcbuf);
452 if (error_count) {
453 vr->error_count = error_count;
454 thread_result_add(info, r, DMATEST_ET_VERIFY_BUF, n, src_off,
455 dst_off, len, (unsigned long)vr);
456 return error_count;
457 }
458
459 kfree(vr);
460 return 0;
461}
462
95019c8c
AS
463static void result_free(struct dmatest_info *info, const char *name)
464{
465 struct dmatest_result *r, *_r;
466
467 mutex_lock(&info->results_lock);
468 list_for_each_entry_safe(r, _r, &info->results, node) {
469 struct dmatest_thread_result *tr, *_tr;
470
471 if (name && strcmp(r->name, name))
472 continue;
473
474 list_for_each_entry_safe(tr, _tr, &r->results, node) {
d86b2f29
AS
475 if (tr->type == DMATEST_ET_VERIFY_BUF)
476 kfree(tr->vr);
95019c8c
AS
477 list_del(&tr->node);
478 kfree(tr);
479 }
480
481 kfree(r->name);
482 list_del(&r->node);
483 kfree(r);
484 }
485
486 mutex_unlock(&info->results_lock);
487}
488
489static struct dmatest_result *result_init(struct dmatest_info *info,
490 const char *name)
491{
492 struct dmatest_result *r;
493
494 r = kzalloc(sizeof(*r), GFP_KERNEL);
495 if (r) {
496 r->name = kstrdup(name, GFP_KERNEL);
497 INIT_LIST_HEAD(&r->results);
498 mutex_lock(&info->results_lock);
499 list_add_tail(&r->node, &info->results);
500 mutex_unlock(&info->results_lock);
501 }
502 return r;
503}
504
4a776f0a
HS
505/*
506 * This function repeatedly tests DMA transfers of various lengths and
b54d5cb9
DW
507 * offsets for a given operation type until it is told to exit by
508 * kthread_stop(). There may be multiple threads running this function
509 * in parallel for a single channel, and there may be multiple channels
510 * being tested in parallel.
4a776f0a
HS
511 *
512 * Before each test, the source and destination buffer is initialized
513 * with a known pattern. This pattern is different depending on
514 * whether it's in an area which is supposed to be copied or
515 * overwritten, and different in the source and destination buffers.
516 * So if the DMA engine doesn't copy exactly what we tell it to copy,
517 * we'll notice.
518 */
519static int dmatest_func(void *data)
520{
adfa543e 521 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
4a776f0a 522 struct dmatest_thread *thread = data;
adfa543e 523 struct dmatest_done done = { .wait = &done_wait };
e03e93a9 524 struct dmatest_info *info;
15b8a8ea 525 struct dmatest_params *params;
4a776f0a 526 struct dma_chan *chan;
8be9e32b 527 struct dma_device *dev;
4a776f0a
HS
528 const char *thread_name;
529 unsigned int src_off, dst_off, len;
530 unsigned int error_count;
531 unsigned int failed_tests = 0;
532 unsigned int total_tests = 0;
533 dma_cookie_t cookie;
534 enum dma_status status;
b54d5cb9 535 enum dma_ctrl_flags flags;
945b5af3 536 u8 *pq_coefs = NULL;
4a776f0a 537 int ret;
b54d5cb9
DW
538 int src_cnt;
539 int dst_cnt;
540 int i;
95019c8c 541 struct dmatest_result *result;
4a776f0a
HS
542
543 thread_name = current->comm;
adfa543e 544 set_freezable();
4a776f0a
HS
545
546 ret = -ENOMEM;
4a776f0a
HS
547
548 smp_rmb();
e03e93a9 549 info = thread->info;
15b8a8ea 550 params = &info->params;
4a776f0a 551 chan = thread->chan;
8be9e32b 552 dev = chan->device;
b54d5cb9
DW
553 if (thread->type == DMA_MEMCPY)
554 src_cnt = dst_cnt = 1;
555 else if (thread->type == DMA_XOR) {
8be9e32b 556 /* force odd to ensure dst = src */
15b8a8ea 557 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
b54d5cb9 558 dst_cnt = 1;
58691d64 559 } else if (thread->type == DMA_PQ) {
8be9e32b 560 /* force odd to ensure dst = src */
15b8a8ea 561 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
58691d64 562 dst_cnt = 2;
945b5af3 563
15b8a8ea 564 pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL);
945b5af3
AS
565 if (!pq_coefs)
566 goto err_thread_type;
567
94de648d 568 for (i = 0; i < src_cnt; i++)
58691d64 569 pq_coefs[i] = 1;
b54d5cb9 570 } else
945b5af3 571 goto err_thread_type;
b54d5cb9 572
95019c8c
AS
573 result = result_init(info, thread_name);
574 if (!result)
575 goto err_srcs;
576
b54d5cb9
DW
577 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
578 if (!thread->srcs)
579 goto err_srcs;
580 for (i = 0; i < src_cnt; i++) {
15b8a8ea 581 thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL);
b54d5cb9
DW
582 if (!thread->srcs[i])
583 goto err_srcbuf;
584 }
585 thread->srcs[i] = NULL;
586
587 thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
588 if (!thread->dsts)
589 goto err_dsts;
590 for (i = 0; i < dst_cnt; i++) {
15b8a8ea 591 thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL);
b54d5cb9
DW
592 if (!thread->dsts[i])
593 goto err_dstbuf;
594 }
595 thread->dsts[i] = NULL;
596
e44e0aa3
DW
597 set_user_nice(current, 10);
598
b203bd3f 599 /*
d1cab34c 600 * src and dst buffers are freed by ourselves below
b203bd3f 601 */
0776ae7b 602 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
4a776f0a 603
0a2ff57d 604 while (!kthread_should_stop()
15b8a8ea 605 && !(params->iterations && total_tests >= params->iterations)) {
b54d5cb9
DW
606 struct dma_async_tx_descriptor *tx = NULL;
607 dma_addr_t dma_srcs[src_cnt];
608 dma_addr_t dma_dsts[dst_cnt];
83544ae9 609 u8 align = 0;
d86be86e 610
4a776f0a
HS
611 total_tests++;
612
83544ae9
DW
613 /* honor alignment restrictions */
614 if (thread->type == DMA_MEMCPY)
615 align = dev->copy_align;
616 else if (thread->type == DMA_XOR)
617 align = dev->xor_align;
618 else if (thread->type == DMA_PQ)
619 align = dev->pq_align;
620
15b8a8ea 621 if (1 << align > params->buf_size) {
cfe4f275 622 pr_err("%u-byte buffer too small for %d-byte alignment\n",
15b8a8ea 623 params->buf_size, 1 << align);
cfe4f275
GL
624 break;
625 }
626
15b8a8ea 627 len = dmatest_random() % params->buf_size + 1;
83544ae9 628 len = (len >> align) << align;
cfe4f275
GL
629 if (!len)
630 len = 1 << align;
15b8a8ea
AS
631 src_off = dmatest_random() % (params->buf_size - len + 1);
632 dst_off = dmatest_random() % (params->buf_size - len + 1);
cfe4f275 633
83544ae9
DW
634 src_off = (src_off >> align) << align;
635 dst_off = (dst_off >> align) << align;
636
15b8a8ea
AS
637 dmatest_init_srcs(thread->srcs, src_off, len, params->buf_size);
638 dmatest_init_dsts(thread->dsts, dst_off, len, params->buf_size);
4a776f0a 639
b54d5cb9
DW
640 for (i = 0; i < src_cnt; i++) {
641 u8 *buf = thread->srcs[i] + src_off;
642
643 dma_srcs[i] = dma_map_single(dev->dev, buf, len,
644 DMA_TO_DEVICE);
afde3be1
AS
645 ret = dma_mapping_error(dev->dev, dma_srcs[i]);
646 if (ret) {
647 unmap_src(dev->dev, dma_srcs, len, i);
95019c8c
AS
648 thread_result_add(info, result,
649 DMATEST_ET_MAP_SRC,
650 total_tests, src_off, dst_off,
651 len, ret);
afde3be1
AS
652 failed_tests++;
653 continue;
654 }
b54d5cb9 655 }
d86be86e 656 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
b54d5cb9
DW
657 for (i = 0; i < dst_cnt; i++) {
658 dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
15b8a8ea 659 params->buf_size,
b54d5cb9 660 DMA_BIDIRECTIONAL);
afde3be1
AS
661 ret = dma_mapping_error(dev->dev, dma_dsts[i]);
662 if (ret) {
663 unmap_src(dev->dev, dma_srcs, len, src_cnt);
15b8a8ea
AS
664 unmap_dst(dev->dev, dma_dsts, params->buf_size,
665 i);
95019c8c
AS
666 thread_result_add(info, result,
667 DMATEST_ET_MAP_DST,
668 total_tests, src_off, dst_off,
669 len, ret);
afde3be1
AS
670 failed_tests++;
671 continue;
672 }
b54d5cb9
DW
673 }
674
675 if (thread->type == DMA_MEMCPY)
676 tx = dev->device_prep_dma_memcpy(chan,
677 dma_dsts[0] + dst_off,
678 dma_srcs[0], len,
679 flags);
680 else if (thread->type == DMA_XOR)
681 tx = dev->device_prep_dma_xor(chan,
682 dma_dsts[0] + dst_off,
67b9124f 683 dma_srcs, src_cnt,
b54d5cb9 684 len, flags);
58691d64
DW
685 else if (thread->type == DMA_PQ) {
686 dma_addr_t dma_pq[dst_cnt];
687
688 for (i = 0; i < dst_cnt; i++)
689 dma_pq[i] = dma_dsts[i] + dst_off;
690 tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
94de648d 691 src_cnt, pq_coefs,
58691d64
DW
692 len, flags);
693 }
d86be86e 694
d86be86e 695 if (!tx) {
632fd283 696 unmap_src(dev->dev, dma_srcs, len, src_cnt);
15b8a8ea
AS
697 unmap_dst(dev->dev, dma_dsts, params->buf_size,
698 dst_cnt);
95019c8c
AS
699 thread_result_add(info, result, DMATEST_ET_PREP,
700 total_tests, src_off, dst_off,
701 len, 0);
d86be86e
AN
702 msleep(100);
703 failed_tests++;
704 continue;
705 }
e44e0aa3 706
adfa543e 707 done.done = false;
e44e0aa3 708 tx->callback = dmatest_callback;
adfa543e 709 tx->callback_param = &done;
d86be86e
AN
710 cookie = tx->tx_submit(tx);
711
4a776f0a 712 if (dma_submit_error(cookie)) {
95019c8c
AS
713 thread_result_add(info, result, DMATEST_ET_SUBMIT,
714 total_tests, src_off, dst_off,
715 len, cookie);
4a776f0a
HS
716 msleep(100);
717 failed_tests++;
718 continue;
719 }
b54d5cb9 720 dma_async_issue_pending(chan);
4a776f0a 721
bcc567e3 722 wait_event_freezable_timeout(done_wait, done.done,
15b8a8ea 723 msecs_to_jiffies(params->timeout));
981ed70d 724
e44e0aa3 725 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
4a776f0a 726
adfa543e
TH
727 if (!done.done) {
728 /*
729 * We're leaving the timed out dma operation with
730 * dangling pointer to done_wait. To make this
731 * correct, we'll need to allocate wait_done for
732 * each test iteration and perform "who's gonna
733 * free it this time?" dancing. For now, just
734 * leave it dangling.
735 */
95019c8c
AS
736 thread_result_add(info, result, DMATEST_ET_TIMEOUT,
737 total_tests, src_off, dst_off,
738 len, 0);
e44e0aa3
DW
739 failed_tests++;
740 continue;
741 } else if (status != DMA_SUCCESS) {
95019c8c
AS
742 enum dmatest_error_type type = (status == DMA_ERROR) ?
743 DMATEST_ET_DMA_ERROR : DMATEST_ET_DMA_IN_PROGRESS;
744 thread_result_add(info, result, type,
745 total_tests, src_off, dst_off,
746 len, status);
4a776f0a
HS
747 failed_tests++;
748 continue;
749 }
e44e0aa3 750
d1cab34c
BZ
751 /* Unmap by myself */
752 unmap_src(dev->dev, dma_srcs, len, src_cnt);
15b8a8ea 753 unmap_dst(dev->dev, dma_dsts, params->buf_size, dst_cnt);
4a776f0a
HS
754
755 error_count = 0;
756
757 pr_debug("%s: verifying source buffer...\n", thread_name);
d86b2f29
AS
758 error_count += verify_result_add(info, result, total_tests,
759 src_off, dst_off, len, thread->srcs, -1,
4a776f0a 760 0, PATTERN_SRC, true);
d86b2f29
AS
761 error_count += verify_result_add(info, result, total_tests,
762 src_off, dst_off, len, thread->srcs, 0,
763 src_off, PATTERN_SRC | PATTERN_COPY, true);
764 error_count += verify_result_add(info, result, total_tests,
765 src_off, dst_off, len, thread->srcs, 1,
766 src_off + len, PATTERN_SRC, true);
767
768 pr_debug("%s: verifying dest buffer...\n", thread_name);
769 error_count += verify_result_add(info, result, total_tests,
770 src_off, dst_off, len, thread->dsts, -1,
4a776f0a 771 0, PATTERN_DST, false);
d86b2f29
AS
772 error_count += verify_result_add(info, result, total_tests,
773 src_off, dst_off, len, thread->dsts, 0,
774 src_off, PATTERN_SRC | PATTERN_COPY, false);
775 error_count += verify_result_add(info, result, total_tests,
776 src_off, dst_off, len, thread->dsts, 1,
777 dst_off + len, PATTERN_DST, false);
4a776f0a
HS
778
779 if (error_count) {
95019c8c
AS
780 thread_result_add(info, result, DMATEST_ET_VERIFY,
781 total_tests, src_off, dst_off,
782 len, error_count);
4a776f0a
HS
783 failed_tests++;
784 } else {
95019c8c
AS
785 thread_result_add(info, result, DMATEST_ET_OK,
786 total_tests, src_off, dst_off,
787 len, 0);
4a776f0a
HS
788 }
789 }
790
791 ret = 0;
b54d5cb9
DW
792 for (i = 0; thread->dsts[i]; i++)
793 kfree(thread->dsts[i]);
4a776f0a 794err_dstbuf:
b54d5cb9
DW
795 kfree(thread->dsts);
796err_dsts:
797 for (i = 0; thread->srcs[i]; i++)
798 kfree(thread->srcs[i]);
4a776f0a 799err_srcbuf:
b54d5cb9
DW
800 kfree(thread->srcs);
801err_srcs:
945b5af3
AS
802 kfree(pq_coefs);
803err_thread_type:
4a776f0a
HS
804 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
805 thread_name, total_tests, failed_tests, ret);
0a2ff57d 806
9704efaa 807 /* terminate all transfers on specified channels */
5e034f7b
SH
808 if (ret)
809 dmaengine_terminate_all(chan);
810
3e5ccd86
AS
811 thread->done = true;
812
15b8a8ea 813 if (params->iterations > 0)
0a2ff57d 814 while (!kthread_should_stop()) {
b953df7c 815 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
0a2ff57d
NF
816 interruptible_sleep_on(&wait_dmatest_exit);
817 }
818
4a776f0a
HS
819 return ret;
820}
821
822static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
823{
824 struct dmatest_thread *thread;
825 struct dmatest_thread *_thread;
826 int ret;
827
828 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
829 ret = kthread_stop(thread->task);
830 pr_debug("dmatest: thread %s exited with status %d\n",
831 thread->task->comm, ret);
832 list_del(&thread->node);
833 kfree(thread);
834 }
9704efaa
VK
835
836 /* terminate all transfers on specified channels */
944ea4dd 837 dmaengine_terminate_all(dtc->chan);
9704efaa 838
4a776f0a
HS
839 kfree(dtc);
840}
841
e03e93a9
AS
842static int dmatest_add_threads(struct dmatest_info *info,
843 struct dmatest_chan *dtc, enum dma_transaction_type type)
4a776f0a 844{
15b8a8ea 845 struct dmatest_params *params = &info->params;
b54d5cb9
DW
846 struct dmatest_thread *thread;
847 struct dma_chan *chan = dtc->chan;
848 char *op;
849 unsigned int i;
4a776f0a 850
b54d5cb9
DW
851 if (type == DMA_MEMCPY)
852 op = "copy";
853 else if (type == DMA_XOR)
854 op = "xor";
58691d64
DW
855 else if (type == DMA_PQ)
856 op = "pq";
b54d5cb9
DW
857 else
858 return -EINVAL;
4a776f0a 859
15b8a8ea 860 for (i = 0; i < params->threads_per_chan; i++) {
4a776f0a
HS
861 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
862 if (!thread) {
b54d5cb9
DW
863 pr_warning("dmatest: No memory for %s-%s%u\n",
864 dma_chan_name(chan), op, i);
865
4a776f0a
HS
866 break;
867 }
e03e93a9 868 thread->info = info;
4a776f0a 869 thread->chan = dtc->chan;
b54d5cb9 870 thread->type = type;
4a776f0a 871 smp_wmb();
b54d5cb9
DW
872 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
873 dma_chan_name(chan), op, i);
4a776f0a 874 if (IS_ERR(thread->task)) {
b54d5cb9
DW
875 pr_warning("dmatest: Failed to run thread %s-%s%u\n",
876 dma_chan_name(chan), op, i);
4a776f0a
HS
877 kfree(thread);
878 break;
879 }
880
881 /* srcbuf and dstbuf are allocated by the thread itself */
882
883 list_add_tail(&thread->node, &dtc->threads);
884 }
885
b54d5cb9
DW
886 return i;
887}
888
e03e93a9
AS
889static int dmatest_add_channel(struct dmatest_info *info,
890 struct dma_chan *chan)
b54d5cb9
DW
891{
892 struct dmatest_chan *dtc;
893 struct dma_device *dma_dev = chan->device;
894 unsigned int thread_count = 0;
b9033e68 895 int cnt;
b54d5cb9
DW
896
897 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
898 if (!dtc) {
899 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
900 return -ENOMEM;
901 }
902
903 dtc->chan = chan;
904 INIT_LIST_HEAD(&dtc->threads);
905
906 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
e03e93a9 907 cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
f1aef8b6 908 thread_count += cnt > 0 ? cnt : 0;
b54d5cb9
DW
909 }
910 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
e03e93a9 911 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
f1aef8b6 912 thread_count += cnt > 0 ? cnt : 0;
b54d5cb9 913 }
58691d64 914 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
e03e93a9 915 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
d07a74a5 916 thread_count += cnt > 0 ? cnt : 0;
58691d64 917 }
b54d5cb9
DW
918
919 pr_info("dmatest: Started %u threads using %s\n",
920 thread_count, dma_chan_name(chan));
4a776f0a 921
838cc704
AS
922 list_add_tail(&dtc->node, &info->channels);
923 info->nr_channels++;
4a776f0a 924
33df8ca0 925 return 0;
4a776f0a
HS
926}
927
7dd60251 928static bool filter(struct dma_chan *chan, void *param)
4a776f0a 929{
15b8a8ea 930 struct dmatest_params *params = param;
e03e93a9 931
15b8a8ea
AS
932 if (!dmatest_match_channel(params, chan) ||
933 !dmatest_match_device(params, chan->device))
7dd60251 934 return false;
33df8ca0 935 else
7dd60251 936 return true;
4a776f0a
HS
937}
938
851b7e16 939static int __run_threaded_test(struct dmatest_info *info)
4a776f0a 940{
33df8ca0
DW
941 dma_cap_mask_t mask;
942 struct dma_chan *chan;
15b8a8ea 943 struct dmatest_params *params = &info->params;
33df8ca0
DW
944 int err = 0;
945
946 dma_cap_zero(mask);
947 dma_cap_set(DMA_MEMCPY, mask);
948 for (;;) {
15b8a8ea 949 chan = dma_request_channel(mask, filter, params);
33df8ca0 950 if (chan) {
e03e93a9 951 err = dmatest_add_channel(info, chan);
c56c81ab 952 if (err) {
33df8ca0
DW
953 dma_release_channel(chan);
954 break; /* add_channel failed, punt */
955 }
956 } else
957 break; /* no more channels available */
15b8a8ea
AS
958 if (params->max_channels &&
959 info->nr_channels >= params->max_channels)
33df8ca0
DW
960 break; /* we have all we need */
961 }
33df8ca0 962 return err;
4a776f0a 963}
4a776f0a 964
851b7e16
AS
965#ifndef MODULE
966static int run_threaded_test(struct dmatest_info *info)
967{
968 int ret;
969
970 mutex_lock(&info->lock);
971 ret = __run_threaded_test(info);
972 mutex_unlock(&info->lock);
973 return ret;
974}
975#endif
976
977static void __stop_threaded_test(struct dmatest_info *info)
4a776f0a 978{
33df8ca0 979 struct dmatest_chan *dtc, *_dtc;
7cbd4877 980 struct dma_chan *chan;
33df8ca0 981
838cc704 982 list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
33df8ca0 983 list_del(&dtc->node);
7cbd4877 984 chan = dtc->chan;
33df8ca0 985 dmatest_cleanup_channel(dtc);
838cc704 986 pr_debug("dmatest: dropped channel %s\n", dma_chan_name(chan));
7cbd4877 987 dma_release_channel(chan);
33df8ca0 988 }
838cc704
AS
989
990 info->nr_channels = 0;
4a776f0a 991}
e03e93a9 992
851b7e16
AS
993static void stop_threaded_test(struct dmatest_info *info)
994{
995 mutex_lock(&info->lock);
996 __stop_threaded_test(info);
997 mutex_unlock(&info->lock);
998}
999
1000static int __restart_threaded_test(struct dmatest_info *info, bool run)
1001{
1002 struct dmatest_params *params = &info->params;
851b7e16
AS
1003
1004 /* Stop any running test first */
1005 __stop_threaded_test(info);
1006
1007 if (run == false)
1008 return 0;
1009
95019c8c
AS
1010 /* Clear results from previous run */
1011 result_free(info, NULL);
1012
851b7e16 1013 /* Copy test parameters */
a6c268d0
AS
1014 params->buf_size = test_buf_size;
1015 strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
1016 strlcpy(params->device, strim(test_device), sizeof(params->device));
1017 params->threads_per_chan = threads_per_chan;
1018 params->max_channels = max_channels;
1019 params->iterations = iterations;
1020 params->xor_sources = xor_sources;
1021 params->pq_sources = pq_sources;
1022 params->timeout = timeout;
851b7e16
AS
1023
1024 /* Run test with new parameters */
bcc567e3
AS
1025 return __run_threaded_test(info);
1026}
1027
1028static bool __is_threaded_test_run(struct dmatest_info *info)
1029{
1030 struct dmatest_chan *dtc;
1031
1032 list_for_each_entry(dtc, &info->channels, node) {
1033 struct dmatest_thread *thread;
1034
1035 list_for_each_entry(thread, &dtc->threads, node) {
1036 if (!thread->done)
1037 return true;
1038 }
851b7e16
AS
1039 }
1040
bcc567e3 1041 return false;
851b7e16
AS
1042}
1043
851b7e16
AS
1044static ssize_t dtf_read_run(struct file *file, char __user *user_buf,
1045 size_t count, loff_t *ppos)
1046{
1047 struct dmatest_info *info = file->private_data;
1048 char buf[3];
1049
1050 mutex_lock(&info->lock);
3e5ccd86 1051
bcc567e3 1052 if (__is_threaded_test_run(info)) {
851b7e16 1053 buf[0] = 'Y';
3e5ccd86
AS
1054 } else {
1055 __stop_threaded_test(info);
851b7e16 1056 buf[0] = 'N';
3e5ccd86
AS
1057 }
1058
851b7e16
AS
1059 mutex_unlock(&info->lock);
1060 buf[1] = '\n';
1061 buf[2] = 0x00;
1062 return simple_read_from_buffer(user_buf, count, ppos, buf, 2);
1063}
1064
1065static ssize_t dtf_write_run(struct file *file, const char __user *user_buf,
1066 size_t count, loff_t *ppos)
1067{
1068 struct dmatest_info *info = file->private_data;
1069 char buf[16];
1070 bool bv;
1071 int ret = 0;
1072
1073 if (copy_from_user(buf, user_buf, min(count, (sizeof(buf) - 1))))
1074 return -EFAULT;
1075
1076 if (strtobool(buf, &bv) == 0) {
1077 mutex_lock(&info->lock);
bcc567e3
AS
1078
1079 if (__is_threaded_test_run(info))
1080 ret = -EBUSY;
1081 else
1082 ret = __restart_threaded_test(info, bv);
1083
851b7e16
AS
1084 mutex_unlock(&info->lock);
1085 }
1086
1087 return ret ? ret : count;
1088}
1089
1090static const struct file_operations dtf_run_fops = {
1091 .read = dtf_read_run,
1092 .write = dtf_write_run,
1093 .open = simple_open,
1094 .llseek = default_llseek,
1095};
1096
95019c8c
AS
1097static int dtf_results_show(struct seq_file *sf, void *data)
1098{
1099 struct dmatest_info *info = sf->private;
1100 struct dmatest_result *result;
1101 struct dmatest_thread_result *tr;
d86b2f29 1102 unsigned int i;
95019c8c
AS
1103
1104 mutex_lock(&info->results_lock);
1105 list_for_each_entry(result, &info->results, node) {
d86b2f29 1106 list_for_each_entry(tr, &result->results, node) {
95019c8c
AS
1107 seq_printf(sf, "%s\n",
1108 thread_result_get(result->name, tr));
d86b2f29
AS
1109 if (tr->type == DMATEST_ET_VERIFY_BUF) {
1110 for (i = 0; i < tr->vr->error_count; i++) {
1111 seq_printf(sf, "\t%s\n",
1112 verify_result_get_one(tr->vr, i));
1113 }
1114 }
1115 }
95019c8c
AS
1116 }
1117
1118 mutex_unlock(&info->results_lock);
1119 return 0;
1120}
1121
1122static int dtf_results_open(struct inode *inode, struct file *file)
1123{
1124 return single_open(file, dtf_results_show, inode->i_private);
1125}
1126
1127static const struct file_operations dtf_results_fops = {
1128 .open = dtf_results_open,
1129 .read = seq_read,
1130 .llseek = seq_lseek,
1131 .release = single_release,
1132};
1133
851b7e16
AS
1134static int dmatest_register_dbgfs(struct dmatest_info *info)
1135{
1136 struct dentry *d;
851b7e16
AS
1137
1138 d = debugfs_create_dir("dmatest", NULL);
1139 if (IS_ERR(d))
1140 return PTR_ERR(d);
1141 if (!d)
1142 goto err_root;
1143
1144 info->root = d;
1145
851b7e16 1146 /* Run or stop threaded test */
e24775e4
AS
1147 debugfs_create_file("run", S_IWUSR | S_IRUGO, info->root, info,
1148 &dtf_run_fops);
851b7e16 1149
95019c8c 1150 /* Results of test in progress */
e24775e4
AS
1151 debugfs_create_file("results", S_IRUGO, info->root, info,
1152 &dtf_results_fops);
95019c8c 1153
851b7e16
AS
1154 return 0;
1155
851b7e16
AS
1156err_root:
1157 pr_err("dmatest: Failed to initialize debugfs\n");
e24775e4 1158 return -ENOMEM;
851b7e16
AS
1159}
1160
e03e93a9
AS
1161static int __init dmatest_init(void)
1162{
1163 struct dmatest_info *info = &test_info;
851b7e16 1164 int ret;
e03e93a9
AS
1165
1166 memset(info, 0, sizeof(*info));
1167
851b7e16 1168 mutex_init(&info->lock);
838cc704
AS
1169 INIT_LIST_HEAD(&info->channels);
1170
95019c8c
AS
1171 mutex_init(&info->results_lock);
1172 INIT_LIST_HEAD(&info->results);
1173
851b7e16
AS
1174 ret = dmatest_register_dbgfs(info);
1175 if (ret)
1176 return ret;
1177
1178#ifdef MODULE
1179 return 0;
1180#else
e03e93a9 1181 return run_threaded_test(info);
851b7e16 1182#endif
e03e93a9
AS
1183}
1184/* when compiled-in wait for drivers to load first */
1185late_initcall(dmatest_init);
1186
1187static void __exit dmatest_exit(void)
1188{
1189 struct dmatest_info *info = &test_info;
1190
851b7e16 1191 debugfs_remove_recursive(info->root);
e03e93a9 1192 stop_threaded_test(info);
95019c8c 1193 result_free(info, NULL);
e03e93a9 1194}
4a776f0a
HS
1195module_exit(dmatest_exit);
1196
e05503ef 1197MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
4a776f0a 1198MODULE_LICENSE("GPL v2");