Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
4a776f0a HS |
2 | /* |
3 | * DMA Engine test module | |
4 | * | |
5 | * Copyright (C) 2007 Atmel Corporation | |
851b7e16 | 6 | * Copyright (C) 2013 Intel Corporation |
4a776f0a | 7 | */ |
872f05c6 DW |
8 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
9 | ||
ef759e4a | 10 | #include <linux/err.h> |
4a776f0a | 11 | #include <linux/delay.h> |
b7f080cf | 12 | #include <linux/dma-mapping.h> |
4a776f0a | 13 | #include <linux/dmaengine.h> |
981ed70d | 14 | #include <linux/freezer.h> |
4a776f0a HS |
15 | #include <linux/init.h> |
16 | #include <linux/kthread.h> | |
0881e7bd | 17 | #include <linux/sched/task.h> |
4a776f0a HS |
18 | #include <linux/module.h> |
19 | #include <linux/moduleparam.h> | |
20 | #include <linux/random.h> | |
5a0e3ad6 | 21 | #include <linux/slab.h> |
4a776f0a HS |
22 | #include <linux/wait.h> |
23 | ||
24 | static unsigned int test_buf_size = 16384; | |
e8ecf73a | 25 | module_param(test_buf_size, uint, 0644); |
4a776f0a HS |
26 | MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer"); |
27 | ||
a85159fe | 28 | static char test_device[32]; |
e8ecf73a | 29 | module_param_string(device, test_device, sizeof(test_device), 0644); |
4a776f0a HS |
30 | MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)"); |
31 | ||
32 | static unsigned int threads_per_chan = 1; | |
e8ecf73a | 33 | module_param(threads_per_chan, uint, 0644); |
4a776f0a HS |
34 | MODULE_PARM_DESC(threads_per_chan, |
35 | "Number of threads to start per channel (default: 1)"); | |
36 | ||
37 | static unsigned int max_channels; | |
e8ecf73a | 38 | module_param(max_channels, uint, 0644); |
33df8ca0 | 39 | MODULE_PARM_DESC(max_channels, |
4a776f0a HS |
40 | "Maximum number of channels to use (default: all)"); |
41 | ||
0a2ff57d | 42 | static unsigned int iterations; |
e8ecf73a | 43 | module_param(iterations, uint, 0644); |
0a2ff57d NF |
44 | MODULE_PARM_DESC(iterations, |
45 | "Iterations before stopping test (default: infinite)"); | |
46 | ||
d8646724 | 47 | static unsigned int dmatest; |
e8ecf73a | 48 | module_param(dmatest, uint, 0644); |
a0d4cb44 | 49 | MODULE_PARM_DESC(dmatest, |
c678fa66 | 50 | "dmatest 0-memcpy 1-memset (default: 0)"); |
a0d4cb44 | 51 | |
b54d5cb9 | 52 | static unsigned int xor_sources = 3; |
e8ecf73a | 53 | module_param(xor_sources, uint, 0644); |
b54d5cb9 DW |
54 | MODULE_PARM_DESC(xor_sources, |
55 | "Number of xor source buffers (default: 3)"); | |
56 | ||
58691d64 | 57 | static unsigned int pq_sources = 3; |
e8ecf73a | 58 | module_param(pq_sources, uint, 0644); |
58691d64 DW |
59 | MODULE_PARM_DESC(pq_sources, |
60 | "Number of p+q source buffers (default: 3)"); | |
61 | ||
d42efe6b | 62 | static int timeout = 3000; |
e8ecf73a | 63 | module_param(timeout, int, 0644); |
85ee7a1d | 64 | MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), " |
85f78cec | 65 | "Pass -1 for infinite timeout"); |
d42efe6b | 66 | |
e3b9c347 | 67 | static bool noverify; |
e8ecf73a | 68 | module_param(noverify, bool, 0644); |
2e67a087 YS |
69 | MODULE_PARM_DESC(noverify, "Disable data verification (default: verify)"); |
70 | ||
71 | static bool norandom; | |
72 | module_param(norandom, bool, 0644); | |
73 | MODULE_PARM_DESC(norandom, "Disable random offset setup (default: random)"); | |
4a776f0a | 74 | |
50137a7d | 75 | static bool verbose; |
e8ecf73a | 76 | module_param(verbose, bool, 0644); |
50137a7d | 77 | MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)"); |
4a776f0a | 78 | |
a875abfa SA |
79 | static int alignment = -1; |
80 | module_param(alignment, int, 0644); | |
81 | MODULE_PARM_DESC(alignment, "Custom data address alignment taken as 2^(alignment) (default: not used (-1))"); | |
82 | ||
13396a13 SA |
83 | static unsigned int transfer_size; |
84 | module_param(transfer_size, uint, 0644); | |
85 | MODULE_PARM_DESC(transfer_size, "Optional custom transfer size in bytes (default: not used (0))"); | |
86 | ||
7f2b7226 | 87 | static bool polled; |
e8ecf73a | 88 | module_param(polled, bool, 0644); |
7f2b7226 AS |
89 | MODULE_PARM_DESC(polled, "Use polling for completion instead of interrupts"); |
90 | ||
e03e93a9 | 91 | /** |
15b8a8ea | 92 | * struct dmatest_params - test parameters. |
e03e93a9 AS |
93 | * @buf_size: size of the memcpy test buffer |
94 | * @channel: bus ID of the channel to test | |
95 | * @device: bus ID of the DMA Engine to test | |
96 | * @threads_per_chan: number of threads to start per channel | |
97 | * @max_channels: maximum number of channels to use | |
98 | * @iterations: iterations before stopping test | |
99 | * @xor_sources: number of xor source buffers | |
100 | * @pq_sources: number of p+q source buffers | |
85f78cec | 101 | * @timeout: transfer timeout in msec, -1 for infinite timeout |
7f2b7226 AS |
102 | * @noverify: disable data verification |
103 | * @norandom: disable random offset setup | |
104 | * @alignment: custom data address alignment taken as 2^alignment | |
105 | * @transfer_size: custom transfer size in bytes | |
106 | * @polled: use polling for completion instead of interrupts | |
e03e93a9 | 107 | */ |
15b8a8ea | 108 | struct dmatest_params { |
e03e93a9 AS |
109 | unsigned int buf_size; |
110 | char channel[20]; | |
a85159fe | 111 | char device[32]; |
e03e93a9 AS |
112 | unsigned int threads_per_chan; |
113 | unsigned int max_channels; | |
114 | unsigned int iterations; | |
115 | unsigned int xor_sources; | |
116 | unsigned int pq_sources; | |
85f78cec | 117 | int timeout; |
e3b9c347 | 118 | bool noverify; |
2e67a087 | 119 | bool norandom; |
a875abfa | 120 | int alignment; |
13396a13 | 121 | unsigned int transfer_size; |
fb9816f9 | 122 | bool polled; |
15b8a8ea AS |
123 | }; |
124 | ||
125 | /** | |
126 | * struct dmatest_info - test information. | |
127 | * @params: test parameters | |
5332f8b1 AS |
128 | * @channels: channels under test |
129 | * @nr_channels: number of channels under test | |
851b7e16 | 130 | * @lock: access protection to the fields of this structure |
5332f8b1 | 131 | * @did_init: module has been initialized completely |
ce65d55f | 132 | * @last_error: test has faced configuration issues |
15b8a8ea | 133 | */ |
a310d037 | 134 | static struct dmatest_info { |
15b8a8ea AS |
135 | /* Test parameters */ |
136 | struct dmatest_params params; | |
838cc704 AS |
137 | |
138 | /* Internal state */ | |
139 | struct list_head channels; | |
140 | unsigned int nr_channels; | |
ce65d55f | 141 | int last_error; |
851b7e16 | 142 | struct mutex lock; |
a310d037 DW |
143 | bool did_init; |
144 | } test_info = { | |
145 | .channels = LIST_HEAD_INIT(test_info.channels), | |
146 | .lock = __MUTEX_INITIALIZER(test_info.lock), | |
147 | }; | |
851b7e16 | 148 | |
a310d037 DW |
149 | static int dmatest_run_set(const char *val, const struct kernel_param *kp); |
150 | static int dmatest_run_get(char *val, const struct kernel_param *kp); | |
9c27847d | 151 | static const struct kernel_param_ops run_ops = { |
a310d037 DW |
152 | .set = dmatest_run_set, |
153 | .get = dmatest_run_get, | |
e03e93a9 | 154 | }; |
a310d037 | 155 | static bool dmatest_run; |
e8ecf73a | 156 | module_param_cb(run, &run_ops, &dmatest_run, 0644); |
a310d037 | 157 | MODULE_PARM_DESC(run, "Run the test (default: false)"); |
e03e93a9 | 158 | |
d53513d5 SA |
159 | static int dmatest_chan_set(const char *val, const struct kernel_param *kp); |
160 | static int dmatest_chan_get(char *val, const struct kernel_param *kp); | |
161 | static const struct kernel_param_ops multi_chan_ops = { | |
162 | .set = dmatest_chan_set, | |
163 | .get = dmatest_chan_get, | |
164 | }; | |
165 | ||
166 | static char test_channel[20]; | |
167 | static struct kparam_string newchan_kps = { | |
168 | .string = test_channel, | |
169 | .maxlen = 20, | |
170 | }; | |
171 | module_param_cb(channel, &multi_chan_ops, &newchan_kps, 0644); | |
172 | MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)"); | |
173 | ||
174 | static int dmatest_test_list_get(char *val, const struct kernel_param *kp); | |
175 | static const struct kernel_param_ops test_list_ops = { | |
176 | .get = dmatest_test_list_get, | |
177 | }; | |
178 | module_param_cb(test_list, &test_list_ops, NULL, 0444); | |
179 | MODULE_PARM_DESC(test_list, "Print current test list"); | |
180 | ||
a310d037 DW |
181 | /* Maximum amount of mismatched bytes in buffer to print */ |
182 | #define MAX_ERROR_COUNT 32 | |
183 | ||
184 | /* | |
185 | * Initialization patterns. All bytes in the source buffer has bit 7 | |
186 | * set, all bytes in the destination buffer has bit 7 cleared. | |
187 | * | |
188 | * Bit 6 is set for all bytes which are to be copied by the DMA | |
189 | * engine. Bit 5 is set for all bytes which are to be overwritten by | |
190 | * the DMA engine. | |
191 | * | |
192 | * The remaining bits are the inverse of a counter which increments by | |
193 | * one for each byte address. | |
194 | */ | |
195 | #define PATTERN_SRC 0x80 | |
196 | #define PATTERN_DST 0x00 | |
197 | #define PATTERN_COPY 0x40 | |
198 | #define PATTERN_OVERWRITE 0x20 | |
199 | #define PATTERN_COUNT_MASK 0x1f | |
61b5f54d | 200 | #define PATTERN_MEMSET_IDX 0x01 |
851b7e16 | 201 | |
6138f967 SA |
202 | /* Fixed point arithmetic ops */ |
203 | #define FIXPT_SHIFT 8 | |
204 | #define FIXPNT_MASK 0xFF | |
205 | #define FIXPT_TO_INT(a) ((a) >> FIXPT_SHIFT) | |
206 | #define INT_TO_FIXPT(a) ((a) << FIXPT_SHIFT) | |
207 | #define FIXPT_GET_FRAC(a) ((((a) & FIXPNT_MASK) * 100) >> FIXPT_SHIFT) | |
208 | ||
6f6a23a2 AW |
209 | /* poor man's completion - we want to use wait_event_freezable() on it */ |
210 | struct dmatest_done { | |
211 | bool done; | |
212 | wait_queue_head_t *wait; | |
213 | }; | |
214 | ||
361deb72 AA |
215 | struct dmatest_data { |
216 | u8 **raw; | |
217 | u8 **aligned; | |
218 | unsigned int cnt; | |
219 | unsigned int off; | |
220 | }; | |
221 | ||
a310d037 DW |
222 | struct dmatest_thread { |
223 | struct list_head node; | |
224 | struct dmatest_info *info; | |
225 | struct task_struct *task; | |
226 | struct dma_chan *chan; | |
361deb72 AA |
227 | struct dmatest_data src; |
228 | struct dmatest_data dst; | |
a310d037 | 229 | enum dma_transaction_type type; |
6f6a23a2 AW |
230 | wait_queue_head_t done_wait; |
231 | struct dmatest_done test_done; | |
a310d037 | 232 | bool done; |
d53513d5 | 233 | bool pending; |
a310d037 | 234 | }; |
95019c8c | 235 | |
a310d037 DW |
236 | struct dmatest_chan { |
237 | struct list_head node; | |
238 | struct dma_chan *chan; | |
239 | struct list_head threads; | |
e03e93a9 AS |
240 | }; |
241 | ||
2d88ce76 DW |
242 | static DECLARE_WAIT_QUEUE_HEAD(thread_wait); |
243 | static bool wait; | |
244 | ||
245 | static bool is_threaded_test_run(struct dmatest_info *info) | |
246 | { | |
247 | struct dmatest_chan *dtc; | |
248 | ||
249 | list_for_each_entry(dtc, &info->channels, node) { | |
250 | struct dmatest_thread *thread; | |
251 | ||
252 | list_for_each_entry(thread, &dtc->threads, node) { | |
aa72f1d2 | 253 | if (!thread->done && !thread->pending) |
2d88ce76 DW |
254 | return true; |
255 | } | |
256 | } | |
257 | ||
258 | return false; | |
259 | } | |
260 | ||
d53513d5 SA |
261 | static bool is_threaded_test_pending(struct dmatest_info *info) |
262 | { | |
263 | struct dmatest_chan *dtc; | |
264 | ||
265 | list_for_each_entry(dtc, &info->channels, node) { | |
266 | struct dmatest_thread *thread; | |
267 | ||
268 | list_for_each_entry(thread, &dtc->threads, node) { | |
269 | if (thread->pending) | |
270 | return true; | |
271 | } | |
272 | } | |
273 | ||
274 | return false; | |
275 | } | |
276 | ||
2d88ce76 DW |
277 | static int dmatest_wait_get(char *val, const struct kernel_param *kp) |
278 | { | |
279 | struct dmatest_info *info = &test_info; | |
280 | struct dmatest_params *params = &info->params; | |
281 | ||
282 | if (params->iterations) | |
283 | wait_event(thread_wait, !is_threaded_test_run(info)); | |
284 | wait = true; | |
285 | return param_get_bool(val, kp); | |
286 | } | |
287 | ||
9c27847d | 288 | static const struct kernel_param_ops wait_ops = { |
2d88ce76 DW |
289 | .get = dmatest_wait_get, |
290 | .set = param_set_bool, | |
291 | }; | |
e8ecf73a | 292 | module_param_cb(wait, &wait_ops, &wait, 0444); |
2d88ce76 | 293 | MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)"); |
e03e93a9 | 294 | |
15b8a8ea | 295 | static bool dmatest_match_channel(struct dmatest_params *params, |
e03e93a9 | 296 | struct dma_chan *chan) |
4a776f0a | 297 | { |
15b8a8ea | 298 | if (params->channel[0] == '\0') |
4a776f0a | 299 | return true; |
15b8a8ea | 300 | return strcmp(dma_chan_name(chan), params->channel) == 0; |
4a776f0a HS |
301 | } |
302 | ||
15b8a8ea | 303 | static bool dmatest_match_device(struct dmatest_params *params, |
e03e93a9 | 304 | struct dma_device *device) |
4a776f0a | 305 | { |
15b8a8ea | 306 | if (params->device[0] == '\0') |
4a776f0a | 307 | return true; |
15b8a8ea | 308 | return strcmp(dev_name(device->dev), params->device) == 0; |
4a776f0a HS |
309 | } |
310 | ||
311 | static unsigned long dmatest_random(void) | |
312 | { | |
313 | unsigned long buf; | |
314 | ||
197173db | 315 | get_random_bytes(&buf, sizeof(buf)); |
4a776f0a HS |
316 | return buf; |
317 | } | |
318 | ||
61b5f54d SK |
319 | static inline u8 gen_inv_idx(u8 index, bool is_memset) |
320 | { | |
321 | u8 val = is_memset ? PATTERN_MEMSET_IDX : index; | |
322 | ||
323 | return ~val & PATTERN_COUNT_MASK; | |
324 | } | |
325 | ||
326 | static inline u8 gen_src_value(u8 index, bool is_memset) | |
327 | { | |
328 | return PATTERN_SRC | gen_inv_idx(index, is_memset); | |
329 | } | |
330 | ||
331 | static inline u8 gen_dst_value(u8 index, bool is_memset) | |
332 | { | |
333 | return PATTERN_DST | gen_inv_idx(index, is_memset); | |
334 | } | |
335 | ||
e03e93a9 | 336 | static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len, |
61b5f54d | 337 | unsigned int buf_size, bool is_memset) |
4a776f0a HS |
338 | { |
339 | unsigned int i; | |
b54d5cb9 DW |
340 | u8 *buf; |
341 | ||
342 | for (; (buf = *bufs); bufs++) { | |
343 | for (i = 0; i < start; i++) | |
61b5f54d | 344 | buf[i] = gen_src_value(i, is_memset); |
b54d5cb9 | 345 | for ( ; i < start + len; i++) |
61b5f54d | 346 | buf[i] = gen_src_value(i, is_memset) | PATTERN_COPY; |
e03e93a9 | 347 | for ( ; i < buf_size; i++) |
61b5f54d | 348 | buf[i] = gen_src_value(i, is_memset); |
b54d5cb9 DW |
349 | buf++; |
350 | } | |
4a776f0a HS |
351 | } |
352 | ||
e03e93a9 | 353 | static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len, |
61b5f54d | 354 | unsigned int buf_size, bool is_memset) |
4a776f0a HS |
355 | { |
356 | unsigned int i; | |
b54d5cb9 DW |
357 | u8 *buf; |
358 | ||
359 | for (; (buf = *bufs); bufs++) { | |
360 | for (i = 0; i < start; i++) | |
61b5f54d | 361 | buf[i] = gen_dst_value(i, is_memset); |
b54d5cb9 | 362 | for ( ; i < start + len; i++) |
61b5f54d SK |
363 | buf[i] = gen_dst_value(i, is_memset) | |
364 | PATTERN_OVERWRITE; | |
e03e93a9 | 365 | for ( ; i < buf_size; i++) |
61b5f54d | 366 | buf[i] = gen_dst_value(i, is_memset); |
b54d5cb9 | 367 | } |
4a776f0a HS |
368 | } |
369 | ||
7b610178 | 370 | static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index, |
61b5f54d | 371 | unsigned int counter, bool is_srcbuf, bool is_memset) |
7b610178 DW |
372 | { |
373 | u8 diff = actual ^ pattern; | |
61b5f54d | 374 | u8 expected = pattern | gen_inv_idx(counter, is_memset); |
7b610178 DW |
375 | const char *thread_name = current->comm; |
376 | ||
377 | if (is_srcbuf) | |
378 | pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n", | |
379 | thread_name, index, expected, actual); | |
380 | else if ((pattern & PATTERN_COPY) | |
381 | && (diff & (PATTERN_COPY | PATTERN_OVERWRITE))) | |
382 | pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n", | |
383 | thread_name, index, expected, actual); | |
384 | else if (diff & PATTERN_SRC) | |
385 | pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n", | |
386 | thread_name, index, expected, actual); | |
387 | else | |
388 | pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n", | |
389 | thread_name, index, expected, actual); | |
390 | } | |
391 | ||
392 | static unsigned int dmatest_verify(u8 **bufs, unsigned int start, | |
393 | unsigned int end, unsigned int counter, u8 pattern, | |
61b5f54d | 394 | bool is_srcbuf, bool is_memset) |
4a776f0a HS |
395 | { |
396 | unsigned int i; | |
397 | unsigned int error_count = 0; | |
398 | u8 actual; | |
b54d5cb9 DW |
399 | u8 expected; |
400 | u8 *buf; | |
401 | unsigned int counter_orig = counter; | |
402 | ||
403 | for (; (buf = *bufs); bufs++) { | |
404 | counter = counter_orig; | |
405 | for (i = start; i < end; i++) { | |
406 | actual = buf[i]; | |
61b5f54d | 407 | expected = pattern | gen_inv_idx(counter, is_memset); |
b54d5cb9 | 408 | if (actual != expected) { |
7b610178 DW |
409 | if (error_count < MAX_ERROR_COUNT) |
410 | dmatest_mismatch(actual, pattern, i, | |
61b5f54d SK |
411 | counter, is_srcbuf, |
412 | is_memset); | |
b54d5cb9 DW |
413 | error_count++; |
414 | } | |
415 | counter++; | |
4a776f0a | 416 | } |
4a776f0a HS |
417 | } |
418 | ||
74b5c07a | 419 | if (error_count > MAX_ERROR_COUNT) |
7b610178 | 420 | pr_warn("%s: %u errors suppressed\n", |
74b5c07a | 421 | current->comm, error_count - MAX_ERROR_COUNT); |
4a776f0a HS |
422 | |
423 | return error_count; | |
424 | } | |
425 | ||
adfa543e TH |
426 | |
427 | static void dmatest_callback(void *arg) | |
e44e0aa3 | 428 | { |
adfa543e | 429 | struct dmatest_done *done = arg; |
6f6a23a2 | 430 | struct dmatest_thread *thread = |
66b3bd23 | 431 | container_of(done, struct dmatest_thread, test_done); |
6f6a23a2 AW |
432 | if (!thread->done) { |
433 | done->done = true; | |
434 | wake_up_all(done->wait); | |
435 | } else { | |
436 | /* | |
437 | * If thread->done, it means that this callback occurred | |
438 | * after the parent thread has cleaned up. This can | |
439 | * happen in the case that driver doesn't implement | |
440 | * the terminate_all() functionality and a dma operation | |
441 | * did not occur within the timeout period | |
442 | */ | |
443 | WARN(1, "dmatest: Kernel memory may be corrupted!!\n"); | |
444 | } | |
e44e0aa3 DW |
445 | } |
446 | ||
8be9e32b AM |
447 | static unsigned int min_odd(unsigned int x, unsigned int y) |
448 | { | |
449 | unsigned int val = min(x, y); | |
450 | ||
451 | return val % 2 ? val : val - 1; | |
452 | } | |
453 | ||
872f05c6 DW |
454 | static void result(const char *err, unsigned int n, unsigned int src_off, |
455 | unsigned int dst_off, unsigned int len, unsigned long data) | |
d86b2f29 | 456 | { |
ef759e4a AS |
457 | if (IS_ERR_VALUE(data)) { |
458 | pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%ld)\n", | |
459 | current->comm, n, err, src_off, dst_off, len, data); | |
460 | } else { | |
461 | pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n", | |
462 | current->comm, n, err, src_off, dst_off, len, data); | |
463 | } | |
d86b2f29 AS |
464 | } |
465 | ||
872f05c6 DW |
466 | static void dbg_result(const char *err, unsigned int n, unsigned int src_off, |
467 | unsigned int dst_off, unsigned int len, | |
468 | unsigned long data) | |
95019c8c | 469 | { |
2acec150 | 470 | pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n", |
a835bb85 | 471 | current->comm, n, err, src_off, dst_off, len, data); |
95019c8c AS |
472 | } |
473 | ||
a835bb85 AS |
474 | #define verbose_result(err, n, src_off, dst_off, len, data) ({ \ |
475 | if (verbose) \ | |
476 | result(err, n, src_off, dst_off, len, data); \ | |
477 | else \ | |
478 | dbg_result(err, n, src_off, dst_off, len, data);\ | |
50137a7d | 479 | }) |
95019c8c | 480 | |
86727443 | 481 | static unsigned long long dmatest_persec(s64 runtime, unsigned int val) |
d86b2f29 | 482 | { |
86727443 | 483 | unsigned long long per_sec = 1000000; |
d86b2f29 | 484 | |
86727443 DW |
485 | if (runtime <= 0) |
486 | return 0; | |
95019c8c | 487 | |
86727443 DW |
488 | /* drop precision until runtime is 32-bits */ |
489 | while (runtime > UINT_MAX) { | |
490 | runtime >>= 1; | |
491 | per_sec <<= 1; | |
95019c8c AS |
492 | } |
493 | ||
86727443 | 494 | per_sec *= val; |
6138f967 | 495 | per_sec = INT_TO_FIXPT(per_sec); |
86727443 | 496 | do_div(per_sec, runtime); |
6138f967 | 497 | |
86727443 | 498 | return per_sec; |
95019c8c AS |
499 | } |
500 | ||
86727443 | 501 | static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len) |
95019c8c | 502 | { |
6138f967 | 503 | return FIXPT_TO_INT(dmatest_persec(runtime, len >> 10)); |
95019c8c AS |
504 | } |
505 | ||
3b6679f9 AA |
506 | static void __dmatest_free_test_data(struct dmatest_data *d, unsigned int cnt) |
507 | { | |
508 | unsigned int i; | |
509 | ||
510 | for (i = 0; i < cnt; i++) | |
511 | kfree(d->raw[i]); | |
512 | ||
513 | kfree(d->aligned); | |
514 | kfree(d->raw); | |
515 | } | |
516 | ||
517 | static void dmatest_free_test_data(struct dmatest_data *d) | |
518 | { | |
519 | __dmatest_free_test_data(d, d->cnt); | |
520 | } | |
521 | ||
522 | static int dmatest_alloc_test_data(struct dmatest_data *d, | |
523 | unsigned int buf_size, u8 align) | |
524 | { | |
525 | unsigned int i = 0; | |
526 | ||
527 | d->raw = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL); | |
528 | if (!d->raw) | |
529 | return -ENOMEM; | |
530 | ||
531 | d->aligned = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL); | |
532 | if (!d->aligned) | |
533 | goto err; | |
534 | ||
535 | for (i = 0; i < d->cnt; i++) { | |
536 | d->raw[i] = kmalloc(buf_size + align, GFP_KERNEL); | |
537 | if (!d->raw[i]) | |
538 | goto err; | |
539 | ||
540 | /* align to alignment restriction */ | |
541 | if (align) | |
542 | d->aligned[i] = PTR_ALIGN(d->raw[i], align); | |
543 | else | |
544 | d->aligned[i] = d->raw[i]; | |
545 | } | |
546 | ||
547 | return 0; | |
548 | err: | |
549 | __dmatest_free_test_data(d, i); | |
550 | return -ENOMEM; | |
551 | } | |
552 | ||
4a776f0a HS |
553 | /* |
554 | * This function repeatedly tests DMA transfers of various lengths and | |
b54d5cb9 DW |
555 | * offsets for a given operation type until it is told to exit by |
556 | * kthread_stop(). There may be multiple threads running this function | |
557 | * in parallel for a single channel, and there may be multiple channels | |
558 | * being tested in parallel. | |
4a776f0a HS |
559 | * |
560 | * Before each test, the source and destination buffer is initialized | |
561 | * with a known pattern. This pattern is different depending on | |
562 | * whether it's in an area which is supposed to be copied or | |
563 | * overwritten, and different in the source and destination buffers. | |
564 | * So if the DMA engine doesn't copy exactly what we tell it to copy, | |
565 | * we'll notice. | |
566 | */ | |
567 | static int dmatest_func(void *data) | |
568 | { | |
569 | struct dmatest_thread *thread = data; | |
6f6a23a2 | 570 | struct dmatest_done *done = &thread->test_done; |
e03e93a9 | 571 | struct dmatest_info *info; |
15b8a8ea | 572 | struct dmatest_params *params; |
4a776f0a | 573 | struct dma_chan *chan; |
8be9e32b | 574 | struct dma_device *dev; |
adc0f941 | 575 | struct device *dma_dev; |
4a776f0a HS |
576 | unsigned int error_count; |
577 | unsigned int failed_tests = 0; | |
578 | unsigned int total_tests = 0; | |
579 | dma_cookie_t cookie; | |
580 | enum dma_status status; | |
5f89b97e | 581 | enum dma_ctrl_flags flags; |
945b5af3 | 582 | u8 *pq_coefs = NULL; |
4a776f0a | 583 | int ret; |
5f89b97e | 584 | unsigned int buf_size; |
361deb72 AA |
585 | struct dmatest_data *src; |
586 | struct dmatest_data *dst; | |
b54d5cb9 | 587 | int i; |
e9405ef0 | 588 | ktime_t ktime, start, diff; |
8b0e1953 TG |
589 | ktime_t filltime = 0; |
590 | ktime_t comparetime = 0; | |
86727443 DW |
591 | s64 runtime = 0; |
592 | unsigned long long total_len = 0; | |
6138f967 | 593 | unsigned long long iops = 0; |
d6481608 | 594 | u8 align = 0; |
61b5f54d | 595 | bool is_memset = false; |
72ef08bf LA |
596 | dma_addr_t *srcs; |
597 | dma_addr_t *dma_pq; | |
4a776f0a | 598 | |
adfa543e | 599 | set_freezable(); |
4a776f0a HS |
600 | |
601 | ret = -ENOMEM; | |
4a776f0a HS |
602 | |
603 | smp_rmb(); | |
d53513d5 | 604 | thread->pending = false; |
e03e93a9 | 605 | info = thread->info; |
15b8a8ea | 606 | params = &info->params; |
4a776f0a | 607 | chan = thread->chan; |
8be9e32b | 608 | dev = chan->device; |
adc0f941 PU |
609 | dma_dev = dmaengine_get_dma_device(chan); |
610 | ||
361deb72 AA |
611 | src = &thread->src; |
612 | dst = &thread->dst; | |
d6481608 | 613 | if (thread->type == DMA_MEMCPY) { |
a875abfa SA |
614 | align = params->alignment < 0 ? dev->copy_align : |
615 | params->alignment; | |
361deb72 | 616 | src->cnt = dst->cnt = 1; |
61b5f54d | 617 | } else if (thread->type == DMA_MEMSET) { |
a875abfa SA |
618 | align = params->alignment < 0 ? dev->fill_align : |
619 | params->alignment; | |
361deb72 | 620 | src->cnt = dst->cnt = 1; |
61b5f54d | 621 | is_memset = true; |
d6481608 | 622 | } else if (thread->type == DMA_XOR) { |
8be9e32b | 623 | /* force odd to ensure dst = src */ |
361deb72 AA |
624 | src->cnt = min_odd(params->xor_sources | 1, dev->max_xor); |
625 | dst->cnt = 1; | |
a875abfa SA |
626 | align = params->alignment < 0 ? dev->xor_align : |
627 | params->alignment; | |
58691d64 | 628 | } else if (thread->type == DMA_PQ) { |
8be9e32b | 629 | /* force odd to ensure dst = src */ |
361deb72 AA |
630 | src->cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0)); |
631 | dst->cnt = 2; | |
a875abfa SA |
632 | align = params->alignment < 0 ? dev->pq_align : |
633 | params->alignment; | |
945b5af3 | 634 | |
31d18257 | 635 | pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL); |
945b5af3 AS |
636 | if (!pq_coefs) |
637 | goto err_thread_type; | |
638 | ||
361deb72 | 639 | for (i = 0; i < src->cnt; i++) |
58691d64 | 640 | pq_coefs[i] = 1; |
b54d5cb9 | 641 | } else |
945b5af3 | 642 | goto err_thread_type; |
b54d5cb9 | 643 | |
787d3083 | 644 | /* Check if buffer count fits into map count variable (u8) */ |
361deb72 | 645 | if ((src->cnt + dst->cnt) >= 255) { |
787d3083 | 646 | pr_err("too many buffers (%d of 255 supported)\n", |
361deb72 | 647 | src->cnt + dst->cnt); |
3f3c7554 | 648 | goto err_free_coefs; |
787d3083 AA |
649 | } |
650 | ||
41d00bb7 AA |
651 | buf_size = params->buf_size; |
652 | if (1 << align > buf_size) { | |
787d3083 | 653 | pr_err("%u-byte buffer too small for %d-byte alignment\n", |
41d00bb7 | 654 | buf_size, 1 << align); |
3f3c7554 | 655 | goto err_free_coefs; |
787d3083 AA |
656 | } |
657 | ||
3b6679f9 | 658 | if (dmatest_alloc_test_data(src, buf_size, align) < 0) |
3f3c7554 | 659 | goto err_free_coefs; |
d6481608 | 660 | |
3b6679f9 AA |
661 | if (dmatest_alloc_test_data(dst, buf_size, align) < 0) |
662 | goto err_src; | |
b54d5cb9 | 663 | |
e44e0aa3 DW |
664 | set_user_nice(current, 10); |
665 | ||
361deb72 | 666 | srcs = kcalloc(src->cnt, sizeof(dma_addr_t), GFP_KERNEL); |
72ef08bf | 667 | if (!srcs) |
3b6679f9 | 668 | goto err_dst; |
72ef08bf | 669 | |
361deb72 | 670 | dma_pq = kcalloc(dst->cnt, sizeof(dma_addr_t), GFP_KERNEL); |
72ef08bf LA |
671 | if (!dma_pq) |
672 | goto err_srcs_array; | |
673 | ||
b203bd3f | 674 | /* |
d1cab34c | 675 | * src and dst buffers are freed by ourselves below |
b203bd3f | 676 | */ |
646728df | 677 | if (params->polled) |
fb9816f9 | 678 | flags = DMA_CTRL_ACK; |
646728df VK |
679 | else |
680 | flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; | |
4a776f0a | 681 | |
86727443 | 682 | ktime = ktime_get(); |
b9f96020 AS |
683 | while (!(kthread_should_stop() || |
684 | (params->iterations && total_tests >= params->iterations))) { | |
b54d5cb9 | 685 | struct dma_async_tx_descriptor *tx = NULL; |
4076e755 | 686 | struct dmaengine_unmap_data *um; |
4076e755 | 687 | dma_addr_t *dsts; |
361deb72 | 688 | unsigned int len; |
d86be86e | 689 | |
4a776f0a HS |
690 | total_tests++; |
691 | ||
13396a13 | 692 | if (params->transfer_size) { |
41d00bb7 | 693 | if (params->transfer_size >= buf_size) { |
13396a13 | 694 | pr_err("%u-byte transfer size must be lower than %u-buffer size\n", |
41d00bb7 | 695 | params->transfer_size, buf_size); |
13396a13 SA |
696 | break; |
697 | } | |
698 | len = params->transfer_size; | |
699 | } else if (params->norandom) { | |
41d00bb7 | 700 | len = buf_size; |
13396a13 | 701 | } else { |
41d00bb7 | 702 | len = dmatest_random() % buf_size + 1; |
13396a13 | 703 | } |
ede23a58 | 704 | |
13396a13 SA |
705 | /* Do not alter transfer size explicitly defined by user */ |
706 | if (!params->transfer_size) { | |
707 | len = (len >> align) << align; | |
708 | if (!len) | |
709 | len = 1 << align; | |
710 | } | |
ede23a58 AS |
711 | total_len += len; |
712 | ||
2e67a087 | 713 | if (params->norandom) { |
361deb72 AA |
714 | src->off = 0; |
715 | dst->off = 0; | |
e3b9c347 | 716 | } else { |
41d00bb7 AA |
717 | src->off = dmatest_random() % (buf_size - len + 1); |
718 | dst->off = dmatest_random() % (buf_size - len + 1); | |
e3b9c347 | 719 | |
361deb72 AA |
720 | src->off = (src->off >> align) << align; |
721 | dst->off = (dst->off >> align) << align; | |
2e67a087 | 722 | } |
e3b9c347 | 723 | |
2e67a087 YS |
724 | if (!params->noverify) { |
725 | start = ktime_get(); | |
361deb72 | 726 | dmatest_init_srcs(src->aligned, src->off, len, |
41d00bb7 | 727 | buf_size, is_memset); |
361deb72 | 728 | dmatest_init_dsts(dst->aligned, dst->off, len, |
41d00bb7 | 729 | buf_size, is_memset); |
e9405ef0 SK |
730 | |
731 | diff = ktime_sub(ktime_get(), start); | |
732 | filltime = ktime_add(filltime, diff); | |
e3b9c347 DW |
733 | } |
734 | ||
adc0f941 | 735 | um = dmaengine_get_unmap_data(dma_dev, src->cnt + dst->cnt, |
4076e755 DW |
736 | GFP_KERNEL); |
737 | if (!um) { | |
738 | failed_tests++; | |
739 | result("unmap data NULL", total_tests, | |
361deb72 | 740 | src->off, dst->off, len, ret); |
4076e755 DW |
741 | continue; |
742 | } | |
4a776f0a | 743 | |
41d00bb7 | 744 | um->len = buf_size; |
361deb72 AA |
745 | for (i = 0; i < src->cnt; i++) { |
746 | void *buf = src->aligned[i]; | |
4076e755 | 747 | struct page *pg = virt_to_page(buf); |
f62e5f61 | 748 | unsigned long pg_off = offset_in_page(buf); |
4076e755 | 749 | |
adc0f941 | 750 | um->addr[i] = dma_map_page(dma_dev, pg, pg_off, |
4076e755 | 751 | um->len, DMA_TO_DEVICE); |
361deb72 | 752 | srcs[i] = um->addr[i] + src->off; |
adc0f941 | 753 | ret = dma_mapping_error(dma_dev, um->addr[i]); |
afde3be1 | 754 | if (ret) { |
872f05c6 | 755 | result("src mapping error", total_tests, |
361deb72 | 756 | src->off, dst->off, len, ret); |
6454368a | 757 | goto error_unmap_continue; |
afde3be1 | 758 | } |
4076e755 | 759 | um->to_cnt++; |
b54d5cb9 | 760 | } |
d86be86e | 761 | /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */ |
361deb72 AA |
762 | dsts = &um->addr[src->cnt]; |
763 | for (i = 0; i < dst->cnt; i++) { | |
764 | void *buf = dst->aligned[i]; | |
4076e755 | 765 | struct page *pg = virt_to_page(buf); |
f62e5f61 | 766 | unsigned long pg_off = offset_in_page(buf); |
4076e755 | 767 | |
adc0f941 | 768 | dsts[i] = dma_map_page(dma_dev, pg, pg_off, um->len, |
4076e755 | 769 | DMA_BIDIRECTIONAL); |
adc0f941 | 770 | ret = dma_mapping_error(dma_dev, dsts[i]); |
afde3be1 | 771 | if (ret) { |
872f05c6 | 772 | result("dst mapping error", total_tests, |
361deb72 | 773 | src->off, dst->off, len, ret); |
6454368a | 774 | goto error_unmap_continue; |
afde3be1 | 775 | } |
4076e755 | 776 | um->bidi_cnt++; |
b54d5cb9 DW |
777 | } |
778 | ||
779 | if (thread->type == DMA_MEMCPY) | |
780 | tx = dev->device_prep_dma_memcpy(chan, | |
361deb72 | 781 | dsts[0] + dst->off, |
4076e755 | 782 | srcs[0], len, flags); |
61b5f54d SK |
783 | else if (thread->type == DMA_MEMSET) |
784 | tx = dev->device_prep_dma_memset(chan, | |
361deb72 AA |
785 | dsts[0] + dst->off, |
786 | *(src->aligned[0] + src->off), | |
61b5f54d | 787 | len, flags); |
b54d5cb9 DW |
788 | else if (thread->type == DMA_XOR) |
789 | tx = dev->device_prep_dma_xor(chan, | |
361deb72 AA |
790 | dsts[0] + dst->off, |
791 | srcs, src->cnt, | |
b54d5cb9 | 792 | len, flags); |
58691d64 | 793 | else if (thread->type == DMA_PQ) { |
361deb72 AA |
794 | for (i = 0; i < dst->cnt; i++) |
795 | dma_pq[i] = dsts[i] + dst->off; | |
4076e755 | 796 | tx = dev->device_prep_dma_pq(chan, dma_pq, srcs, |
361deb72 | 797 | src->cnt, pq_coefs, |
58691d64 DW |
798 | len, flags); |
799 | } | |
d86be86e | 800 | |
d86be86e | 801 | if (!tx) { |
361deb72 AA |
802 | result("prep error", total_tests, src->off, |
803 | dst->off, len, ret); | |
d86be86e | 804 | msleep(100); |
6454368a | 805 | goto error_unmap_continue; |
d86be86e | 806 | } |
e44e0aa3 | 807 | |
6f6a23a2 | 808 | done->done = false; |
fb9816f9 PU |
809 | if (!params->polled) { |
810 | tx->callback = dmatest_callback; | |
811 | tx->callback_param = done; | |
812 | } | |
d86be86e AN |
813 | cookie = tx->tx_submit(tx); |
814 | ||
4a776f0a | 815 | if (dma_submit_error(cookie)) { |
361deb72 AA |
816 | result("submit error", total_tests, src->off, |
817 | dst->off, len, ret); | |
4a776f0a | 818 | msleep(100); |
6454368a | 819 | goto error_unmap_continue; |
4a776f0a | 820 | } |
4a776f0a | 821 | |
fb9816f9 PU |
822 | if (params->polled) { |
823 | status = dma_sync_wait(chan, cookie); | |
824 | dmaengine_terminate_sync(chan); | |
825 | if (status == DMA_COMPLETE) | |
826 | done->done = true; | |
827 | } else { | |
828 | dma_async_issue_pending(chan); | |
829 | ||
830 | wait_event_freezable_timeout(thread->done_wait, | |
831 | done->done, | |
832 | msecs_to_jiffies(params->timeout)); | |
981ed70d | 833 | |
fb9816f9 PU |
834 | status = dma_async_is_tx_complete(chan, cookie, NULL, |
835 | NULL); | |
836 | } | |
4a776f0a | 837 | |
6f6a23a2 | 838 | if (!done->done) { |
361deb72 | 839 | result("test timed out", total_tests, src->off, dst->off, |
872f05c6 | 840 | len, 0); |
6454368a | 841 | goto error_unmap_continue; |
47ec7f09 DJ |
842 | } else if (status != DMA_COMPLETE && |
843 | !(dma_has_cap(DMA_COMPLETION_NO_ORDER, | |
844 | dev->cap_mask) && | |
845 | status == DMA_OUT_OF_ORDER)) { | |
872f05c6 DW |
846 | result(status == DMA_ERROR ? |
847 | "completion error status" : | |
361deb72 AA |
848 | "completion busy status", total_tests, src->off, |
849 | dst->off, len, ret); | |
6454368a | 850 | goto error_unmap_continue; |
4a776f0a | 851 | } |
e44e0aa3 | 852 | |
6454368a AS |
853 | dmaengine_unmap_put(um); |
854 | ||
e3b9c347 | 855 | if (params->noverify) { |
361deb72 AA |
856 | verbose_result("test passed", total_tests, src->off, |
857 | dst->off, len, 0); | |
e3b9c347 DW |
858 | continue; |
859 | } | |
4a776f0a | 860 | |
e9405ef0 | 861 | start = ktime_get(); |
872f05c6 | 862 | pr_debug("%s: verifying source buffer...\n", current->comm); |
361deb72 | 863 | error_count = dmatest_verify(src->aligned, 0, src->off, |
61b5f54d | 864 | 0, PATTERN_SRC, true, is_memset); |
361deb72 AA |
865 | error_count += dmatest_verify(src->aligned, src->off, |
866 | src->off + len, src->off, | |
61b5f54d | 867 | PATTERN_SRC | PATTERN_COPY, true, is_memset); |
361deb72 | 868 | error_count += dmatest_verify(src->aligned, src->off + len, |
41d00bb7 | 869 | buf_size, src->off + len, |
61b5f54d | 870 | PATTERN_SRC, true, is_memset); |
7b610178 | 871 | |
872f05c6 | 872 | pr_debug("%s: verifying dest buffer...\n", current->comm); |
361deb72 | 873 | error_count += dmatest_verify(dst->aligned, 0, dst->off, |
61b5f54d SK |
874 | 0, PATTERN_DST, false, is_memset); |
875 | ||
361deb72 AA |
876 | error_count += dmatest_verify(dst->aligned, dst->off, |
877 | dst->off + len, src->off, | |
61b5f54d SK |
878 | PATTERN_SRC | PATTERN_COPY, false, is_memset); |
879 | ||
361deb72 | 880 | error_count += dmatest_verify(dst->aligned, dst->off + len, |
41d00bb7 | 881 | buf_size, dst->off + len, |
61b5f54d | 882 | PATTERN_DST, false, is_memset); |
4a776f0a | 883 | |
e9405ef0 SK |
884 | diff = ktime_sub(ktime_get(), start); |
885 | comparetime = ktime_add(comparetime, diff); | |
886 | ||
4a776f0a | 887 | if (error_count) { |
361deb72 | 888 | result("data error", total_tests, src->off, dst->off, |
872f05c6 | 889 | len, error_count); |
4a776f0a HS |
890 | failed_tests++; |
891 | } else { | |
361deb72 AA |
892 | verbose_result("test passed", total_tests, src->off, |
893 | dst->off, len, 0); | |
4a776f0a | 894 | } |
6454368a AS |
895 | |
896 | continue; | |
897 | ||
898 | error_unmap_continue: | |
899 | dmaengine_unmap_put(um); | |
900 | failed_tests++; | |
4a776f0a | 901 | } |
e9405ef0 SK |
902 | ktime = ktime_sub(ktime_get(), ktime); |
903 | ktime = ktime_sub(ktime, comparetime); | |
904 | ktime = ktime_sub(ktime, filltime); | |
905 | runtime = ktime_to_us(ktime); | |
4a776f0a HS |
906 | |
907 | ret = 0; | |
72ef08bf LA |
908 | kfree(dma_pq); |
909 | err_srcs_array: | |
910 | kfree(srcs); | |
3b6679f9 AA |
911 | err_dst: |
912 | dmatest_free_test_data(dst); | |
913 | err_src: | |
914 | dmatest_free_test_data(src); | |
3f3c7554 | 915 | err_free_coefs: |
945b5af3 AS |
916 | kfree(pq_coefs); |
917 | err_thread_type: | |
6138f967 SA |
918 | iops = dmatest_persec(runtime, total_tests); |
919 | pr_info("%s: summary %u tests, %u failures %llu.%02llu iops %llu KB/s (%d)\n", | |
86727443 | 920 | current->comm, total_tests, failed_tests, |
6138f967 | 921 | FIXPT_TO_INT(iops), FIXPT_GET_FRAC(iops), |
86727443 | 922 | dmatest_KBs(runtime, total_len), ret); |
0a2ff57d | 923 | |
9704efaa | 924 | /* terminate all transfers on specified channels */ |
6f6a23a2 | 925 | if (ret || failed_tests) |
fbffb6b4 | 926 | dmaengine_terminate_sync(chan); |
5e034f7b | 927 | |
3e5ccd86 | 928 | thread->done = true; |
2d88ce76 | 929 | wake_up(&thread_wait); |
0a2ff57d | 930 | |
4a776f0a HS |
931 | return ret; |
932 | } | |
933 | ||
934 | static void dmatest_cleanup_channel(struct dmatest_chan *dtc) | |
935 | { | |
936 | struct dmatest_thread *thread; | |
937 | struct dmatest_thread *_thread; | |
938 | int ret; | |
939 | ||
940 | list_for_each_entry_safe(thread, _thread, &dtc->threads, node) { | |
941 | ret = kthread_stop(thread->task); | |
0adff800 DW |
942 | pr_debug("thread %s exited with status %d\n", |
943 | thread->task->comm, ret); | |
4a776f0a | 944 | list_del(&thread->node); |
2d88ce76 | 945 | put_task_struct(thread->task); |
4a776f0a HS |
946 | kfree(thread); |
947 | } | |
9704efaa VK |
948 | |
949 | /* terminate all transfers on specified channels */ | |
fbffb6b4 | 950 | dmaengine_terminate_sync(dtc->chan); |
9704efaa | 951 | |
4a776f0a HS |
952 | kfree(dtc); |
953 | } | |
954 | ||
e03e93a9 AS |
955 | static int dmatest_add_threads(struct dmatest_info *info, |
956 | struct dmatest_chan *dtc, enum dma_transaction_type type) | |
4a776f0a | 957 | { |
15b8a8ea | 958 | struct dmatest_params *params = &info->params; |
b54d5cb9 DW |
959 | struct dmatest_thread *thread; |
960 | struct dma_chan *chan = dtc->chan; | |
961 | char *op; | |
962 | unsigned int i; | |
4a776f0a | 963 | |
b54d5cb9 DW |
964 | if (type == DMA_MEMCPY) |
965 | op = "copy"; | |
61b5f54d SK |
966 | else if (type == DMA_MEMSET) |
967 | op = "set"; | |
b54d5cb9 DW |
968 | else if (type == DMA_XOR) |
969 | op = "xor"; | |
58691d64 DW |
970 | else if (type == DMA_PQ) |
971 | op = "pq"; | |
b54d5cb9 DW |
972 | else |
973 | return -EINVAL; | |
4a776f0a | 974 | |
15b8a8ea | 975 | for (i = 0; i < params->threads_per_chan; i++) { |
4a776f0a HS |
976 | thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL); |
977 | if (!thread) { | |
0adff800 DW |
978 | pr_warn("No memory for %s-%s%u\n", |
979 | dma_chan_name(chan), op, i); | |
4a776f0a HS |
980 | break; |
981 | } | |
e03e93a9 | 982 | thread->info = info; |
4a776f0a | 983 | thread->chan = dtc->chan; |
b54d5cb9 | 984 | thread->type = type; |
6f6a23a2 AW |
985 | thread->test_done.wait = &thread->done_wait; |
986 | init_waitqueue_head(&thread->done_wait); | |
4a776f0a | 987 | smp_wmb(); |
2d88ce76 | 988 | thread->task = kthread_create(dmatest_func, thread, "%s-%s%u", |
b54d5cb9 | 989 | dma_chan_name(chan), op, i); |
4a776f0a | 990 | if (IS_ERR(thread->task)) { |
2d88ce76 | 991 | pr_warn("Failed to create thread %s-%s%u\n", |
0adff800 | 992 | dma_chan_name(chan), op, i); |
4a776f0a HS |
993 | kfree(thread); |
994 | break; | |
995 | } | |
996 | ||
997 | /* srcbuf and dstbuf are allocated by the thread itself */ | |
2d88ce76 | 998 | get_task_struct(thread->task); |
4a776f0a | 999 | list_add_tail(&thread->node, &dtc->threads); |
d53513d5 | 1000 | thread->pending = true; |
4a776f0a HS |
1001 | } |
1002 | ||
b54d5cb9 DW |
1003 | return i; |
1004 | } | |
1005 | ||
e03e93a9 AS |
1006 | static int dmatest_add_channel(struct dmatest_info *info, |
1007 | struct dma_chan *chan) | |
b54d5cb9 DW |
1008 | { |
1009 | struct dmatest_chan *dtc; | |
1010 | struct dma_device *dma_dev = chan->device; | |
1011 | unsigned int thread_count = 0; | |
b9033e68 | 1012 | int cnt; |
b54d5cb9 DW |
1013 | |
1014 | dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); | |
1015 | if (!dtc) { | |
0adff800 | 1016 | pr_warn("No memory for %s\n", dma_chan_name(chan)); |
b54d5cb9 DW |
1017 | return -ENOMEM; |
1018 | } | |
1019 | ||
1020 | dtc->chan = chan; | |
1021 | INIT_LIST_HEAD(&dtc->threads); | |
1022 | ||
47ec7f09 DJ |
1023 | if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) && |
1024 | info->params.polled) { | |
1025 | info->params.polled = false; | |
1026 | pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n"); | |
1027 | } | |
1028 | ||
b54d5cb9 | 1029 | if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { |
a0d4cb44 KA |
1030 | if (dmatest == 0) { |
1031 | cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); | |
1032 | thread_count += cnt > 0 ? cnt : 0; | |
1033 | } | |
b54d5cb9 | 1034 | } |
a0d4cb44 | 1035 | |
61b5f54d | 1036 | if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) { |
a0d4cb44 | 1037 | if (dmatest == 1) { |
c678fa66 | 1038 | cnt = dmatest_add_threads(info, dtc, DMA_MEMSET); |
a0d4cb44 KA |
1039 | thread_count += cnt > 0 ? cnt : 0; |
1040 | } | |
1041 | } | |
1042 | ||
b54d5cb9 | 1043 | if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { |
e03e93a9 | 1044 | cnt = dmatest_add_threads(info, dtc, DMA_XOR); |
f1aef8b6 | 1045 | thread_count += cnt > 0 ? cnt : 0; |
b54d5cb9 | 1046 | } |
58691d64 | 1047 | if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) { |
e03e93a9 | 1048 | cnt = dmatest_add_threads(info, dtc, DMA_PQ); |
d07a74a5 | 1049 | thread_count += cnt > 0 ? cnt : 0; |
58691d64 | 1050 | } |
b54d5cb9 | 1051 | |
d53513d5 | 1052 | pr_info("Added %u threads using %s\n", |
b54d5cb9 | 1053 | thread_count, dma_chan_name(chan)); |
4a776f0a | 1054 | |
838cc704 AS |
1055 | list_add_tail(&dtc->node, &info->channels); |
1056 | info->nr_channels++; | |
4a776f0a | 1057 | |
33df8ca0 | 1058 | return 0; |
4a776f0a HS |
1059 | } |
1060 | ||
7dd60251 | 1061 | static bool filter(struct dma_chan *chan, void *param) |
4a776f0a | 1062 | { |
da75ba24 | 1063 | return dmatest_match_channel(param, chan) && dmatest_match_device(param, chan->device); |
4a776f0a HS |
1064 | } |
1065 | ||
a9e55495 DW |
1066 | static void request_channels(struct dmatest_info *info, |
1067 | enum dma_transaction_type type) | |
4a776f0a | 1068 | { |
33df8ca0 | 1069 | dma_cap_mask_t mask; |
33df8ca0 DW |
1070 | |
1071 | dma_cap_zero(mask); | |
a9e55495 | 1072 | dma_cap_set(type, mask); |
33df8ca0 | 1073 | for (;;) { |
a9e55495 DW |
1074 | struct dmatest_params *params = &info->params; |
1075 | struct dma_chan *chan; | |
1076 | ||
15b8a8ea | 1077 | chan = dma_request_channel(mask, filter, params); |
33df8ca0 | 1078 | if (chan) { |
a9e55495 | 1079 | if (dmatest_add_channel(info, chan)) { |
33df8ca0 DW |
1080 | dma_release_channel(chan); |
1081 | break; /* add_channel failed, punt */ | |
1082 | } | |
1083 | } else | |
1084 | break; /* no more channels available */ | |
15b8a8ea AS |
1085 | if (params->max_channels && |
1086 | info->nr_channels >= params->max_channels) | |
33df8ca0 DW |
1087 | break; /* we have all we need */ |
1088 | } | |
4a776f0a | 1089 | } |
4a776f0a | 1090 | |
d53513d5 | 1091 | static void add_threaded_test(struct dmatest_info *info) |
851b7e16 | 1092 | { |
a9e55495 | 1093 | struct dmatest_params *params = &info->params; |
851b7e16 | 1094 | |
a9e55495 DW |
1095 | /* Copy test parameters */ |
1096 | params->buf_size = test_buf_size; | |
6bc7ea3c XC |
1097 | strscpy(params->channel, strim(test_channel), sizeof(params->channel)); |
1098 | strscpy(params->device, strim(test_device), sizeof(params->device)); | |
a9e55495 DW |
1099 | params->threads_per_chan = threads_per_chan; |
1100 | params->max_channels = max_channels; | |
1101 | params->iterations = iterations; | |
1102 | params->xor_sources = xor_sources; | |
1103 | params->pq_sources = pq_sources; | |
1104 | params->timeout = timeout; | |
e3b9c347 | 1105 | params->noverify = noverify; |
2e67a087 | 1106 | params->norandom = norandom; |
a875abfa | 1107 | params->alignment = alignment; |
13396a13 | 1108 | params->transfer_size = transfer_size; |
fb9816f9 | 1109 | params->polled = polled; |
a9e55495 DW |
1110 | |
1111 | request_channels(info, DMA_MEMCPY); | |
61b5f54d | 1112 | request_channels(info, DMA_MEMSET); |
a9e55495 DW |
1113 | request_channels(info, DMA_XOR); |
1114 | request_channels(info, DMA_PQ); | |
851b7e16 | 1115 | } |
851b7e16 | 1116 | |
d53513d5 SA |
1117 | static void run_pending_tests(struct dmatest_info *info) |
1118 | { | |
1119 | struct dmatest_chan *dtc; | |
1120 | unsigned int thread_count = 0; | |
1121 | ||
1122 | list_for_each_entry(dtc, &info->channels, node) { | |
1123 | struct dmatest_thread *thread; | |
1124 | ||
1125 | thread_count = 0; | |
1126 | list_for_each_entry(thread, &dtc->threads, node) { | |
1127 | wake_up_process(thread->task); | |
1128 | thread_count++; | |
1129 | } | |
1130 | pr_info("Started %u threads using %s\n", | |
1131 | thread_count, dma_chan_name(dtc->chan)); | |
1132 | } | |
1133 | } | |
1134 | ||
a310d037 | 1135 | static void stop_threaded_test(struct dmatest_info *info) |
4a776f0a | 1136 | { |
33df8ca0 | 1137 | struct dmatest_chan *dtc, *_dtc; |
7cbd4877 | 1138 | struct dma_chan *chan; |
33df8ca0 | 1139 | |
838cc704 | 1140 | list_for_each_entry_safe(dtc, _dtc, &info->channels, node) { |
33df8ca0 | 1141 | list_del(&dtc->node); |
7cbd4877 | 1142 | chan = dtc->chan; |
33df8ca0 | 1143 | dmatest_cleanup_channel(dtc); |
0adff800 | 1144 | pr_debug("dropped channel %s\n", dma_chan_name(chan)); |
7cbd4877 | 1145 | dma_release_channel(chan); |
33df8ca0 | 1146 | } |
838cc704 AS |
1147 | |
1148 | info->nr_channels = 0; | |
4a776f0a | 1149 | } |
e03e93a9 | 1150 | |
d53513d5 | 1151 | static void start_threaded_tests(struct dmatest_info *info) |
851b7e16 | 1152 | { |
a310d037 DW |
1153 | /* we might be called early to set run=, defer running until all |
1154 | * parameters have been evaluated | |
1155 | */ | |
1156 | if (!info->did_init) | |
a9e55495 | 1157 | return; |
851b7e16 | 1158 | |
d53513d5 | 1159 | run_pending_tests(info); |
851b7e16 AS |
1160 | } |
1161 | ||
a310d037 | 1162 | static int dmatest_run_get(char *val, const struct kernel_param *kp) |
851b7e16 | 1163 | { |
a310d037 | 1164 | struct dmatest_info *info = &test_info; |
851b7e16 AS |
1165 | |
1166 | mutex_lock(&info->lock); | |
a310d037 DW |
1167 | if (is_threaded_test_run(info)) { |
1168 | dmatest_run = true; | |
3e5ccd86 | 1169 | } else { |
d53513d5 SA |
1170 | if (!is_threaded_test_pending(info)) |
1171 | stop_threaded_test(info); | |
a310d037 | 1172 | dmatest_run = false; |
3e5ccd86 | 1173 | } |
851b7e16 | 1174 | mutex_unlock(&info->lock); |
851b7e16 | 1175 | |
a310d037 | 1176 | return param_get_bool(val, kp); |
851b7e16 AS |
1177 | } |
1178 | ||
a310d037 | 1179 | static int dmatest_run_set(const char *val, const struct kernel_param *kp) |
95019c8c | 1180 | { |
a310d037 DW |
1181 | struct dmatest_info *info = &test_info; |
1182 | int ret; | |
95019c8c | 1183 | |
a310d037 DW |
1184 | mutex_lock(&info->lock); |
1185 | ret = param_set_bool(val, kp); | |
1186 | if (ret) { | |
851b7e16 | 1187 | mutex_unlock(&info->lock); |
a310d037 | 1188 | return ret; |
d53513d5 | 1189 | } else if (dmatest_run) { |
6b41030f | 1190 | if (!is_threaded_test_pending(info)) { |
ce65d55f VM |
1191 | /* |
1192 | * We have nothing to run. This can be due to: | |
1193 | */ | |
1194 | ret = info->last_error; | |
1195 | if (ret) { | |
1196 | /* 1) Misconfiguration */ | |
1197 | pr_err("Channel misconfigured, can't continue\n"); | |
1198 | mutex_unlock(&info->lock); | |
1199 | return ret; | |
1200 | } else { | |
1201 | /* 2) We rely on defaults */ | |
1202 | pr_info("No channels configured, continue with any\n"); | |
1203 | if (!is_threaded_test_run(info)) | |
1204 | stop_threaded_test(info); | |
1205 | add_threaded_test(info); | |
1206 | } | |
6b41030f VM |
1207 | } |
1208 | start_threaded_tests(info); | |
d53513d5 SA |
1209 | } else { |
1210 | stop_threaded_test(info); | |
1211 | } | |
1212 | ||
1213 | mutex_unlock(&info->lock); | |
1214 | ||
1215 | return ret; | |
1216 | } | |
1217 | ||
1218 | static int dmatest_chan_set(const char *val, const struct kernel_param *kp) | |
1219 | { | |
1220 | struct dmatest_info *info = &test_info; | |
1221 | struct dmatest_chan *dtc; | |
1222 | char chan_reset_val[20]; | |
ce65d55f | 1223 | int ret; |
d53513d5 SA |
1224 | |
1225 | mutex_lock(&info->lock); | |
1226 | ret = param_set_copystring(val, kp); | |
1227 | if (ret) { | |
1228 | mutex_unlock(&info->lock); | |
1229 | return ret; | |
1230 | } | |
1231 | /*Clear any previously run threads */ | |
1232 | if (!is_threaded_test_run(info) && !is_threaded_test_pending(info)) | |
1233 | stop_threaded_test(info); | |
1234 | /* Reject channels that are already registered */ | |
1235 | if (is_threaded_test_pending(info)) { | |
1236 | list_for_each_entry(dtc, &info->channels, node) { | |
1237 | if (strcmp(dma_chan_name(dtc->chan), | |
1238 | strim(test_channel)) == 0) { | |
1239 | dtc = list_last_entry(&info->channels, | |
1240 | struct dmatest_chan, | |
1241 | node); | |
6bc7ea3c | 1242 | strscpy(chan_reset_val, |
d53513d5 SA |
1243 | dma_chan_name(dtc->chan), |
1244 | sizeof(chan_reset_val)); | |
1245 | ret = -EBUSY; | |
1246 | goto add_chan_err; | |
1247 | } | |
1248 | } | |
95019c8c AS |
1249 | } |
1250 | ||
d53513d5 SA |
1251 | add_threaded_test(info); |
1252 | ||
1253 | /* Check if channel was added successfully */ | |
b28de385 | 1254 | if (!list_empty(&info->channels)) { |
d53513d5 SA |
1255 | /* |
1256 | * if new channel was not successfully added, revert the | |
1257 | * "test_channel" string to the name of the last successfully | |
1258 | * added channel. exception for when users issues empty string | |
1259 | * to channel parameter. | |
1260 | */ | |
b28de385 | 1261 | dtc = list_last_entry(&info->channels, struct dmatest_chan, node); |
d53513d5 SA |
1262 | if ((strcmp(dma_chan_name(dtc->chan), strim(test_channel)) != 0) |
1263 | && (strcmp("", strim(test_channel)) != 0)) { | |
1264 | ret = -EINVAL; | |
6bc7ea3c | 1265 | strscpy(chan_reset_val, dma_chan_name(dtc->chan), |
d53513d5 SA |
1266 | sizeof(chan_reset_val)); |
1267 | goto add_chan_err; | |
1268 | } | |
1269 | ||
1270 | } else { | |
1271 | /* Clear test_channel if no channels were added successfully */ | |
6bc7ea3c | 1272 | strscpy(chan_reset_val, "", sizeof(chan_reset_val)); |
a310d037 | 1273 | ret = -EBUSY; |
d53513d5 SA |
1274 | goto add_chan_err; |
1275 | } | |
1276 | ||
ce65d55f | 1277 | info->last_error = ret; |
d53513d5 SA |
1278 | mutex_unlock(&info->lock); |
1279 | ||
1280 | return ret; | |
851b7e16 | 1281 | |
d53513d5 SA |
1282 | add_chan_err: |
1283 | param_set_copystring(chan_reset_val, kp); | |
ce65d55f | 1284 | info->last_error = ret; |
a310d037 | 1285 | mutex_unlock(&info->lock); |
851b7e16 | 1286 | |
a310d037 | 1287 | return ret; |
851b7e16 AS |
1288 | } |
1289 | ||
d53513d5 SA |
1290 | static int dmatest_chan_get(char *val, const struct kernel_param *kp) |
1291 | { | |
1292 | struct dmatest_info *info = &test_info; | |
1293 | ||
1294 | mutex_lock(&info->lock); | |
1295 | if (!is_threaded_test_run(info) && !is_threaded_test_pending(info)) { | |
1296 | stop_threaded_test(info); | |
6bc7ea3c | 1297 | strscpy(test_channel, "", sizeof(test_channel)); |
d53513d5 SA |
1298 | } |
1299 | mutex_unlock(&info->lock); | |
1300 | ||
1301 | return param_get_string(val, kp); | |
1302 | } | |
1303 | ||
1304 | static int dmatest_test_list_get(char *val, const struct kernel_param *kp) | |
1305 | { | |
1306 | struct dmatest_info *info = &test_info; | |
1307 | struct dmatest_chan *dtc; | |
1308 | unsigned int thread_count = 0; | |
1309 | ||
1310 | list_for_each_entry(dtc, &info->channels, node) { | |
1311 | struct dmatest_thread *thread; | |
1312 | ||
1313 | thread_count = 0; | |
1314 | list_for_each_entry(thread, &dtc->threads, node) { | |
1315 | thread_count++; | |
1316 | } | |
1317 | pr_info("%u threads using %s\n", | |
1318 | thread_count, dma_chan_name(dtc->chan)); | |
1319 | } | |
1320 | ||
1321 | return 0; | |
1322 | } | |
1323 | ||
e03e93a9 AS |
1324 | static int __init dmatest_init(void) |
1325 | { | |
1326 | struct dmatest_info *info = &test_info; | |
2d88ce76 | 1327 | struct dmatest_params *params = &info->params; |
e03e93a9 | 1328 | |
a310d037 DW |
1329 | if (dmatest_run) { |
1330 | mutex_lock(&info->lock); | |
d53513d5 SA |
1331 | add_threaded_test(info); |
1332 | run_pending_tests(info); | |
a310d037 DW |
1333 | mutex_unlock(&info->lock); |
1334 | } | |
838cc704 | 1335 | |
2d88ce76 DW |
1336 | if (params->iterations && wait) |
1337 | wait_event(thread_wait, !is_threaded_test_run(info)); | |
95019c8c | 1338 | |
a310d037 DW |
1339 | /* module parameters are stable, inittime tests are started, |
1340 | * let userspace take over 'run' control | |
1341 | */ | |
1342 | info->did_init = true; | |
851b7e16 | 1343 | |
851b7e16 | 1344 | return 0; |
e03e93a9 AS |
1345 | } |
1346 | /* when compiled-in wait for drivers to load first */ | |
1347 | late_initcall(dmatest_init); | |
1348 | ||
1349 | static void __exit dmatest_exit(void) | |
1350 | { | |
1351 | struct dmatest_info *info = &test_info; | |
1352 | ||
a310d037 | 1353 | mutex_lock(&info->lock); |
e03e93a9 | 1354 | stop_threaded_test(info); |
a310d037 | 1355 | mutex_unlock(&info->lock); |
e03e93a9 | 1356 | } |
4a776f0a HS |
1357 | module_exit(dmatest_exit); |
1358 | ||
e05503ef | 1359 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
4a776f0a | 1360 | MODULE_LICENSE("GPL v2"); |