Commit | Line | Data |
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4a776f0a HS |
1 | /* |
2 | * DMA Engine test module | |
3 | * | |
4 | * Copyright (C) 2007 Atmel Corporation | |
851b7e16 | 5 | * Copyright (C) 2013 Intel Corporation |
4a776f0a HS |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
872f05c6 DW |
11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
12 | ||
4a776f0a | 13 | #include <linux/delay.h> |
b7f080cf | 14 | #include <linux/dma-mapping.h> |
4a776f0a | 15 | #include <linux/dmaengine.h> |
981ed70d | 16 | #include <linux/freezer.h> |
4a776f0a HS |
17 | #include <linux/init.h> |
18 | #include <linux/kthread.h> | |
0881e7bd | 19 | #include <linux/sched/task.h> |
4a776f0a HS |
20 | #include <linux/module.h> |
21 | #include <linux/moduleparam.h> | |
22 | #include <linux/random.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
4a776f0a HS |
24 | #include <linux/wait.h> |
25 | ||
26 | static unsigned int test_buf_size = 16384; | |
a6c268d0 | 27 | module_param(test_buf_size, uint, S_IRUGO | S_IWUSR); |
4a776f0a HS |
28 | MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer"); |
29 | ||
06190d84 | 30 | static char test_channel[20]; |
a6c268d0 AS |
31 | module_param_string(channel, test_channel, sizeof(test_channel), |
32 | S_IRUGO | S_IWUSR); | |
4a776f0a HS |
33 | MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)"); |
34 | ||
a85159fe | 35 | static char test_device[32]; |
a6c268d0 AS |
36 | module_param_string(device, test_device, sizeof(test_device), |
37 | S_IRUGO | S_IWUSR); | |
4a776f0a HS |
38 | MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)"); |
39 | ||
40 | static unsigned int threads_per_chan = 1; | |
a6c268d0 | 41 | module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR); |
4a776f0a HS |
42 | MODULE_PARM_DESC(threads_per_chan, |
43 | "Number of threads to start per channel (default: 1)"); | |
44 | ||
45 | static unsigned int max_channels; | |
a6c268d0 | 46 | module_param(max_channels, uint, S_IRUGO | S_IWUSR); |
33df8ca0 | 47 | MODULE_PARM_DESC(max_channels, |
4a776f0a HS |
48 | "Maximum number of channels to use (default: all)"); |
49 | ||
0a2ff57d | 50 | static unsigned int iterations; |
a6c268d0 | 51 | module_param(iterations, uint, S_IRUGO | S_IWUSR); |
0a2ff57d NF |
52 | MODULE_PARM_DESC(iterations, |
53 | "Iterations before stopping test (default: infinite)"); | |
54 | ||
d8646724 | 55 | static unsigned int dmatest; |
a0d4cb44 KA |
56 | module_param(dmatest, uint, S_IRUGO | S_IWUSR); |
57 | MODULE_PARM_DESC(dmatest, | |
c678fa66 | 58 | "dmatest 0-memcpy 1-memset (default: 0)"); |
a0d4cb44 | 59 | |
b54d5cb9 | 60 | static unsigned int xor_sources = 3; |
a6c268d0 | 61 | module_param(xor_sources, uint, S_IRUGO | S_IWUSR); |
b54d5cb9 DW |
62 | MODULE_PARM_DESC(xor_sources, |
63 | "Number of xor source buffers (default: 3)"); | |
64 | ||
58691d64 | 65 | static unsigned int pq_sources = 3; |
a6c268d0 | 66 | module_param(pq_sources, uint, S_IRUGO | S_IWUSR); |
58691d64 DW |
67 | MODULE_PARM_DESC(pq_sources, |
68 | "Number of p+q source buffers (default: 3)"); | |
69 | ||
d42efe6b | 70 | static int timeout = 3000; |
a6c268d0 | 71 | module_param(timeout, uint, S_IRUGO | S_IWUSR); |
85ee7a1d JP |
72 | MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), " |
73 | "Pass -1 for infinite timeout"); | |
d42efe6b | 74 | |
e3b9c347 DW |
75 | static bool noverify; |
76 | module_param(noverify, bool, S_IRUGO | S_IWUSR); | |
2e67a087 YS |
77 | MODULE_PARM_DESC(noverify, "Disable data verification (default: verify)"); |
78 | ||
79 | static bool norandom; | |
80 | module_param(norandom, bool, 0644); | |
81 | MODULE_PARM_DESC(norandom, "Disable random offset setup (default: random)"); | |
4a776f0a | 82 | |
50137a7d DW |
83 | static bool verbose; |
84 | module_param(verbose, bool, S_IRUGO | S_IWUSR); | |
85 | MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)"); | |
4a776f0a | 86 | |
e03e93a9 | 87 | /** |
15b8a8ea | 88 | * struct dmatest_params - test parameters. |
e03e93a9 AS |
89 | * @buf_size: size of the memcpy test buffer |
90 | * @channel: bus ID of the channel to test | |
91 | * @device: bus ID of the DMA Engine to test | |
92 | * @threads_per_chan: number of threads to start per channel | |
93 | * @max_channels: maximum number of channels to use | |
94 | * @iterations: iterations before stopping test | |
95 | * @xor_sources: number of xor source buffers | |
96 | * @pq_sources: number of p+q source buffers | |
97 | * @timeout: transfer timeout in msec, -1 for infinite timeout | |
98 | */ | |
15b8a8ea | 99 | struct dmatest_params { |
e03e93a9 AS |
100 | unsigned int buf_size; |
101 | char channel[20]; | |
a85159fe | 102 | char device[32]; |
e03e93a9 AS |
103 | unsigned int threads_per_chan; |
104 | unsigned int max_channels; | |
105 | unsigned int iterations; | |
106 | unsigned int xor_sources; | |
107 | unsigned int pq_sources; | |
108 | int timeout; | |
e3b9c347 | 109 | bool noverify; |
2e67a087 | 110 | bool norandom; |
15b8a8ea AS |
111 | }; |
112 | ||
113 | /** | |
114 | * struct dmatest_info - test information. | |
115 | * @params: test parameters | |
851b7e16 | 116 | * @lock: access protection to the fields of this structure |
15b8a8ea | 117 | */ |
a310d037 | 118 | static struct dmatest_info { |
15b8a8ea AS |
119 | /* Test parameters */ |
120 | struct dmatest_params params; | |
838cc704 AS |
121 | |
122 | /* Internal state */ | |
123 | struct list_head channels; | |
124 | unsigned int nr_channels; | |
851b7e16 | 125 | struct mutex lock; |
a310d037 DW |
126 | bool did_init; |
127 | } test_info = { | |
128 | .channels = LIST_HEAD_INIT(test_info.channels), | |
129 | .lock = __MUTEX_INITIALIZER(test_info.lock), | |
130 | }; | |
851b7e16 | 131 | |
a310d037 DW |
132 | static int dmatest_run_set(const char *val, const struct kernel_param *kp); |
133 | static int dmatest_run_get(char *val, const struct kernel_param *kp); | |
9c27847d | 134 | static const struct kernel_param_ops run_ops = { |
a310d037 DW |
135 | .set = dmatest_run_set, |
136 | .get = dmatest_run_get, | |
e03e93a9 | 137 | }; |
a310d037 DW |
138 | static bool dmatest_run; |
139 | module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR); | |
140 | MODULE_PARM_DESC(run, "Run the test (default: false)"); | |
e03e93a9 | 141 | |
a310d037 DW |
142 | /* Maximum amount of mismatched bytes in buffer to print */ |
143 | #define MAX_ERROR_COUNT 32 | |
144 | ||
145 | /* | |
146 | * Initialization patterns. All bytes in the source buffer has bit 7 | |
147 | * set, all bytes in the destination buffer has bit 7 cleared. | |
148 | * | |
149 | * Bit 6 is set for all bytes which are to be copied by the DMA | |
150 | * engine. Bit 5 is set for all bytes which are to be overwritten by | |
151 | * the DMA engine. | |
152 | * | |
153 | * The remaining bits are the inverse of a counter which increments by | |
154 | * one for each byte address. | |
155 | */ | |
156 | #define PATTERN_SRC 0x80 | |
157 | #define PATTERN_DST 0x00 | |
158 | #define PATTERN_COPY 0x40 | |
159 | #define PATTERN_OVERWRITE 0x20 | |
160 | #define PATTERN_COUNT_MASK 0x1f | |
61b5f54d | 161 | #define PATTERN_MEMSET_IDX 0x01 |
851b7e16 | 162 | |
6f6a23a2 AW |
163 | /* poor man's completion - we want to use wait_event_freezable() on it */ |
164 | struct dmatest_done { | |
165 | bool done; | |
166 | wait_queue_head_t *wait; | |
167 | }; | |
168 | ||
a310d037 DW |
169 | struct dmatest_thread { |
170 | struct list_head node; | |
171 | struct dmatest_info *info; | |
172 | struct task_struct *task; | |
173 | struct dma_chan *chan; | |
174 | u8 **srcs; | |
d6481608 | 175 | u8 **usrcs; |
a310d037 | 176 | u8 **dsts; |
d6481608 | 177 | u8 **udsts; |
a310d037 | 178 | enum dma_transaction_type type; |
6f6a23a2 AW |
179 | wait_queue_head_t done_wait; |
180 | struct dmatest_done test_done; | |
a310d037 DW |
181 | bool done; |
182 | }; | |
95019c8c | 183 | |
a310d037 DW |
184 | struct dmatest_chan { |
185 | struct list_head node; | |
186 | struct dma_chan *chan; | |
187 | struct list_head threads; | |
e03e93a9 AS |
188 | }; |
189 | ||
2d88ce76 DW |
190 | static DECLARE_WAIT_QUEUE_HEAD(thread_wait); |
191 | static bool wait; | |
192 | ||
193 | static bool is_threaded_test_run(struct dmatest_info *info) | |
194 | { | |
195 | struct dmatest_chan *dtc; | |
196 | ||
197 | list_for_each_entry(dtc, &info->channels, node) { | |
198 | struct dmatest_thread *thread; | |
199 | ||
200 | list_for_each_entry(thread, &dtc->threads, node) { | |
201 | if (!thread->done) | |
202 | return true; | |
203 | } | |
204 | } | |
205 | ||
206 | return false; | |
207 | } | |
208 | ||
209 | static int dmatest_wait_get(char *val, const struct kernel_param *kp) | |
210 | { | |
211 | struct dmatest_info *info = &test_info; | |
212 | struct dmatest_params *params = &info->params; | |
213 | ||
214 | if (params->iterations) | |
215 | wait_event(thread_wait, !is_threaded_test_run(info)); | |
216 | wait = true; | |
217 | return param_get_bool(val, kp); | |
218 | } | |
219 | ||
9c27847d | 220 | static const struct kernel_param_ops wait_ops = { |
2d88ce76 DW |
221 | .get = dmatest_wait_get, |
222 | .set = param_set_bool, | |
223 | }; | |
224 | module_param_cb(wait, &wait_ops, &wait, S_IRUGO); | |
225 | MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)"); | |
e03e93a9 | 226 | |
15b8a8ea | 227 | static bool dmatest_match_channel(struct dmatest_params *params, |
e03e93a9 | 228 | struct dma_chan *chan) |
4a776f0a | 229 | { |
15b8a8ea | 230 | if (params->channel[0] == '\0') |
4a776f0a | 231 | return true; |
15b8a8ea | 232 | return strcmp(dma_chan_name(chan), params->channel) == 0; |
4a776f0a HS |
233 | } |
234 | ||
15b8a8ea | 235 | static bool dmatest_match_device(struct dmatest_params *params, |
e03e93a9 | 236 | struct dma_device *device) |
4a776f0a | 237 | { |
15b8a8ea | 238 | if (params->device[0] == '\0') |
4a776f0a | 239 | return true; |
15b8a8ea | 240 | return strcmp(dev_name(device->dev), params->device) == 0; |
4a776f0a HS |
241 | } |
242 | ||
243 | static unsigned long dmatest_random(void) | |
244 | { | |
245 | unsigned long buf; | |
246 | ||
be9fa5a4 | 247 | prandom_bytes(&buf, sizeof(buf)); |
4a776f0a HS |
248 | return buf; |
249 | } | |
250 | ||
61b5f54d SK |
251 | static inline u8 gen_inv_idx(u8 index, bool is_memset) |
252 | { | |
253 | u8 val = is_memset ? PATTERN_MEMSET_IDX : index; | |
254 | ||
255 | return ~val & PATTERN_COUNT_MASK; | |
256 | } | |
257 | ||
258 | static inline u8 gen_src_value(u8 index, bool is_memset) | |
259 | { | |
260 | return PATTERN_SRC | gen_inv_idx(index, is_memset); | |
261 | } | |
262 | ||
263 | static inline u8 gen_dst_value(u8 index, bool is_memset) | |
264 | { | |
265 | return PATTERN_DST | gen_inv_idx(index, is_memset); | |
266 | } | |
267 | ||
e03e93a9 | 268 | static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len, |
61b5f54d | 269 | unsigned int buf_size, bool is_memset) |
4a776f0a HS |
270 | { |
271 | unsigned int i; | |
b54d5cb9 DW |
272 | u8 *buf; |
273 | ||
274 | for (; (buf = *bufs); bufs++) { | |
275 | for (i = 0; i < start; i++) | |
61b5f54d | 276 | buf[i] = gen_src_value(i, is_memset); |
b54d5cb9 | 277 | for ( ; i < start + len; i++) |
61b5f54d | 278 | buf[i] = gen_src_value(i, is_memset) | PATTERN_COPY; |
e03e93a9 | 279 | for ( ; i < buf_size; i++) |
61b5f54d | 280 | buf[i] = gen_src_value(i, is_memset); |
b54d5cb9 DW |
281 | buf++; |
282 | } | |
4a776f0a HS |
283 | } |
284 | ||
e03e93a9 | 285 | static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len, |
61b5f54d | 286 | unsigned int buf_size, bool is_memset) |
4a776f0a HS |
287 | { |
288 | unsigned int i; | |
b54d5cb9 DW |
289 | u8 *buf; |
290 | ||
291 | for (; (buf = *bufs); bufs++) { | |
292 | for (i = 0; i < start; i++) | |
61b5f54d | 293 | buf[i] = gen_dst_value(i, is_memset); |
b54d5cb9 | 294 | for ( ; i < start + len; i++) |
61b5f54d SK |
295 | buf[i] = gen_dst_value(i, is_memset) | |
296 | PATTERN_OVERWRITE; | |
e03e93a9 | 297 | for ( ; i < buf_size; i++) |
61b5f54d | 298 | buf[i] = gen_dst_value(i, is_memset); |
b54d5cb9 | 299 | } |
4a776f0a HS |
300 | } |
301 | ||
7b610178 | 302 | static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index, |
61b5f54d | 303 | unsigned int counter, bool is_srcbuf, bool is_memset) |
7b610178 DW |
304 | { |
305 | u8 diff = actual ^ pattern; | |
61b5f54d | 306 | u8 expected = pattern | gen_inv_idx(counter, is_memset); |
7b610178 DW |
307 | const char *thread_name = current->comm; |
308 | ||
309 | if (is_srcbuf) | |
310 | pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n", | |
311 | thread_name, index, expected, actual); | |
312 | else if ((pattern & PATTERN_COPY) | |
313 | && (diff & (PATTERN_COPY | PATTERN_OVERWRITE))) | |
314 | pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n", | |
315 | thread_name, index, expected, actual); | |
316 | else if (diff & PATTERN_SRC) | |
317 | pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n", | |
318 | thread_name, index, expected, actual); | |
319 | else | |
320 | pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n", | |
321 | thread_name, index, expected, actual); | |
322 | } | |
323 | ||
324 | static unsigned int dmatest_verify(u8 **bufs, unsigned int start, | |
325 | unsigned int end, unsigned int counter, u8 pattern, | |
61b5f54d | 326 | bool is_srcbuf, bool is_memset) |
4a776f0a HS |
327 | { |
328 | unsigned int i; | |
329 | unsigned int error_count = 0; | |
330 | u8 actual; | |
b54d5cb9 DW |
331 | u8 expected; |
332 | u8 *buf; | |
333 | unsigned int counter_orig = counter; | |
334 | ||
335 | for (; (buf = *bufs); bufs++) { | |
336 | counter = counter_orig; | |
337 | for (i = start; i < end; i++) { | |
338 | actual = buf[i]; | |
61b5f54d | 339 | expected = pattern | gen_inv_idx(counter, is_memset); |
b54d5cb9 | 340 | if (actual != expected) { |
7b610178 DW |
341 | if (error_count < MAX_ERROR_COUNT) |
342 | dmatest_mismatch(actual, pattern, i, | |
61b5f54d SK |
343 | counter, is_srcbuf, |
344 | is_memset); | |
b54d5cb9 DW |
345 | error_count++; |
346 | } | |
347 | counter++; | |
4a776f0a | 348 | } |
4a776f0a HS |
349 | } |
350 | ||
74b5c07a | 351 | if (error_count > MAX_ERROR_COUNT) |
7b610178 | 352 | pr_warn("%s: %u errors suppressed\n", |
74b5c07a | 353 | current->comm, error_count - MAX_ERROR_COUNT); |
4a776f0a HS |
354 | |
355 | return error_count; | |
356 | } | |
357 | ||
adfa543e TH |
358 | |
359 | static void dmatest_callback(void *arg) | |
e44e0aa3 | 360 | { |
adfa543e | 361 | struct dmatest_done *done = arg; |
6f6a23a2 | 362 | struct dmatest_thread *thread = |
66b3bd23 | 363 | container_of(done, struct dmatest_thread, test_done); |
6f6a23a2 AW |
364 | if (!thread->done) { |
365 | done->done = true; | |
366 | wake_up_all(done->wait); | |
367 | } else { | |
368 | /* | |
369 | * If thread->done, it means that this callback occurred | |
370 | * after the parent thread has cleaned up. This can | |
371 | * happen in the case that driver doesn't implement | |
372 | * the terminate_all() functionality and a dma operation | |
373 | * did not occur within the timeout period | |
374 | */ | |
375 | WARN(1, "dmatest: Kernel memory may be corrupted!!\n"); | |
376 | } | |
e44e0aa3 DW |
377 | } |
378 | ||
8be9e32b AM |
379 | static unsigned int min_odd(unsigned int x, unsigned int y) |
380 | { | |
381 | unsigned int val = min(x, y); | |
382 | ||
383 | return val % 2 ? val : val - 1; | |
384 | } | |
385 | ||
872f05c6 DW |
386 | static void result(const char *err, unsigned int n, unsigned int src_off, |
387 | unsigned int dst_off, unsigned int len, unsigned long data) | |
d86b2f29 | 388 | { |
2acec150 | 389 | pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n", |
872f05c6 | 390 | current->comm, n, err, src_off, dst_off, len, data); |
d86b2f29 AS |
391 | } |
392 | ||
872f05c6 DW |
393 | static void dbg_result(const char *err, unsigned int n, unsigned int src_off, |
394 | unsigned int dst_off, unsigned int len, | |
395 | unsigned long data) | |
95019c8c | 396 | { |
2acec150 | 397 | pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n", |
a835bb85 | 398 | current->comm, n, err, src_off, dst_off, len, data); |
95019c8c AS |
399 | } |
400 | ||
a835bb85 AS |
401 | #define verbose_result(err, n, src_off, dst_off, len, data) ({ \ |
402 | if (verbose) \ | |
403 | result(err, n, src_off, dst_off, len, data); \ | |
404 | else \ | |
405 | dbg_result(err, n, src_off, dst_off, len, data);\ | |
50137a7d | 406 | }) |
95019c8c | 407 | |
86727443 | 408 | static unsigned long long dmatest_persec(s64 runtime, unsigned int val) |
d86b2f29 | 409 | { |
86727443 | 410 | unsigned long long per_sec = 1000000; |
d86b2f29 | 411 | |
86727443 DW |
412 | if (runtime <= 0) |
413 | return 0; | |
95019c8c | 414 | |
86727443 DW |
415 | /* drop precision until runtime is 32-bits */ |
416 | while (runtime > UINT_MAX) { | |
417 | runtime >>= 1; | |
418 | per_sec <<= 1; | |
95019c8c AS |
419 | } |
420 | ||
86727443 DW |
421 | per_sec *= val; |
422 | do_div(per_sec, runtime); | |
423 | return per_sec; | |
95019c8c AS |
424 | } |
425 | ||
86727443 | 426 | static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len) |
95019c8c | 427 | { |
86727443 | 428 | return dmatest_persec(runtime, len >> 10); |
95019c8c AS |
429 | } |
430 | ||
4a776f0a HS |
431 | /* |
432 | * This function repeatedly tests DMA transfers of various lengths and | |
b54d5cb9 DW |
433 | * offsets for a given operation type until it is told to exit by |
434 | * kthread_stop(). There may be multiple threads running this function | |
435 | * in parallel for a single channel, and there may be multiple channels | |
436 | * being tested in parallel. | |
4a776f0a HS |
437 | * |
438 | * Before each test, the source and destination buffer is initialized | |
439 | * with a known pattern. This pattern is different depending on | |
440 | * whether it's in an area which is supposed to be copied or | |
441 | * overwritten, and different in the source and destination buffers. | |
442 | * So if the DMA engine doesn't copy exactly what we tell it to copy, | |
443 | * we'll notice. | |
444 | */ | |
445 | static int dmatest_func(void *data) | |
446 | { | |
447 | struct dmatest_thread *thread = data; | |
6f6a23a2 | 448 | struct dmatest_done *done = &thread->test_done; |
e03e93a9 | 449 | struct dmatest_info *info; |
15b8a8ea | 450 | struct dmatest_params *params; |
4a776f0a | 451 | struct dma_chan *chan; |
8be9e32b | 452 | struct dma_device *dev; |
4a776f0a HS |
453 | unsigned int error_count; |
454 | unsigned int failed_tests = 0; | |
455 | unsigned int total_tests = 0; | |
456 | dma_cookie_t cookie; | |
457 | enum dma_status status; | |
b54d5cb9 | 458 | enum dma_ctrl_flags flags; |
945b5af3 | 459 | u8 *pq_coefs = NULL; |
4a776f0a | 460 | int ret; |
b54d5cb9 DW |
461 | int src_cnt; |
462 | int dst_cnt; | |
463 | int i; | |
e9405ef0 | 464 | ktime_t ktime, start, diff; |
8b0e1953 TG |
465 | ktime_t filltime = 0; |
466 | ktime_t comparetime = 0; | |
86727443 DW |
467 | s64 runtime = 0; |
468 | unsigned long long total_len = 0; | |
d6481608 | 469 | u8 align = 0; |
61b5f54d | 470 | bool is_memset = false; |
72ef08bf LA |
471 | dma_addr_t *srcs; |
472 | dma_addr_t *dma_pq; | |
4a776f0a | 473 | |
adfa543e | 474 | set_freezable(); |
4a776f0a HS |
475 | |
476 | ret = -ENOMEM; | |
4a776f0a HS |
477 | |
478 | smp_rmb(); | |
e03e93a9 | 479 | info = thread->info; |
15b8a8ea | 480 | params = &info->params; |
4a776f0a | 481 | chan = thread->chan; |
8be9e32b | 482 | dev = chan->device; |
d6481608 DJ |
483 | if (thread->type == DMA_MEMCPY) { |
484 | align = dev->copy_align; | |
b54d5cb9 | 485 | src_cnt = dst_cnt = 1; |
61b5f54d SK |
486 | } else if (thread->type == DMA_MEMSET) { |
487 | align = dev->fill_align; | |
488 | src_cnt = dst_cnt = 1; | |
489 | is_memset = true; | |
d6481608 | 490 | } else if (thread->type == DMA_XOR) { |
8be9e32b | 491 | /* force odd to ensure dst = src */ |
15b8a8ea | 492 | src_cnt = min_odd(params->xor_sources | 1, dev->max_xor); |
b54d5cb9 | 493 | dst_cnt = 1; |
d6481608 | 494 | align = dev->xor_align; |
58691d64 | 495 | } else if (thread->type == DMA_PQ) { |
8be9e32b | 496 | /* force odd to ensure dst = src */ |
15b8a8ea | 497 | src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0)); |
58691d64 | 498 | dst_cnt = 2; |
d6481608 | 499 | align = dev->pq_align; |
945b5af3 | 500 | |
31d18257 | 501 | pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL); |
945b5af3 AS |
502 | if (!pq_coefs) |
503 | goto err_thread_type; | |
504 | ||
94de648d | 505 | for (i = 0; i < src_cnt; i++) |
58691d64 | 506 | pq_coefs[i] = 1; |
b54d5cb9 | 507 | } else |
945b5af3 | 508 | goto err_thread_type; |
b54d5cb9 | 509 | |
31d18257 | 510 | thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL); |
b54d5cb9 DW |
511 | if (!thread->srcs) |
512 | goto err_srcs; | |
d6481608 DJ |
513 | |
514 | thread->usrcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL); | |
515 | if (!thread->usrcs) | |
516 | goto err_usrcs; | |
517 | ||
b54d5cb9 | 518 | for (i = 0; i < src_cnt; i++) { |
d6481608 DJ |
519 | thread->usrcs[i] = kmalloc(params->buf_size + align, |
520 | GFP_KERNEL); | |
521 | if (!thread->usrcs[i]) | |
b54d5cb9 | 522 | goto err_srcbuf; |
d6481608 DJ |
523 | |
524 | /* align srcs to alignment restriction */ | |
525 | if (align) | |
526 | thread->srcs[i] = PTR_ALIGN(thread->usrcs[i], align); | |
527 | else | |
528 | thread->srcs[i] = thread->usrcs[i]; | |
b54d5cb9 DW |
529 | } |
530 | thread->srcs[i] = NULL; | |
531 | ||
31d18257 | 532 | thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL); |
b54d5cb9 DW |
533 | if (!thread->dsts) |
534 | goto err_dsts; | |
d6481608 DJ |
535 | |
536 | thread->udsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL); | |
537 | if (!thread->udsts) | |
538 | goto err_udsts; | |
539 | ||
b54d5cb9 | 540 | for (i = 0; i < dst_cnt; i++) { |
d6481608 DJ |
541 | thread->udsts[i] = kmalloc(params->buf_size + align, |
542 | GFP_KERNEL); | |
543 | if (!thread->udsts[i]) | |
b54d5cb9 | 544 | goto err_dstbuf; |
d6481608 DJ |
545 | |
546 | /* align dsts to alignment restriction */ | |
547 | if (align) | |
548 | thread->dsts[i] = PTR_ALIGN(thread->udsts[i], align); | |
549 | else | |
550 | thread->dsts[i] = thread->udsts[i]; | |
b54d5cb9 DW |
551 | } |
552 | thread->dsts[i] = NULL; | |
553 | ||
e44e0aa3 DW |
554 | set_user_nice(current, 10); |
555 | ||
72ef08bf LA |
556 | srcs = kcalloc(src_cnt, sizeof(dma_addr_t), GFP_KERNEL); |
557 | if (!srcs) | |
558 | goto err_dstbuf; | |
559 | ||
560 | dma_pq = kcalloc(dst_cnt, sizeof(dma_addr_t), GFP_KERNEL); | |
561 | if (!dma_pq) | |
562 | goto err_srcs_array; | |
563 | ||
b203bd3f | 564 | /* |
d1cab34c | 565 | * src and dst buffers are freed by ourselves below |
b203bd3f | 566 | */ |
0776ae7b | 567 | flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; |
4a776f0a | 568 | |
86727443 | 569 | ktime = ktime_get(); |
0a2ff57d | 570 | while (!kthread_should_stop() |
15b8a8ea | 571 | && !(params->iterations && total_tests >= params->iterations)) { |
b54d5cb9 | 572 | struct dma_async_tx_descriptor *tx = NULL; |
4076e755 | 573 | struct dmaengine_unmap_data *um; |
4076e755 | 574 | dma_addr_t *dsts; |
ede23a58 | 575 | unsigned int src_off, dst_off, len; |
d86be86e | 576 | |
4a776f0a HS |
577 | total_tests++; |
578 | ||
fbfb8e1d SR |
579 | /* Check if buffer count fits into map count variable (u8) */ |
580 | if ((src_cnt + dst_cnt) >= 255) { | |
581 | pr_err("too many buffers (%d of 255 supported)\n", | |
582 | src_cnt + dst_cnt); | |
583 | break; | |
584 | } | |
585 | ||
15b8a8ea | 586 | if (1 << align > params->buf_size) { |
cfe4f275 | 587 | pr_err("%u-byte buffer too small for %d-byte alignment\n", |
15b8a8ea | 588 | params->buf_size, 1 << align); |
cfe4f275 GL |
589 | break; |
590 | } | |
591 | ||
2e67a087 | 592 | if (params->norandom) |
e3b9c347 | 593 | len = params->buf_size; |
ede23a58 AS |
594 | else |
595 | len = dmatest_random() % params->buf_size + 1; | |
596 | ||
597 | len = (len >> align) << align; | |
598 | if (!len) | |
599 | len = 1 << align; | |
600 | ||
601 | total_len += len; | |
602 | ||
2e67a087 | 603 | if (params->norandom) { |
e3b9c347 DW |
604 | src_off = 0; |
605 | dst_off = 0; | |
606 | } else { | |
e3b9c347 DW |
607 | src_off = dmatest_random() % (params->buf_size - len + 1); |
608 | dst_off = dmatest_random() % (params->buf_size - len + 1); | |
609 | ||
610 | src_off = (src_off >> align) << align; | |
611 | dst_off = (dst_off >> align) << align; | |
2e67a087 | 612 | } |
e3b9c347 | 613 | |
2e67a087 YS |
614 | if (!params->noverify) { |
615 | start = ktime_get(); | |
e3b9c347 | 616 | dmatest_init_srcs(thread->srcs, src_off, len, |
61b5f54d | 617 | params->buf_size, is_memset); |
e3b9c347 | 618 | dmatest_init_dsts(thread->dsts, dst_off, len, |
61b5f54d | 619 | params->buf_size, is_memset); |
e9405ef0 SK |
620 | |
621 | diff = ktime_sub(ktime_get(), start); | |
622 | filltime = ktime_add(filltime, diff); | |
e3b9c347 DW |
623 | } |
624 | ||
31d18257 | 625 | um = dmaengine_get_unmap_data(dev->dev, src_cnt + dst_cnt, |
4076e755 DW |
626 | GFP_KERNEL); |
627 | if (!um) { | |
628 | failed_tests++; | |
629 | result("unmap data NULL", total_tests, | |
630 | src_off, dst_off, len, ret); | |
631 | continue; | |
632 | } | |
4a776f0a | 633 | |
4076e755 | 634 | um->len = params->buf_size; |
b54d5cb9 | 635 | for (i = 0; i < src_cnt; i++) { |
745c00da | 636 | void *buf = thread->srcs[i]; |
4076e755 | 637 | struct page *pg = virt_to_page(buf); |
f62e5f61 | 638 | unsigned long pg_off = offset_in_page(buf); |
4076e755 DW |
639 | |
640 | um->addr[i] = dma_map_page(dev->dev, pg, pg_off, | |
641 | um->len, DMA_TO_DEVICE); | |
642 | srcs[i] = um->addr[i] + src_off; | |
643 | ret = dma_mapping_error(dev->dev, um->addr[i]); | |
afde3be1 | 644 | if (ret) { |
4076e755 | 645 | dmaengine_unmap_put(um); |
872f05c6 DW |
646 | result("src mapping error", total_tests, |
647 | src_off, dst_off, len, ret); | |
afde3be1 AS |
648 | failed_tests++; |
649 | continue; | |
650 | } | |
4076e755 | 651 | um->to_cnt++; |
b54d5cb9 | 652 | } |
d86be86e | 653 | /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */ |
4076e755 | 654 | dsts = &um->addr[src_cnt]; |
b54d5cb9 | 655 | for (i = 0; i < dst_cnt; i++) { |
745c00da | 656 | void *buf = thread->dsts[i]; |
4076e755 | 657 | struct page *pg = virt_to_page(buf); |
f62e5f61 | 658 | unsigned long pg_off = offset_in_page(buf); |
4076e755 DW |
659 | |
660 | dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len, | |
661 | DMA_BIDIRECTIONAL); | |
662 | ret = dma_mapping_error(dev->dev, dsts[i]); | |
afde3be1 | 663 | if (ret) { |
4076e755 | 664 | dmaengine_unmap_put(um); |
872f05c6 DW |
665 | result("dst mapping error", total_tests, |
666 | src_off, dst_off, len, ret); | |
afde3be1 AS |
667 | failed_tests++; |
668 | continue; | |
669 | } | |
4076e755 | 670 | um->bidi_cnt++; |
b54d5cb9 DW |
671 | } |
672 | ||
673 | if (thread->type == DMA_MEMCPY) | |
674 | tx = dev->device_prep_dma_memcpy(chan, | |
4076e755 DW |
675 | dsts[0] + dst_off, |
676 | srcs[0], len, flags); | |
61b5f54d SK |
677 | else if (thread->type == DMA_MEMSET) |
678 | tx = dev->device_prep_dma_memset(chan, | |
679 | dsts[0] + dst_off, | |
680 | *(thread->srcs[0] + src_off), | |
681 | len, flags); | |
b54d5cb9 DW |
682 | else if (thread->type == DMA_XOR) |
683 | tx = dev->device_prep_dma_xor(chan, | |
4076e755 DW |
684 | dsts[0] + dst_off, |
685 | srcs, src_cnt, | |
b54d5cb9 | 686 | len, flags); |
58691d64 | 687 | else if (thread->type == DMA_PQ) { |
58691d64 | 688 | for (i = 0; i < dst_cnt; i++) |
4076e755 DW |
689 | dma_pq[i] = dsts[i] + dst_off; |
690 | tx = dev->device_prep_dma_pq(chan, dma_pq, srcs, | |
94de648d | 691 | src_cnt, pq_coefs, |
58691d64 DW |
692 | len, flags); |
693 | } | |
d86be86e | 694 | |
d86be86e | 695 | if (!tx) { |
4076e755 | 696 | dmaengine_unmap_put(um); |
872f05c6 DW |
697 | result("prep error", total_tests, src_off, |
698 | dst_off, len, ret); | |
d86be86e AN |
699 | msleep(100); |
700 | failed_tests++; | |
701 | continue; | |
702 | } | |
e44e0aa3 | 703 | |
6f6a23a2 | 704 | done->done = false; |
e44e0aa3 | 705 | tx->callback = dmatest_callback; |
6f6a23a2 | 706 | tx->callback_param = done; |
d86be86e AN |
707 | cookie = tx->tx_submit(tx); |
708 | ||
4a776f0a | 709 | if (dma_submit_error(cookie)) { |
4076e755 | 710 | dmaengine_unmap_put(um); |
872f05c6 DW |
711 | result("submit error", total_tests, src_off, |
712 | dst_off, len, ret); | |
4a776f0a HS |
713 | msleep(100); |
714 | failed_tests++; | |
715 | continue; | |
716 | } | |
b54d5cb9 | 717 | dma_async_issue_pending(chan); |
4a776f0a | 718 | |
6f6a23a2 | 719 | wait_event_freezable_timeout(thread->done_wait, done->done, |
15b8a8ea | 720 | msecs_to_jiffies(params->timeout)); |
981ed70d | 721 | |
e44e0aa3 | 722 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
4a776f0a | 723 | |
6f6a23a2 | 724 | if (!done->done) { |
4076e755 | 725 | dmaengine_unmap_put(um); |
872f05c6 DW |
726 | result("test timed out", total_tests, src_off, dst_off, |
727 | len, 0); | |
e44e0aa3 DW |
728 | failed_tests++; |
729 | continue; | |
19e9f99f | 730 | } else if (status != DMA_COMPLETE) { |
4076e755 | 731 | dmaengine_unmap_put(um); |
872f05c6 DW |
732 | result(status == DMA_ERROR ? |
733 | "completion error status" : | |
734 | "completion busy status", total_tests, src_off, | |
735 | dst_off, len, ret); | |
4a776f0a HS |
736 | failed_tests++; |
737 | continue; | |
738 | } | |
e44e0aa3 | 739 | |
4076e755 | 740 | dmaengine_unmap_put(um); |
4a776f0a | 741 | |
e3b9c347 | 742 | if (params->noverify) { |
50137a7d DW |
743 | verbose_result("test passed", total_tests, src_off, |
744 | dst_off, len, 0); | |
e3b9c347 DW |
745 | continue; |
746 | } | |
4a776f0a | 747 | |
e9405ef0 | 748 | start = ktime_get(); |
872f05c6 | 749 | pr_debug("%s: verifying source buffer...\n", current->comm); |
e3b9c347 | 750 | error_count = dmatest_verify(thread->srcs, 0, src_off, |
61b5f54d | 751 | 0, PATTERN_SRC, true, is_memset); |
7b610178 DW |
752 | error_count += dmatest_verify(thread->srcs, src_off, |
753 | src_off + len, src_off, | |
61b5f54d | 754 | PATTERN_SRC | PATTERN_COPY, true, is_memset); |
7b610178 DW |
755 | error_count += dmatest_verify(thread->srcs, src_off + len, |
756 | params->buf_size, src_off + len, | |
61b5f54d | 757 | PATTERN_SRC, true, is_memset); |
7b610178 | 758 | |
872f05c6 | 759 | pr_debug("%s: verifying dest buffer...\n", current->comm); |
7b610178 | 760 | error_count += dmatest_verify(thread->dsts, 0, dst_off, |
61b5f54d SK |
761 | 0, PATTERN_DST, false, is_memset); |
762 | ||
7b610178 DW |
763 | error_count += dmatest_verify(thread->dsts, dst_off, |
764 | dst_off + len, src_off, | |
61b5f54d SK |
765 | PATTERN_SRC | PATTERN_COPY, false, is_memset); |
766 | ||
7b610178 DW |
767 | error_count += dmatest_verify(thread->dsts, dst_off + len, |
768 | params->buf_size, dst_off + len, | |
61b5f54d | 769 | PATTERN_DST, false, is_memset); |
4a776f0a | 770 | |
e9405ef0 SK |
771 | diff = ktime_sub(ktime_get(), start); |
772 | comparetime = ktime_add(comparetime, diff); | |
773 | ||
4a776f0a | 774 | if (error_count) { |
872f05c6 DW |
775 | result("data error", total_tests, src_off, dst_off, |
776 | len, error_count); | |
4a776f0a HS |
777 | failed_tests++; |
778 | } else { | |
50137a7d DW |
779 | verbose_result("test passed", total_tests, src_off, |
780 | dst_off, len, 0); | |
4a776f0a HS |
781 | } |
782 | } | |
e9405ef0 SK |
783 | ktime = ktime_sub(ktime_get(), ktime); |
784 | ktime = ktime_sub(ktime, comparetime); | |
785 | ktime = ktime_sub(ktime, filltime); | |
786 | runtime = ktime_to_us(ktime); | |
4a776f0a HS |
787 | |
788 | ret = 0; | |
72ef08bf LA |
789 | kfree(dma_pq); |
790 | err_srcs_array: | |
791 | kfree(srcs); | |
8e1f50d7 | 792 | err_dstbuf: |
d6481608 DJ |
793 | for (i = 0; thread->udsts[i]; i++) |
794 | kfree(thread->udsts[i]); | |
795 | kfree(thread->udsts); | |
796 | err_udsts: | |
b54d5cb9 DW |
797 | kfree(thread->dsts); |
798 | err_dsts: | |
8e1f50d7 | 799 | err_srcbuf: |
d6481608 DJ |
800 | for (i = 0; thread->usrcs[i]; i++) |
801 | kfree(thread->usrcs[i]); | |
802 | kfree(thread->usrcs); | |
803 | err_usrcs: | |
b54d5cb9 DW |
804 | kfree(thread->srcs); |
805 | err_srcs: | |
945b5af3 AS |
806 | kfree(pq_coefs); |
807 | err_thread_type: | |
86727443 DW |
808 | pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n", |
809 | current->comm, total_tests, failed_tests, | |
810 | dmatest_persec(runtime, total_tests), | |
811 | dmatest_KBs(runtime, total_len), ret); | |
0a2ff57d | 812 | |
9704efaa | 813 | /* terminate all transfers on specified channels */ |
6f6a23a2 | 814 | if (ret || failed_tests) |
5e034f7b SH |
815 | dmaengine_terminate_all(chan); |
816 | ||
3e5ccd86 | 817 | thread->done = true; |
2d88ce76 | 818 | wake_up(&thread_wait); |
0a2ff57d | 819 | |
4a776f0a HS |
820 | return ret; |
821 | } | |
822 | ||
823 | static void dmatest_cleanup_channel(struct dmatest_chan *dtc) | |
824 | { | |
825 | struct dmatest_thread *thread; | |
826 | struct dmatest_thread *_thread; | |
827 | int ret; | |
828 | ||
829 | list_for_each_entry_safe(thread, _thread, &dtc->threads, node) { | |
830 | ret = kthread_stop(thread->task); | |
0adff800 DW |
831 | pr_debug("thread %s exited with status %d\n", |
832 | thread->task->comm, ret); | |
4a776f0a | 833 | list_del(&thread->node); |
2d88ce76 | 834 | put_task_struct(thread->task); |
4a776f0a HS |
835 | kfree(thread); |
836 | } | |
9704efaa VK |
837 | |
838 | /* terminate all transfers on specified channels */ | |
944ea4dd | 839 | dmaengine_terminate_all(dtc->chan); |
9704efaa | 840 | |
4a776f0a HS |
841 | kfree(dtc); |
842 | } | |
843 | ||
e03e93a9 AS |
844 | static int dmatest_add_threads(struct dmatest_info *info, |
845 | struct dmatest_chan *dtc, enum dma_transaction_type type) | |
4a776f0a | 846 | { |
15b8a8ea | 847 | struct dmatest_params *params = &info->params; |
b54d5cb9 DW |
848 | struct dmatest_thread *thread; |
849 | struct dma_chan *chan = dtc->chan; | |
850 | char *op; | |
851 | unsigned int i; | |
4a776f0a | 852 | |
b54d5cb9 DW |
853 | if (type == DMA_MEMCPY) |
854 | op = "copy"; | |
61b5f54d SK |
855 | else if (type == DMA_MEMSET) |
856 | op = "set"; | |
b54d5cb9 DW |
857 | else if (type == DMA_XOR) |
858 | op = "xor"; | |
58691d64 DW |
859 | else if (type == DMA_PQ) |
860 | op = "pq"; | |
b54d5cb9 DW |
861 | else |
862 | return -EINVAL; | |
4a776f0a | 863 | |
15b8a8ea | 864 | for (i = 0; i < params->threads_per_chan; i++) { |
4a776f0a HS |
865 | thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL); |
866 | if (!thread) { | |
0adff800 DW |
867 | pr_warn("No memory for %s-%s%u\n", |
868 | dma_chan_name(chan), op, i); | |
4a776f0a HS |
869 | break; |
870 | } | |
e03e93a9 | 871 | thread->info = info; |
4a776f0a | 872 | thread->chan = dtc->chan; |
b54d5cb9 | 873 | thread->type = type; |
6f6a23a2 AW |
874 | thread->test_done.wait = &thread->done_wait; |
875 | init_waitqueue_head(&thread->done_wait); | |
4a776f0a | 876 | smp_wmb(); |
2d88ce76 | 877 | thread->task = kthread_create(dmatest_func, thread, "%s-%s%u", |
b54d5cb9 | 878 | dma_chan_name(chan), op, i); |
4a776f0a | 879 | if (IS_ERR(thread->task)) { |
2d88ce76 | 880 | pr_warn("Failed to create thread %s-%s%u\n", |
0adff800 | 881 | dma_chan_name(chan), op, i); |
4a776f0a HS |
882 | kfree(thread); |
883 | break; | |
884 | } | |
885 | ||
886 | /* srcbuf and dstbuf are allocated by the thread itself */ | |
2d88ce76 | 887 | get_task_struct(thread->task); |
4a776f0a | 888 | list_add_tail(&thread->node, &dtc->threads); |
2d88ce76 | 889 | wake_up_process(thread->task); |
4a776f0a HS |
890 | } |
891 | ||
b54d5cb9 DW |
892 | return i; |
893 | } | |
894 | ||
e03e93a9 AS |
895 | static int dmatest_add_channel(struct dmatest_info *info, |
896 | struct dma_chan *chan) | |
b54d5cb9 DW |
897 | { |
898 | struct dmatest_chan *dtc; | |
899 | struct dma_device *dma_dev = chan->device; | |
900 | unsigned int thread_count = 0; | |
b9033e68 | 901 | int cnt; |
b54d5cb9 DW |
902 | |
903 | dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); | |
904 | if (!dtc) { | |
0adff800 | 905 | pr_warn("No memory for %s\n", dma_chan_name(chan)); |
b54d5cb9 DW |
906 | return -ENOMEM; |
907 | } | |
908 | ||
909 | dtc->chan = chan; | |
910 | INIT_LIST_HEAD(&dtc->threads); | |
911 | ||
912 | if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { | |
a0d4cb44 KA |
913 | if (dmatest == 0) { |
914 | cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); | |
915 | thread_count += cnt > 0 ? cnt : 0; | |
916 | } | |
b54d5cb9 | 917 | } |
a0d4cb44 | 918 | |
61b5f54d | 919 | if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) { |
a0d4cb44 | 920 | if (dmatest == 1) { |
c678fa66 | 921 | cnt = dmatest_add_threads(info, dtc, DMA_MEMSET); |
a0d4cb44 KA |
922 | thread_count += cnt > 0 ? cnt : 0; |
923 | } | |
924 | } | |
925 | ||
b54d5cb9 | 926 | if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { |
e03e93a9 | 927 | cnt = dmatest_add_threads(info, dtc, DMA_XOR); |
f1aef8b6 | 928 | thread_count += cnt > 0 ? cnt : 0; |
b54d5cb9 | 929 | } |
58691d64 | 930 | if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) { |
e03e93a9 | 931 | cnt = dmatest_add_threads(info, dtc, DMA_PQ); |
d07a74a5 | 932 | thread_count += cnt > 0 ? cnt : 0; |
58691d64 | 933 | } |
b54d5cb9 | 934 | |
0adff800 | 935 | pr_info("Started %u threads using %s\n", |
b54d5cb9 | 936 | thread_count, dma_chan_name(chan)); |
4a776f0a | 937 | |
838cc704 AS |
938 | list_add_tail(&dtc->node, &info->channels); |
939 | info->nr_channels++; | |
4a776f0a | 940 | |
33df8ca0 | 941 | return 0; |
4a776f0a HS |
942 | } |
943 | ||
7dd60251 | 944 | static bool filter(struct dma_chan *chan, void *param) |
4a776f0a | 945 | { |
15b8a8ea | 946 | struct dmatest_params *params = param; |
e03e93a9 | 947 | |
15b8a8ea AS |
948 | if (!dmatest_match_channel(params, chan) || |
949 | !dmatest_match_device(params, chan->device)) | |
7dd60251 | 950 | return false; |
33df8ca0 | 951 | else |
7dd60251 | 952 | return true; |
4a776f0a HS |
953 | } |
954 | ||
a9e55495 DW |
955 | static void request_channels(struct dmatest_info *info, |
956 | enum dma_transaction_type type) | |
4a776f0a | 957 | { |
33df8ca0 | 958 | dma_cap_mask_t mask; |
33df8ca0 DW |
959 | |
960 | dma_cap_zero(mask); | |
a9e55495 | 961 | dma_cap_set(type, mask); |
33df8ca0 | 962 | for (;;) { |
a9e55495 DW |
963 | struct dmatest_params *params = &info->params; |
964 | struct dma_chan *chan; | |
965 | ||
15b8a8ea | 966 | chan = dma_request_channel(mask, filter, params); |
33df8ca0 | 967 | if (chan) { |
a9e55495 | 968 | if (dmatest_add_channel(info, chan)) { |
33df8ca0 DW |
969 | dma_release_channel(chan); |
970 | break; /* add_channel failed, punt */ | |
971 | } | |
972 | } else | |
973 | break; /* no more channels available */ | |
15b8a8ea AS |
974 | if (params->max_channels && |
975 | info->nr_channels >= params->max_channels) | |
33df8ca0 DW |
976 | break; /* we have all we need */ |
977 | } | |
4a776f0a | 978 | } |
4a776f0a | 979 | |
a9e55495 | 980 | static void run_threaded_test(struct dmatest_info *info) |
851b7e16 | 981 | { |
a9e55495 | 982 | struct dmatest_params *params = &info->params; |
851b7e16 | 983 | |
a9e55495 DW |
984 | /* Copy test parameters */ |
985 | params->buf_size = test_buf_size; | |
986 | strlcpy(params->channel, strim(test_channel), sizeof(params->channel)); | |
987 | strlcpy(params->device, strim(test_device), sizeof(params->device)); | |
988 | params->threads_per_chan = threads_per_chan; | |
989 | params->max_channels = max_channels; | |
990 | params->iterations = iterations; | |
991 | params->xor_sources = xor_sources; | |
992 | params->pq_sources = pq_sources; | |
993 | params->timeout = timeout; | |
e3b9c347 | 994 | params->noverify = noverify; |
2e67a087 | 995 | params->norandom = norandom; |
a9e55495 DW |
996 | |
997 | request_channels(info, DMA_MEMCPY); | |
61b5f54d | 998 | request_channels(info, DMA_MEMSET); |
a9e55495 DW |
999 | request_channels(info, DMA_XOR); |
1000 | request_channels(info, DMA_PQ); | |
851b7e16 | 1001 | } |
851b7e16 | 1002 | |
a310d037 | 1003 | static void stop_threaded_test(struct dmatest_info *info) |
4a776f0a | 1004 | { |
33df8ca0 | 1005 | struct dmatest_chan *dtc, *_dtc; |
7cbd4877 | 1006 | struct dma_chan *chan; |
33df8ca0 | 1007 | |
838cc704 | 1008 | list_for_each_entry_safe(dtc, _dtc, &info->channels, node) { |
33df8ca0 | 1009 | list_del(&dtc->node); |
7cbd4877 | 1010 | chan = dtc->chan; |
33df8ca0 | 1011 | dmatest_cleanup_channel(dtc); |
0adff800 | 1012 | pr_debug("dropped channel %s\n", dma_chan_name(chan)); |
7cbd4877 | 1013 | dma_release_channel(chan); |
33df8ca0 | 1014 | } |
838cc704 AS |
1015 | |
1016 | info->nr_channels = 0; | |
4a776f0a | 1017 | } |
e03e93a9 | 1018 | |
a9e55495 | 1019 | static void restart_threaded_test(struct dmatest_info *info, bool run) |
851b7e16 | 1020 | { |
a310d037 DW |
1021 | /* we might be called early to set run=, defer running until all |
1022 | * parameters have been evaluated | |
1023 | */ | |
1024 | if (!info->did_init) | |
a9e55495 | 1025 | return; |
851b7e16 AS |
1026 | |
1027 | /* Stop any running test first */ | |
a310d037 | 1028 | stop_threaded_test(info); |
851b7e16 AS |
1029 | |
1030 | /* Run test with new parameters */ | |
a9e55495 | 1031 | run_threaded_test(info); |
851b7e16 AS |
1032 | } |
1033 | ||
a310d037 | 1034 | static int dmatest_run_get(char *val, const struct kernel_param *kp) |
851b7e16 | 1035 | { |
a310d037 | 1036 | struct dmatest_info *info = &test_info; |
851b7e16 AS |
1037 | |
1038 | mutex_lock(&info->lock); | |
a310d037 DW |
1039 | if (is_threaded_test_run(info)) { |
1040 | dmatest_run = true; | |
3e5ccd86 | 1041 | } else { |
a310d037 DW |
1042 | stop_threaded_test(info); |
1043 | dmatest_run = false; | |
3e5ccd86 | 1044 | } |
851b7e16 | 1045 | mutex_unlock(&info->lock); |
851b7e16 | 1046 | |
a310d037 | 1047 | return param_get_bool(val, kp); |
851b7e16 AS |
1048 | } |
1049 | ||
a310d037 | 1050 | static int dmatest_run_set(const char *val, const struct kernel_param *kp) |
95019c8c | 1051 | { |
a310d037 DW |
1052 | struct dmatest_info *info = &test_info; |
1053 | int ret; | |
95019c8c | 1054 | |
a310d037 DW |
1055 | mutex_lock(&info->lock); |
1056 | ret = param_set_bool(val, kp); | |
1057 | if (ret) { | |
851b7e16 | 1058 | mutex_unlock(&info->lock); |
a310d037 | 1059 | return ret; |
95019c8c AS |
1060 | } |
1061 | ||
a310d037 DW |
1062 | if (is_threaded_test_run(info)) |
1063 | ret = -EBUSY; | |
1064 | else if (dmatest_run) | |
a9e55495 | 1065 | restart_threaded_test(info, dmatest_run); |
851b7e16 | 1066 | |
a310d037 | 1067 | mutex_unlock(&info->lock); |
851b7e16 | 1068 | |
a310d037 | 1069 | return ret; |
851b7e16 AS |
1070 | } |
1071 | ||
e03e93a9 AS |
1072 | static int __init dmatest_init(void) |
1073 | { | |
1074 | struct dmatest_info *info = &test_info; | |
2d88ce76 | 1075 | struct dmatest_params *params = &info->params; |
e03e93a9 | 1076 | |
a310d037 DW |
1077 | if (dmatest_run) { |
1078 | mutex_lock(&info->lock); | |
a9e55495 | 1079 | run_threaded_test(info); |
a310d037 DW |
1080 | mutex_unlock(&info->lock); |
1081 | } | |
838cc704 | 1082 | |
2d88ce76 DW |
1083 | if (params->iterations && wait) |
1084 | wait_event(thread_wait, !is_threaded_test_run(info)); | |
95019c8c | 1085 | |
a310d037 DW |
1086 | /* module parameters are stable, inittime tests are started, |
1087 | * let userspace take over 'run' control | |
1088 | */ | |
1089 | info->did_init = true; | |
851b7e16 | 1090 | |
851b7e16 | 1091 | return 0; |
e03e93a9 AS |
1092 | } |
1093 | /* when compiled-in wait for drivers to load first */ | |
1094 | late_initcall(dmatest_init); | |
1095 | ||
1096 | static void __exit dmatest_exit(void) | |
1097 | { | |
1098 | struct dmatest_info *info = &test_info; | |
1099 | ||
a310d037 | 1100 | mutex_lock(&info->lock); |
e03e93a9 | 1101 | stop_threaded_test(info); |
a310d037 | 1102 | mutex_unlock(&info->lock); |
e03e93a9 | 1103 | } |
4a776f0a HS |
1104 | module_exit(dmatest_exit); |
1105 | ||
e05503ef | 1106 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
4a776f0a | 1107 | MODULE_LICENSE("GPL v2"); |