[linux-2.6-block.git] / drivers / dma / dmatest.c

/*
 * DMA Engine test module
 *
 * Copyright (C) 2007 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/delay.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/random.h>
#include <linux/wait.h>

static unsigned int test_buf_size = 16384;
module_param(test_buf_size, uint, S_IRUGO);
MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");

static char test_channel[20];
module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");

static char test_device[20];
module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");

static unsigned int threads_per_chan = 1;
module_param(threads_per_chan, uint, S_IRUGO);
MODULE_PARM_DESC(threads_per_chan,
		"Number of threads to start per channel (default: 1)");

static unsigned int max_channels;
module_param(max_channels, uint, S_IRUGO);
MODULE_PARM_DESC(max_channels,
		"Maximum number of channels to use (default: all)");

static unsigned int iterations;
module_param(iterations, uint, S_IRUGO);
MODULE_PARM_DESC(iterations,
		"Iterations before stopping test (default: infinite)");

static unsigned int xor_sources = 3;
module_param(xor_sources, uint, S_IRUGO);
MODULE_PARM_DESC(xor_sources,
		"Number of xor source buffers (default: 3)");

static unsigned int pq_sources = 3;
module_param(pq_sources, uint, S_IRUGO);
MODULE_PARM_DESC(pq_sources,
		"Number of p+q source buffers (default: 3)");

/*
 * Initialization patterns. All bytes in the source buffer has bit 7
 * set, all bytes in the destination buffer has bit 7 cleared.
 *
 * Bit 6 is set for all bytes which are to be copied by the DMA
 * engine. Bit 5 is set for all bytes which are to be overwritten by
 * the DMA engine.
 *
 * The remaining bits are the inverse of a counter which increments by
 * one for each byte address.
 */
#define PATTERN_SRC		0x80
#define PATTERN_DST		0x00
#define PATTERN_COPY		0x40
#define PATTERN_OVERWRITE	0x20
#define PATTERN_COUNT_MASK	0x1f

struct dmatest_thread {
	struct list_head	node;
	struct task_struct	*task;
	struct dma_chan		*chan;
	u8			**srcs;
	u8			**dsts;
	enum dma_transaction_type type;
};

struct dmatest_chan {
	struct list_head	node;
	struct dma_chan		*chan;
	struct list_head	threads;
};

/*
 * These are protected by dma_list_mutex since they're only used by
 * the DMA filter function callback
 */
static LIST_HEAD(dmatest_channels);
static unsigned int nr_channels;

static bool dmatest_match_channel(struct dma_chan *chan)
{
	if (test_channel[0] == '\0')
		return true;
	return strcmp(dma_chan_name(chan), test_channel) == 0;
}

static bool dmatest_match_device(struct dma_device *device)
{
	if (test_device[0] == '\0')
		return true;
	return strcmp(dev_name(device->dev), test_device) == 0;
}

static unsigned long dmatest_random(void)
{
	unsigned long buf;

	get_random_bytes(&buf, sizeof(buf));
	return buf;
}

static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
{
	unsigned int i;
	u8 *buf;

	for (; (buf = *bufs); bufs++) {
		for (i = 0; i < start; i++)
			buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
		for ( ; i < start + len; i++)
			buf[i] = PATTERN_SRC | PATTERN_COPY
				| (~i & PATTERN_COUNT_MASK);
		for ( ; i < test_buf_size; i++)
			buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
		buf++;
	}
}

static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
{
	unsigned int i;
	u8 *buf;

	for (; (buf = *bufs); bufs++) {
		for (i = 0; i < start; i++)
			buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
		for ( ; i < start + len; i++)
			buf[i] = PATTERN_DST | PATTERN_OVERWRITE
				| (~i & PATTERN_COUNT_MASK);
		for ( ; i < test_buf_size; i++)
			buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
	}
}

static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
		unsigned int counter, bool is_srcbuf)
{
	u8		diff = actual ^ pattern;
	u8		expected = pattern | (~counter & PATTERN_COUNT_MASK);
	const char	*thread_name = current->comm;

	if (is_srcbuf)
		pr_warning("%s: srcbuf[0x%x] overwritten!"
				" Expected %02x, got %02x\n",
				thread_name, index, expected, actual);
	else if ((pattern & PATTERN_COPY)
			&& (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
		pr_warning("%s: dstbuf[0x%x] not copied!"
				" Expected %02x, got %02x\n",
				thread_name, index, expected, actual);
	else if (diff & PATTERN_SRC)
		pr_warning("%s: dstbuf[0x%x] was copied!"
				" Expected %02x, got %02x\n",
				thread_name, index, expected, actual);
	else
		pr_warning("%s: dstbuf[0x%x] mismatch!"
				" Expected %02x, got %02x\n",
				thread_name, index, expected, actual);
}

static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
		unsigned int end, unsigned int counter, u8 pattern,
		bool is_srcbuf)
{
	unsigned int i;
	unsigned int error_count = 0;
	u8 actual;
	u8 expected;
	u8 *buf;
	unsigned int counter_orig = counter;

	for (; (buf = *bufs); bufs++) {
		counter = counter_orig;
		for (i = start; i < end; i++) {
			actual = buf[i];
			expected = pattern | (~counter & PATTERN_COUNT_MASK);
			if (actual != expected) {
				if (error_count < 32)
					dmatest_mismatch(actual, pattern, i,
							 counter, is_srcbuf);
				error_count++;
			}
			counter++;
		}
	}

	if (error_count > 32)
		pr_warning("%s: %u errors suppressed\n",
			current->comm, error_count - 32);

	return error_count;
}

static void dmatest_callback(void *completion)
{
	complete(completion);
}

/*
 * This function repeatedly tests DMA transfers of various lengths and
 * offsets for a given operation type until it is told to exit by
 * kthread_stop(). There may be multiple threads running this function
 * in parallel for a single channel, and there may be multiple channels
 * being tested in parallel.
 *
 * Before each test, the source and destination buffer is initialized
 * with a known pattern. This pattern is different depending on
 * whether it's in an area which is supposed to be copied or
 * overwritten, and different in the source and destination buffers.
 * So if the DMA engine doesn't copy exactly what we tell it to copy,
 * we'll notice.
 */
static int dmatest_func(void *data)
{
	struct dmatest_thread	*thread = data;
	struct dma_chan		*chan;
	const char		*thread_name;
	unsigned int		src_off, dst_off, len;
	unsigned int		error_count;
	unsigned int		failed_tests = 0;
	unsigned int		total_tests = 0;
	dma_cookie_t		cookie;
	enum dma_status		status;
	enum dma_ctrl_flags 	flags;
	u8			pq_coefs[pq_sources];
	int			ret;
	int			src_cnt;
	int			dst_cnt;
	int			i;

	thread_name = current->comm;

	ret = -ENOMEM;

	smp_rmb();
	chan = thread->chan;
	if (thread->type == DMA_MEMCPY)
		src_cnt = dst_cnt = 1;
	else if (thread->type == DMA_XOR) {
		src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
		dst_cnt = 1;
	} else if (thread->type == DMA_PQ) {
		src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
		dst_cnt = 2;
		for (i = 0; i < pq_sources; i++)
			pq_coefs[i] = 1;
	} else
		goto err_srcs;

	thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
	if (!thread->srcs)
		goto err_srcs;
	for (i = 0; i < src_cnt; i++) {
		thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
		if (!thread->srcs[i])
			goto err_srcbuf;
	}
	thread->srcs[i] = NULL;

	thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
	if (!thread->dsts)
		goto err_dsts;
	for (i = 0; i < dst_cnt; i++) {
		thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
		if (!thread->dsts[i])
			goto err_dstbuf;
	}
	thread->dsts[i] = NULL;

	set_user_nice(current, 10);

	flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;

	while (!kthread_should_stop()
	       && !(iterations && total_tests >= iterations)) {
		struct dma_device *dev = chan->device;
		struct dma_async_tx_descriptor *tx = NULL;
		dma_addr_t dma_srcs[src_cnt];
		dma_addr_t dma_dsts[dst_cnt];
		struct completion cmp;
		unsigned long tmo = msecs_to_jiffies(3000);
		u8 align = 0;

		total_tests++;

		len = dmatest_random() % test_buf_size + 1;
		src_off = dmatest_random() % (test_buf_size - len + 1);
		dst_off = dmatest_random() % (test_buf_size - len + 1);

		/* honor alignment restrictions */
		if (thread->type == DMA_MEMCPY)
			align = dev->copy_align;
		else if (thread->type == DMA_XOR)
			align = dev->xor_align;
		else if (thread->type == DMA_PQ)
			align = dev->pq_align;

		len = (len >> align) << align;
		src_off = (src_off >> align) << align;
		dst_off = (dst_off >> align) << align;

		dmatest_init_srcs(thread->srcs, src_off, len);
		dmatest_init_dsts(thread->dsts, dst_off, len);

		for (i = 0; i < src_cnt; i++) {
			u8 *buf = thread->srcs[i] + src_off;

			dma_srcs[i] = dma_map_single(dev->dev, buf, len,
						     DMA_TO_DEVICE);
		}
		/* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
		for (i = 0; i < dst_cnt; i++) {
			dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
						     test_buf_size,
						     DMA_BIDIRECTIONAL);
		}


		if (thread->type == DMA_MEMCPY)
			tx = dev->device_prep_dma_memcpy(chan,
							 dma_dsts[0] + dst_off,
							 dma_srcs[0], len,
							 flags);
		else if (thread->type == DMA_XOR)
			tx = dev->device_prep_dma_xor(chan,
						      dma_dsts[0] + dst_off,
						      dma_srcs, xor_sources,
						      len, flags);
		else if (thread->type == DMA_PQ) {
			dma_addr_t dma_pq[dst_cnt];

			for (i = 0; i < dst_cnt; i++)
				dma_pq[i] = dma_dsts[i] + dst_off;
			tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
						     pq_sources, pq_coefs,
						     len, flags);
		}

		if (!tx) {
			for (i = 0; i < src_cnt; i++)
				dma_unmap_single(dev->dev, dma_srcs[i], len,
						 DMA_TO_DEVICE);
			for (i = 0; i < dst_cnt; i++)
				dma_unmap_single(dev->dev, dma_dsts[i],
						 test_buf_size,
						 DMA_BIDIRECTIONAL);
			pr_warning("%s: #%u: prep error with src_off=0x%x "
					"dst_off=0x%x len=0x%x\n",
					thread_name, total_tests - 1,
					src_off, dst_off, len);
			msleep(100);
			failed_tests++;
			continue;
		}

		init_completion(&cmp);
		tx->callback = dmatest_callback;
		tx->callback_param = &cmp;
		cookie = tx->tx_submit(tx);

		if (dma_submit_error(cookie)) {
			pr_warning("%s: #%u: submit error %d with src_off=0x%x "
					"dst_off=0x%x len=0x%x\n",
					thread_name, total_tests - 1, cookie,
					src_off, dst_off, len);
			msleep(100);
			failed_tests++;
			continue;
		}
		dma_async_issue_pending(chan);

		tmo = wait_for_completion_timeout(&cmp, tmo);
		status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);

		if (tmo == 0) {
			pr_warning("%s: #%u: test timed out\n",
				   thread_name, total_tests - 1);
			failed_tests++;
			continue;
		} else if (status != DMA_SUCCESS) {
			pr_warning("%s: #%u: got completion callback,"
				   " but status is \'%s\'\n",
				   thread_name, total_tests - 1,
				   status == DMA_ERROR ? "error" : "in progress");
			failed_tests++;
			continue;
		}

		/* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
		for (i = 0; i < dst_cnt; i++)
			dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
					 DMA_BIDIRECTIONAL);

		error_count = 0;

		pr_debug("%s: verifying source buffer...\n", thread_name);
		error_count += dmatest_verify(thread->srcs, 0, src_off,
				0, PATTERN_SRC, true);
		error_count += dmatest_verify(thread->srcs, src_off,
				src_off + len, src_off,
				PATTERN_SRC | PATTERN_COPY, true);
		error_count += dmatest_verify(thread->srcs, src_off + len,
				test_buf_size, src_off + len,
				PATTERN_SRC, true);

		pr_debug("%s: verifying dest buffer...\n",
				thread->task->comm);
		error_count += dmatest_verify(thread->dsts, 0, dst_off,
				0, PATTERN_DST, false);
		error_count += dmatest_verify(thread->dsts, dst_off,
				dst_off + len, src_off,
				PATTERN_SRC | PATTERN_COPY, false);
		error_count += dmatest_verify(thread->dsts, dst_off + len,
				test_buf_size, dst_off + len,
				PATTERN_DST, false);

		if (error_count) {
			pr_warning("%s: #%u: %u errors with "
				"src_off=0x%x dst_off=0x%x len=0x%x\n",
				thread_name, total_tests - 1, error_count,
				src_off, dst_off, len);
			failed_tests++;
		} else {
			pr_debug("%s: #%u: No errors with "
				"src_off=0x%x dst_off=0x%x len=0x%x\n",
				thread_name, total_tests - 1,
				src_off, dst_off, len);
		}
	}

	ret = 0;
	for (i = 0; thread->dsts[i]; i++)
		kfree(thread->dsts[i]);
err_dstbuf:
	kfree(thread->dsts);
err_dsts:
	for (i = 0; thread->srcs[i]; i++)
		kfree(thread->srcs[i]);
err_srcbuf:
	kfree(thread->srcs);
err_srcs:
	pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
			thread_name, total_tests, failed_tests, ret);

	if (iterations > 0)
		while (!kthread_should_stop()) {
			DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit);
			interruptible_sleep_on(&wait_dmatest_exit);
		}

	return ret;
}

static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
{
	struct dmatest_thread	*thread;
	struct dmatest_thread	*_thread;
	int			ret;

	list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
		ret = kthread_stop(thread->task);
		pr_debug("dmatest: thread %s exited with status %d\n",
				thread->task->comm, ret);
		list_del(&thread->node);
		kfree(thread);
	}
	kfree(dtc);
}

static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
{
	struct dmatest_thread *thread;
	struct dma_chan *chan = dtc->chan;
	char *op;
	unsigned int i;

	if (type == DMA_MEMCPY)
		op = "copy";
	else if (type == DMA_XOR)
		op = "xor";
	else if (type == DMA_PQ)
		op = "pq";
	else
		return -EINVAL;

	for (i = 0; i < threads_per_chan; i++) {
		thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
		if (!thread) {
			pr_warning("dmatest: No memory for %s-%s%u\n",
				   dma_chan_name(chan), op, i);

			break;
		}
		thread->chan = dtc->chan;
		thread->type = type;
		smp_wmb();
		thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
				dma_chan_name(chan), op, i);
		if (IS_ERR(thread->task)) {
			pr_warning("dmatest: Failed to run thread %s-%s%u\n",
					dma_chan_name(chan), op, i);
			kfree(thread);
			break;
		}

		/* srcbuf and dstbuf are allocated by the thread itself */

		list_add_tail(&thread->node, &dtc->threads);
	}

	return i;
}

static int dmatest_add_channel(struct dma_chan *chan)
{
	struct dmatest_chan	*dtc;
	struct dma_device	*dma_dev = chan->device;
	unsigned int		thread_count = 0;
	unsigned int		cnt;

	dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
	if (!dtc) {
		pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
		return -ENOMEM;
	}

	dtc->chan = chan;
	INIT_LIST_HEAD(&dtc->threads);

	if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
		cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
		thread_count += cnt > 0 ? cnt : 0;
	}
	if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
		cnt = dmatest_add_threads(dtc, DMA_XOR);
		thread_count += cnt > 0 ? cnt : 0;
	}
	if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
		cnt = dmatest_add_threads(dtc, DMA_PQ);
		thread_count += cnt > 0 ?: 0;
	}

	pr_info("dmatest: Started %u threads using %s\n",
		thread_count, dma_chan_name(chan));

	list_add_tail(&dtc->node, &dmatest_channels);
	nr_channels++;

	return 0;
}

static bool filter(struct dma_chan *chan, void *param)
{
	if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
		return false;
	else
		return true;
}

static int __init dmatest_init(void)
{
	dma_cap_mask_t mask;
	struct dma_chan *chan;
	int err = 0;

	dma_cap_zero(mask);
	dma_cap_set(DMA_MEMCPY, mask);
	for (;;) {
		chan = dma_request_channel(mask, filter, NULL);
		if (chan) {
			err = dmatest_add_channel(chan);
			if (err) {
				dma_release_channel(chan);
				break; /* add_channel failed, punt */
			}
		} else
			break; /* no more channels available */
		if (max_channels && nr_channels >= max_channels)
			break; /* we have all we need */
	}

	return err;
}
/* when compiled-in wait for drivers to load first */
late_initcall(dmatest_init);

static void __exit dmatest_exit(void)
{
	struct dmatest_chan *dtc, *_dtc;
	struct dma_chan *chan;

	list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
		list_del(&dtc->node);
		chan = dtc->chan;
		dmatest_cleanup_channel(dtc);
		pr_debug("dmatest: dropped channel %s\n",
			 dma_chan_name(chan));
		dma_release_channel(chan);
	}
}
module_exit(dmatest_exit);

MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
4a776f0a HS	1	/*
	2	* DMA Engine test module
	3	*
	4	* Copyright (C) 2007 Atmel Corporation
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10	#include <linux/delay.h>
	11	#include <linux/dmaengine.h>
	12	#include <linux/init.h>
	13	#include <linux/kthread.h>
	14	#include <linux/module.h>
	15	#include <linux/moduleparam.h>
	16	#include <linux/random.h>
	17	#include <linux/wait.h>
	18
	19	static unsigned int test_buf_size = 16384;
	20	module_param(test_buf_size, uint, S_IRUGO);
	21	MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
	22
06190d84	23	static char test_channel[20];
4a776f0a HS	24	module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
	25	MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
	26
06190d84	27	static char test_device[20];
4a776f0a HS	28	module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
	29	MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
	30
	31	static unsigned int threads_per_chan = 1;
	32	module_param(threads_per_chan, uint, S_IRUGO);
	33	MODULE_PARM_DESC(threads_per_chan,
	34	"Number of threads to start per channel (default: 1)");
	35
	36	static unsigned int max_channels;
	37	module_param(max_channels, uint, S_IRUGO);
33df8ca0	38	MODULE_PARM_DESC(max_channels,
4a776f0a HS	39	"Maximum number of channels to use (default: all)");
4a776f0a HS	40
0a2ff57d NF	41	static unsigned int iterations;
	42	module_param(iterations, uint, S_IRUGO);
	43	MODULE_PARM_DESC(iterations,
	44	"Iterations before stopping test (default: infinite)");
	45
b54d5cb9 DW	46	static unsigned int xor_sources = 3;
	47	module_param(xor_sources, uint, S_IRUGO);
	48	MODULE_PARM_DESC(xor_sources,
	49	"Number of xor source buffers (default: 3)");
	50
58691d64 DW	51	static unsigned int pq_sources = 3;
	52	module_param(pq_sources, uint, S_IRUGO);
	53	MODULE_PARM_DESC(pq_sources,
	54	"Number of p+q source buffers (default: 3)");
	55
4a776f0a HS	56	/*
	57	* Initialization patterns. All bytes in the source buffer has bit 7
	58	* set, all bytes in the destination buffer has bit 7 cleared.
	59	*
	60	* Bit 6 is set for all bytes which are to be copied by the DMA
	61	* engine. Bit 5 is set for all bytes which are to be overwritten by
	62	* the DMA engine.
	63	*
	64	* The remaining bits are the inverse of a counter which increments by
	65	* one for each byte address.
	66	*/
	67	#define PATTERN_SRC 0x80
	68	#define PATTERN_DST 0x00
	69	#define PATTERN_COPY 0x40
	70	#define PATTERN_OVERWRITE 0x20
	71	#define PATTERN_COUNT_MASK 0x1f
	72
	73	struct dmatest_thread {
	74	struct list_head node;
	75	struct task_struct *task;
	76	struct dma_chan *chan;
b54d5cb9 DW	77	u8 **srcs;
	78	u8 **dsts;
	79	enum dma_transaction_type type;
4a776f0a HS	80	};
	81
	82	struct dmatest_chan {
	83	struct list_head node;
	84	struct dma_chan *chan;
	85	struct list_head threads;
	86	};
	87
	88	/*
	89	* These are protected by dma_list_mutex since they're only used by
33df8ca0	90	* the DMA filter function callback
4a776f0a HS	91	*/
	92	static LIST_HEAD(dmatest_channels);
	93	static unsigned int nr_channels;
	94
	95	static bool dmatest_match_channel(struct dma_chan *chan)
	96	{
	97	if (test_channel[0] == '\0')
	98	return true;
41d5e59c	99	return strcmp(dma_chan_name(chan), test_channel) == 0;
4a776f0a HS	100	}
	101
	102	static bool dmatest_match_device(struct dma_device *device)
	103	{
	104	if (test_device[0] == '\0')
	105	return true;
06190d84	106	return strcmp(dev_name(device->dev), test_device) == 0;
4a776f0a HS	107	}
	108
	109	static unsigned long dmatest_random(void)
	110	{
	111	unsigned long buf;
	112
	113	get_random_bytes(&buf, sizeof(buf));
	114	return buf;
	115	}
	116
b54d5cb9	117	static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
4a776f0a HS	118	{
4a776f0a HS	119	unsigned int i;
b54d5cb9 DW	120	u8 *buf;
	121
	122	for (; (buf = *bufs); bufs++) {
	123	for (i = 0; i < start; i++)
	124	buf[i] = PATTERN_SRC \| (~i & PATTERN_COUNT_MASK);
	125	for ( ; i < start + len; i++)
	126	buf[i] = PATTERN_SRC \| PATTERN_COPY
c019894e	127	\| (~i & PATTERN_COUNT_MASK);
b54d5cb9 DW	128	for ( ; i < test_buf_size; i++)
	129	buf[i] = PATTERN_SRC \| (~i & PATTERN_COUNT_MASK);
	130	buf++;
	131	}
4a776f0a HS	132	}
4a776f0a HS	133
b54d5cb9	134	static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
4a776f0a HS	135	{
4a776f0a HS	136	unsigned int i;
b54d5cb9 DW	137	u8 *buf;
	138
	139	for (; (buf = *bufs); bufs++) {
	140	for (i = 0; i < start; i++)
	141	buf[i] = PATTERN_DST \| (~i & PATTERN_COUNT_MASK);
	142	for ( ; i < start + len; i++)
	143	buf[i] = PATTERN_DST \| PATTERN_OVERWRITE
	144	\| (~i & PATTERN_COUNT_MASK);
	145	for ( ; i < test_buf_size; i++)
	146	buf[i] = PATTERN_DST \| (~i & PATTERN_COUNT_MASK);
	147	}
4a776f0a HS	148	}
	149
	150	static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
	151	unsigned int counter, bool is_srcbuf)
	152	{
	153	u8 diff = actual ^ pattern;
	154	u8 expected = pattern \| (~counter & PATTERN_COUNT_MASK);
	155	const char *thread_name = current->comm;
	156
	157	if (is_srcbuf)
	158	pr_warning("%s: srcbuf[0x%x] overwritten!"
	159	" Expected %02x, got %02x\n",
	160	thread_name, index, expected, actual);
	161	else if ((pattern & PATTERN_COPY)
	162	&& (diff & (PATTERN_COPY \| PATTERN_OVERWRITE)))
	163	pr_warning("%s: dstbuf[0x%x] not copied!"
	164	" Expected %02x, got %02x\n",
	165	thread_name, index, expected, actual);
	166	else if (diff & PATTERN_SRC)
	167	pr_warning("%s: dstbuf[0x%x] was copied!"
	168	" Expected %02x, got %02x\n",
	169	thread_name, index, expected, actual);
	170	else
	171	pr_warning("%s: dstbuf[0x%x] mismatch!"
	172	" Expected %02x, got %02x\n",
	173	thread_name, index, expected, actual);
	174	}
	175
b54d5cb9	176	static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
4a776f0a HS	177	unsigned int end, unsigned int counter, u8 pattern,
	178	bool is_srcbuf)
	179	{
	180	unsigned int i;
	181	unsigned int error_count = 0;
	182	u8 actual;
b54d5cb9 DW	183	u8 expected;
	184	u8 *buf;
	185	unsigned int counter_orig = counter;
	186
	187	for (; (buf = *bufs); bufs++) {
	188	counter = counter_orig;
	189	for (i = start; i < end; i++) {
	190	actual = buf[i];
	191	expected = pattern \| (~counter & PATTERN_COUNT_MASK);
	192	if (actual != expected) {
	193	if (error_count < 32)
	194	dmatest_mismatch(actual, pattern, i,
	195	counter, is_srcbuf);
	196	error_count++;
	197	}
	198	counter++;
4a776f0a	199	}
4a776f0a HS	200	}
	201
	202	if (error_count > 32)
	203	pr_warning("%s: %u errors suppressed\n",
	204	current->comm, error_count - 32);
	205
	206	return error_count;
	207	}
	208
e44e0aa3 DW	209	static void dmatest_callback(void *completion)
	210	{
	211	complete(completion);
	212	}
	213
4a776f0a HS	214	/*
4a776f0a HS	215	* This function repeatedly tests DMA transfers of various lengths and
b54d5cb9 DW	216	* offsets for a given operation type until it is told to exit by
	217	* kthread_stop(). There may be multiple threads running this function
	218	* in parallel for a single channel, and there may be multiple channels
	219	* being tested in parallel.
4a776f0a HS	220	*
	221	* Before each test, the source and destination buffer is initialized
	222	* with a known pattern. This pattern is different depending on
	223	* whether it's in an area which is supposed to be copied or
	224	* overwritten, and different in the source and destination buffers.
	225	* So if the DMA engine doesn't copy exactly what we tell it to copy,
	226	* we'll notice.
	227	*/
	228	static int dmatest_func(void *data)
	229	{
	230	struct dmatest_thread *thread = data;
	231	struct dma_chan *chan;
	232	const char *thread_name;
	233	unsigned int src_off, dst_off, len;
	234	unsigned int error_count;
	235	unsigned int failed_tests = 0;
	236	unsigned int total_tests = 0;
	237	dma_cookie_t cookie;
	238	enum dma_status status;
b54d5cb9	239	enum dma_ctrl_flags flags;
58691d64	240	u8 pq_coefs[pq_sources];
4a776f0a	241	int ret;
b54d5cb9 DW	242	int src_cnt;
	243	int dst_cnt;
	244	int i;
4a776f0a HS	245
	246	thread_name = current->comm;
	247
	248	ret = -ENOMEM;
4a776f0a HS	249
	250	smp_rmb();
	251	chan = thread->chan;
b54d5cb9 DW	252	if (thread->type == DMA_MEMCPY)
	253	src_cnt = dst_cnt = 1;
	254	else if (thread->type == DMA_XOR) {
	255	src_cnt = xor_sources \| 1; /* force odd to ensure dst = src */
	256	dst_cnt = 1;
58691d64 DW	257	} else if (thread->type == DMA_PQ) {
	258	src_cnt = pq_sources \| 1; /* force odd to ensure dst = src */
	259	dst_cnt = 2;
	260	for (i = 0; i < pq_sources; i++)
	261	pq_coefs[i] = 1;
b54d5cb9 DW	262	} else
	263	goto err_srcs;
	264
	265	thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
	266	if (!thread->srcs)
	267	goto err_srcs;
	268	for (i = 0; i < src_cnt; i++) {
	269	thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
	270	if (!thread->srcs[i])
	271	goto err_srcbuf;
	272	}
	273	thread->srcs[i] = NULL;
	274
	275	thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
	276	if (!thread->dsts)
	277	goto err_dsts;
	278	for (i = 0; i < dst_cnt; i++) {
	279	thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
	280	if (!thread->dsts[i])
	281	goto err_dstbuf;
	282	}
	283	thread->dsts[i] = NULL;
	284
e44e0aa3 DW	285	set_user_nice(current, 10);
	286
	287	flags = DMA_CTRL_ACK \| DMA_COMPL_SKIP_DEST_UNMAP \| DMA_PREP_INTERRUPT;
4a776f0a	288
0a2ff57d NF	289	while (!kthread_should_stop()
0a2ff57d NF	290	&& !(iterations && total_tests >= iterations)) {
d86be86e	291	struct dma_device *dev = chan->device;
b54d5cb9 DW	292	struct dma_async_tx_descriptor *tx = NULL;
	293	dma_addr_t dma_srcs[src_cnt];
	294	dma_addr_t dma_dsts[dst_cnt];
e44e0aa3 DW	295	struct completion cmp;
e44e0aa3 DW	296	unsigned long tmo = msecs_to_jiffies(3000);
83544ae9	297	u8 align = 0;
d86be86e	298
4a776f0a HS	299	total_tests++;
	300
	301	len = dmatest_random() % test_buf_size + 1;
	302	src_off = dmatest_random() % (test_buf_size - len + 1);
	303	dst_off = dmatest_random() % (test_buf_size - len + 1);
	304
83544ae9 DW	305	/* honor alignment restrictions */
	306	if (thread->type == DMA_MEMCPY)
	307	align = dev->copy_align;
	308	else if (thread->type == DMA_XOR)
	309	align = dev->xor_align;
	310	else if (thread->type == DMA_PQ)
	311	align = dev->pq_align;
	312
	313	len = (len >> align) << align;
	314	src_off = (src_off >> align) << align;
	315	dst_off = (dst_off >> align) << align;
	316
b54d5cb9 DW	317	dmatest_init_srcs(thread->srcs, src_off, len);
b54d5cb9 DW	318	dmatest_init_dsts(thread->dsts, dst_off, len);
4a776f0a	319
b54d5cb9 DW	320	for (i = 0; i < src_cnt; i++) {
	321	u8 *buf = thread->srcs[i] + src_off;
	322
	323	dma_srcs[i] = dma_map_single(dev->dev, buf, len,
	324	DMA_TO_DEVICE);
	325	}
d86be86e	326	/* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
b54d5cb9 DW	327	for (i = 0; i < dst_cnt; i++) {
	328	dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
	329	test_buf_size,
	330	DMA_BIDIRECTIONAL);
	331	}
	332
83544ae9	333
b54d5cb9 DW	334	if (thread->type == DMA_MEMCPY)
	335	tx = dev->device_prep_dma_memcpy(chan,
	336	dma_dsts[0] + dst_off,
	337	dma_srcs[0], len,
	338	flags);
	339	else if (thread->type == DMA_XOR)
	340	tx = dev->device_prep_dma_xor(chan,
	341	dma_dsts[0] + dst_off,
	342	dma_srcs, xor_sources,
	343	len, flags);
58691d64 DW	344	else if (thread->type == DMA_PQ) {
	345	dma_addr_t dma_pq[dst_cnt];
	346
	347	for (i = 0; i < dst_cnt; i++)
	348	dma_pq[i] = dma_dsts[i] + dst_off;
	349	tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
	350	pq_sources, pq_coefs,
	351	len, flags);
	352	}
d86be86e	353
d86be86e	354	if (!tx) {
b54d5cb9 DW	355	for (i = 0; i < src_cnt; i++)
	356	dma_unmap_single(dev->dev, dma_srcs[i], len,
	357	DMA_TO_DEVICE);
	358	for (i = 0; i < dst_cnt; i++)
	359	dma_unmap_single(dev->dev, dma_dsts[i],
	360	test_buf_size,
	361	DMA_BIDIRECTIONAL);
d86be86e AN	362	pr_warning("%s: #%u: prep error with src_off=0x%x "
	363	"dst_off=0x%x len=0x%x\n",
	364	thread_name, total_tests - 1,
	365	src_off, dst_off, len);
	366	msleep(100);
	367	failed_tests++;
	368	continue;
	369	}
e44e0aa3 DW	370
	371	init_completion(&cmp);
	372	tx->callback = dmatest_callback;
	373	tx->callback_param = &cmp;
d86be86e AN	374	cookie = tx->tx_submit(tx);
d86be86e AN	375
4a776f0a HS	376	if (dma_submit_error(cookie)) {
	377	pr_warning("%s: #%u: submit error %d with src_off=0x%x "
	378	"dst_off=0x%x len=0x%x\n",
	379	thread_name, total_tests - 1, cookie,
	380	src_off, dst_off, len);
	381	msleep(100);
	382	failed_tests++;
	383	continue;
	384	}
b54d5cb9	385	dma_async_issue_pending(chan);
4a776f0a	386
e44e0aa3 DW	387	tmo = wait_for_completion_timeout(&cmp, tmo);
e44e0aa3 DW	388	status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
4a776f0a	389
e44e0aa3 DW	390	if (tmo == 0) {
	391	pr_warning("%s: #%u: test timed out\n",
	392	thread_name, total_tests - 1);
	393	failed_tests++;
	394	continue;
	395	} else if (status != DMA_SUCCESS) {
	396	pr_warning("%s: #%u: got completion callback,"
	397	" but status is \'%s\'\n",
	398	thread_name, total_tests - 1,
	399	status == DMA_ERROR ? "error" : "in progress");
4a776f0a HS	400	failed_tests++;
	401	continue;
	402	}
e44e0aa3	403
d86be86e	404	/* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
b54d5cb9 DW	405	for (i = 0; i < dst_cnt; i++)
	406	dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
	407	DMA_BIDIRECTIONAL);
4a776f0a HS	408
	409	error_count = 0;
	410
	411	pr_debug("%s: verifying source buffer...\n", thread_name);
b54d5cb9	412	error_count += dmatest_verify(thread->srcs, 0, src_off,
4a776f0a	413	0, PATTERN_SRC, true);
b54d5cb9	414	error_count += dmatest_verify(thread->srcs, src_off,
4a776f0a HS	415	src_off + len, src_off,
4a776f0a HS	416	PATTERN_SRC \| PATTERN_COPY, true);
b54d5cb9	417	error_count += dmatest_verify(thread->srcs, src_off + len,
4a776f0a HS	418	test_buf_size, src_off + len,
	419	PATTERN_SRC, true);
	420
	421	pr_debug("%s: verifying dest buffer...\n",
	422	thread->task->comm);
b54d5cb9	423	error_count += dmatest_verify(thread->dsts, 0, dst_off,
4a776f0a	424	0, PATTERN_DST, false);
b54d5cb9	425	error_count += dmatest_verify(thread->dsts, dst_off,
4a776f0a HS	426	dst_off + len, src_off,
4a776f0a HS	427	PATTERN_SRC \| PATTERN_COPY, false);
b54d5cb9	428	error_count += dmatest_verify(thread->dsts, dst_off + len,
4a776f0a HS	429	test_buf_size, dst_off + len,
	430	PATTERN_DST, false);
	431
	432	if (error_count) {
	433	pr_warning("%s: #%u: %u errors with "
	434	"src_off=0x%x dst_off=0x%x len=0x%x\n",
	435	thread_name, total_tests - 1, error_count,
	436	src_off, dst_off, len);
	437	failed_tests++;
	438	} else {
	439	pr_debug("%s: #%u: No errors with "
	440	"src_off=0x%x dst_off=0x%x len=0x%x\n",
	441	thread_name, total_tests - 1,
	442	src_off, dst_off, len);
	443	}
	444	}
	445
	446	ret = 0;
b54d5cb9 DW	447	for (i = 0; thread->dsts[i]; i++)
b54d5cb9 DW	448	kfree(thread->dsts[i]);
4a776f0a	449	err_dstbuf:
b54d5cb9 DW	450	kfree(thread->dsts);
	451	err_dsts:
	452	for (i = 0; thread->srcs[i]; i++)
	453	kfree(thread->srcs[i]);
4a776f0a	454	err_srcbuf:
b54d5cb9 DW	455	kfree(thread->srcs);
b54d5cb9 DW	456	err_srcs:
4a776f0a HS	457	pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
4a776f0a HS	458	thread_name, total_tests, failed_tests, ret);
0a2ff57d NF	459
	460	if (iterations > 0)
	461	while (!kthread_should_stop()) {
	462	DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit);
	463	interruptible_sleep_on(&wait_dmatest_exit);
	464	}
	465
4a776f0a HS	466	return ret;
	467	}
	468
	469	static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
	470	{
	471	struct dmatest_thread *thread;
	472	struct dmatest_thread *_thread;
	473	int ret;
	474
	475	list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
	476	ret = kthread_stop(thread->task);
	477	pr_debug("dmatest: thread %s exited with status %d\n",
	478	thread->task->comm, ret);
	479	list_del(&thread->node);
	480	kfree(thread);
	481	}
	482	kfree(dtc);
	483	}
	484
b54d5cb9	485	static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
4a776f0a	486	{
b54d5cb9 DW	487	struct dmatest_thread *thread;
	488	struct dma_chan *chan = dtc->chan;
	489	char *op;
	490	unsigned int i;
4a776f0a	491
b54d5cb9 DW	492	if (type == DMA_MEMCPY)
	493	op = "copy";
	494	else if (type == DMA_XOR)
	495	op = "xor";
58691d64 DW	496	else if (type == DMA_PQ)
58691d64 DW	497	op = "pq";
b54d5cb9 DW	498	else
b54d5cb9 DW	499	return -EINVAL;
4a776f0a HS	500
	501	for (i = 0; i < threads_per_chan; i++) {
	502	thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
	503	if (!thread) {
b54d5cb9 DW	504	pr_warning("dmatest: No memory for %s-%s%u\n",
	505	dma_chan_name(chan), op, i);
	506
4a776f0a HS	507	break;
	508	}
	509	thread->chan = dtc->chan;
b54d5cb9	510	thread->type = type;
4a776f0a	511	smp_wmb();
b54d5cb9 DW	512	thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
b54d5cb9 DW	513	dma_chan_name(chan), op, i);
4a776f0a	514	if (IS_ERR(thread->task)) {
b54d5cb9 DW	515	pr_warning("dmatest: Failed to run thread %s-%s%u\n",
b54d5cb9 DW	516	dma_chan_name(chan), op, i);
4a776f0a HS	517	kfree(thread);
	518	break;
	519	}
	520
	521	/* srcbuf and dstbuf are allocated by the thread itself */
	522
	523	list_add_tail(&thread->node, &dtc->threads);
	524	}
	525
b54d5cb9 DW	526	return i;
	527	}
	528
	529	static int dmatest_add_channel(struct dma_chan *chan)
	530	{
	531	struct dmatest_chan *dtc;
	532	struct dma_device *dma_dev = chan->device;
	533	unsigned int thread_count = 0;
	534	unsigned int cnt;
	535
	536	dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
	537	if (!dtc) {
	538	pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
	539	return -ENOMEM;
	540	}
	541
	542	dtc->chan = chan;
	543	INIT_LIST_HEAD(&dtc->threads);
	544
	545	if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
	546	cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
f1aef8b6	547	thread_count += cnt > 0 ? cnt : 0;
b54d5cb9 DW	548	}
	549	if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
	550	cnt = dmatest_add_threads(dtc, DMA_XOR);
f1aef8b6	551	thread_count += cnt > 0 ? cnt : 0;
b54d5cb9	552	}
58691d64 DW	553	if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
	554	cnt = dmatest_add_threads(dtc, DMA_PQ);
	555	thread_count += cnt > 0 ?: 0;
	556	}
b54d5cb9 DW	557
	558	pr_info("dmatest: Started %u threads using %s\n",
	559	thread_count, dma_chan_name(chan));
4a776f0a HS	560
	561	list_add_tail(&dtc->node, &dmatest_channels);
	562	nr_channels++;
	563
33df8ca0	564	return 0;
4a776f0a HS	565	}
4a776f0a HS	566
7dd60251	567	static bool filter(struct dma_chan chan, void param)
4a776f0a	568	{
33df8ca0	569	if (!dmatest_match_channel(chan) \|\| !dmatest_match_device(chan->device))
7dd60251	570	return false;
33df8ca0	571	else
7dd60251	572	return true;
4a776f0a HS	573	}
4a776f0a HS	574
4a776f0a HS	575	static int __init dmatest_init(void)
4a776f0a HS	576	{
33df8ca0 DW	577	dma_cap_mask_t mask;
	578	struct dma_chan *chan;
	579	int err = 0;
	580
	581	dma_cap_zero(mask);
	582	dma_cap_set(DMA_MEMCPY, mask);
	583	for (;;) {
	584	chan = dma_request_channel(mask, filter, NULL);
	585	if (chan) {
	586	err = dmatest_add_channel(chan);
c56c81ab	587	if (err) {
33df8ca0 DW	588	dma_release_channel(chan);
	589	break; /* add_channel failed, punt */
	590	}
	591	} else
	592	break; /* no more channels available */
	593	if (max_channels && nr_channels >= max_channels)
	594	break; /* we have all we need */
	595	}
4a776f0a	596
33df8ca0	597	return err;
4a776f0a	598	}
33df8ca0 DW	599	/* when compiled-in wait for drivers to load first */
33df8ca0 DW	600	late_initcall(dmatest_init);
4a776f0a HS	601
	602	static void __exit dmatest_exit(void)
	603	{
33df8ca0	604	struct dmatest_chan dtc, _dtc;
7cbd4877	605	struct dma_chan *chan;
33df8ca0 DW	606
	607	list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
	608	list_del(&dtc->node);
7cbd4877	609	chan = dtc->chan;
33df8ca0 DW	610	dmatest_cleanup_channel(dtc);
33df8ca0 DW	611	pr_debug("dmatest: dropped channel %s\n",
7cbd4877 DW	612	dma_chan_name(chan));
7cbd4877 DW	613	dma_release_channel(chan);
33df8ca0	614	}
4a776f0a HS	615	}
	616	module_exit(dmatest_exit);
	617
	618	MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
	619	MODULE_LICENSE("GPL v2");