Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 LW |
17 | config DMADEVICES_DEBUG |
18 | bool "DMA Engine debugging" | |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
23 | ||
24 | config DMADEVICES_VDEBUG | |
25 | bool "DMA Engine verbose debugging" | |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
31 | ||
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
62 | select DMA_ENGINE | |
63 | help | |
64 | Enable support for Altera / Intel mSGDMA controller. | |
65 | ||
e8689e63 LW |
66 | config AMBA_PL08X |
67 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 68 | depends on ARM_AMBA |
e8689e63 | 69 | select DMA_ENGINE |
083be28a | 70 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 71 | help |
1e1cfc72 LW |
72 | Say yes if your platform has a PL08x DMAC device which can |
73 | provide DMA engine support. This includes the original ARM | |
74 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
75 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 76 | |
3c216190 VK |
77 | config AMCC_PPC440SPE_ADMA |
78 | tristate "AMCC PPC440SPe ADMA support" | |
79 | depends on 440SPe || 440SP | |
2ed6dc34 | 80 | select DMA_ENGINE |
3cc377b9 | 81 | select DMA_ENGINE_RAID |
3c216190 | 82 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 83 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 84 | help |
3c216190 | 85 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 86 | |
dc78baa2 NF |
87 | config AT_HDMAC |
88 | tristate "Atmel AHB DMA support" | |
f898fed0 | 89 | depends on ARCH_AT91 |
dc78baa2 NF |
90 | select DMA_ENGINE |
91 | help | |
f898fed0 | 92 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 93 | |
e1f7c9ee LD |
94 | config AT_XDMAC |
95 | tristate "Atmel XDMA support" | |
6e5ae29b | 96 | depends on ARCH_AT91 |
e1f7c9ee LD |
97 | select DMA_ENGINE |
98 | help | |
99 | Support the Atmel XDMA controller. | |
2ed6dc34 | 100 | |
3c216190 VK |
101 | config AXI_DMAC |
102 | tristate "Analog Devices AXI-DMAC DMA support" | |
23b84639 | 103 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 104 | select DMA_ENGINE |
3c216190 | 105 | select DMA_VIRTUAL_CHANNELS |
2ed6dc34 | 106 | help |
3c216190 VK |
107 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
108 | controller is often used in Analog Device's reference designs for FPGA | |
109 | platforms. | |
c13c8260 | 110 | |
743e1c8f AP |
111 | config BCM_SBA_RAID |
112 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
113 | depends on ARM64 || COMPILE_TEST |
114 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
115 | select DMA_ENGINE |
116 | select DMA_ENGINE_RAID | |
117 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
118 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 119 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
120 | help |
121 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
122 | engine is available on most of the Broadcom iProc SoCs. It | |
123 | has the capability to offload memcpy, xor and pq computation | |
124 | for raid5/6. | |
125 | ||
3c216190 VK |
126 | config COH901318 |
127 | bool "ST-Ericsson COH901318 DMA support" | |
128 | select DMA_ENGINE | |
6e450376 | 129 | depends on ARCH_U300 || COMPILE_TEST |
3c216190 VK |
130 | help |
131 | Enable support for ST-Ericsson COH 901 318 DMA. | |
132 | ||
133 | config DMA_BCM2835 | |
134 | tristate "BCM2835 DMA engine support" | |
135 | depends on ARCH_BCM2835 | |
136 | select DMA_ENGINE | |
137 | select DMA_VIRTUAL_CHANNELS | |
138 | ||
139 | config DMA_JZ4740 | |
140 | tristate "JZ4740 DMA support" | |
d78d6c07 | 141 | depends on MACH_JZ4740 || COMPILE_TEST |
3c216190 VK |
142 | select DMA_ENGINE |
143 | select DMA_VIRTUAL_CHANNELS | |
144 | ||
145 | config DMA_JZ4780 | |
146 | tristate "JZ4780 DMA support" | |
c558ecd2 | 147 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
148 | select DMA_ENGINE |
149 | select DMA_VIRTUAL_CHANNELS | |
150 | help | |
3c216190 VK |
151 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
152 | If you have a board based on such a SoC and wish to use DMA for | |
153 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 154 | |
3c216190 VK |
155 | config DMA_SA11X0 |
156 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 157 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 158 | select DMA_ENGINE |
3c216190 | 159 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 160 | help |
3c216190 VK |
161 | Support the DMA engine found on Intel StrongARM SA-1100 and |
162 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
163 | devices. | |
dc78baa2 | 164 | |
3c216190 VK |
165 | config DMA_SUN4I |
166 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 167 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 168 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 169 | select DMA_ENGINE |
3c216190 | 170 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 171 | help |
3c216190 VK |
172 | Enable support for the DMA controller present in the sun4i, |
173 | sun5i and sun7i Allwinner ARM SoCs. | |
174 | ||
175 | config DMA_SUN6I | |
176 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 177 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
178 | depends on RESET_CONTROLLER |
179 | select DMA_ENGINE | |
180 | select DMA_VIRTUAL_CHANNELS | |
181 | help | |
182 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
183 | ||
1fe20f1b EP |
184 | config DW_AXI_DMAC |
185 | tristate "Synopsys DesignWare AXI DMA support" | |
186 | depends on OF || COMPILE_TEST | |
187 | select DMA_ENGINE | |
188 | select DMA_VIRTUAL_CHANNELS | |
189 | help | |
190 | Enable support for Synopsys DesignWare AXI DMA controller. | |
191 | NOTE: This driver wasn't tested on 64 bit platform because | |
192 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
193 | ||
3c216190 VK |
194 | config EP93XX_DMA |
195 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 196 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
197 | select DMA_ENGINE |
198 | help | |
199 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 200 | |
173acc7c | 201 | config FSL_DMA |
8de7a7d9 | 202 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 203 | depends on FSL_SOC |
173acc7c | 204 | select DMA_ENGINE |
5fc6d897 | 205 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 206 | ---help--- |
8de7a7d9 HZ |
207 | Enable support for the Freescale Elo series DMA controllers. |
208 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
209 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
210 | some Txxx and Bxxx parts. | |
173acc7c | 211 | |
3c216190 VK |
212 | config FSL_EDMA |
213 | tristate "Freescale eDMA engine support" | |
214 | depends on OF | |
215 | select DMA_ENGINE | |
216 | select DMA_VIRTUAL_CHANNELS | |
217 | help | |
218 | Support the Freescale eDMA engine with programmable channel | |
219 | multiplexing capability for DMA request sources(slot). | |
220 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
221 | ||
b092529e PM |
222 | config FSL_QDMA |
223 | tristate "NXP Layerscape qDMA engine support" | |
224 | depends on ARM || ARM64 | |
225 | select DMA_ENGINE | |
226 | select DMA_VIRTUAL_CHANNELS | |
227 | select DMA_ENGINE_RAID | |
228 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
229 | help | |
230 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
231 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
232 | or dequeuing DMA jobs from, different work queues. | |
233 | This module can be found on NXP Layerscape SoCs. | |
234 | The qdma driver only work on SoCs with a DPAA hardware block. | |
235 | ||
ad80da65 XS |
236 | config FSL_RAID |
237 | tristate "Freescale RAID engine Support" | |
238 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
239 | select DMA_ENGINE | |
240 | select DMA_ENGINE_RAID | |
241 | ---help--- | |
242 | Enable support for Freescale RAID Engine. RAID Engine is | |
243 | available on some QorIQ SoCs (like P5020/P5040). It has | |
244 | the capability to offload memcpy, xor and pq computation | |
245 | for raid5/6. | |
246 | ||
3c216190 VK |
247 | config IMG_MDC_DMA |
248 | tristate "IMG MDC support" | |
249 | depends on MIPS || COMPILE_TEST | |
250 | depends on MFD_SYSCON | |
0fb6f739 | 251 | select DMA_ENGINE |
3c216190 VK |
252 | select DMA_VIRTUAL_CHANNELS |
253 | help | |
254 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 255 | |
3c216190 VK |
256 | config IMX_DMA |
257 | tristate "i.MX DMA support" | |
8e2d41f8 | 258 | depends on ARCH_MXC |
ff7b0479 | 259 | select DMA_ENGINE |
5296b56d | 260 | help |
3c216190 VK |
261 | Support the i.MX DMA engine. This engine is integrated into |
262 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 263 | |
3c216190 VK |
264 | config IMX_SDMA |
265 | tristate "i.MX SDMA support" | |
8e2d41f8 | 266 | depends on ARCH_MXC |
5296b56d | 267 | select DMA_ENGINE |
57b772b8 | 268 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 269 | help |
3c216190 VK |
270 | Support the i.MX SDMA engine. This engine is integrated into |
271 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 272 | |
9ab8b4e7 | 273 | config INTEL_IDMA64 |
35271227 LT |
274 | tristate "Intel integrated DMA 64-bit support" |
275 | select DMA_ENGINE | |
276 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 277 | help |
35271227 LT |
278 | Enable DMA support for Intel Low Power Subsystem such as found on |
279 | Intel Skylake PCH. | |
5296b56d | 280 | |
3c216190 VK |
281 | config INTEL_IOATDMA |
282 | tristate "Intel I/OAT DMA support" | |
283 | depends on PCI && X86_64 | |
a57e16cf | 284 | select DMA_ENGINE |
3c216190 VK |
285 | select DMA_ENGINE_RAID |
286 | select DCA | |
a57e16cf | 287 | help |
3c216190 VK |
288 | Enable support for the Intel(R) I/OAT DMA engine present |
289 | in recent Intel Xeon chipsets. | |
a57e16cf | 290 | |
3c216190 VK |
291 | Say Y here if you have such a chipset. |
292 | ||
293 | If unsure, say N. | |
294 | ||
295 | config INTEL_IOP_ADMA | |
296 | tristate "Intel IOP ADMA support" | |
297 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
ea76f0b3 | 298 | select DMA_ENGINE |
3c216190 | 299 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 300 | help |
3c216190 | 301 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 302 | |
3c216190 VK |
303 | config INTEL_MIC_X100_DMA |
304 | tristate "Intel MIC X100 DMA Driver" | |
305 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ec8a1586 LD |
306 | select DMA_ENGINE |
307 | help | |
3c216190 VK |
308 | This enables DMA support for the Intel Many Integrated Core |
309 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
310 | run a 64 bit Linux OS. This driver will be used by both MIC | |
311 | host and card drivers. | |
ec8a1586 | 312 | |
3c216190 VK |
313 | If you are building host kernel with a MIC device or a card |
314 | kernel for a MIC device, then say M (recommended) or Y, else | |
315 | say N. If unsure say N. | |
316 | ||
317 | More information about the Intel MIC family as well as the Linux | |
318 | OS and tools for MIC to use with this driver are available from | |
319 | <http://software.intel.com/en-us/mic-developer>. | |
320 | ||
321 | config K3_DMA | |
322 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 323 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
324 | select DMA_ENGINE |
325 | select DMA_VIRTUAL_CHANNELS | |
326 | help | |
3c216190 VK |
327 | Support the DMA engine for Hisilicon K3 platform |
328 | devices. | |
ddeccb8d | 329 | |
3c216190 VK |
330 | config LPC18XX_DMAMUX |
331 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
332 | depends on ARCH_LPC18XX || COMPILE_TEST | |
333 | depends on OF && AMBA_PL08X | |
334 | select MFD_SYSCON | |
335 | help | |
336 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
337 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 338 | |
e7a3ff92 AD |
339 | config MCF_EDMA |
340 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
341 | depends on M5441x || COMPILE_TEST | |
342 | select DMA_ENGINE | |
343 | select DMA_VIRTUAL_CHANNELS | |
344 | help | |
345 | Support the Freescale ColdFire eDMA engine, 64-channel | |
346 | implementation that performs complex data transfers with | |
347 | minimal intervention from a host processor. | |
348 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
349 | ||
3c216190 VK |
350 | config MMP_PDMA |
351 | bool "MMP PDMA support" | |
cd3a792a | 352 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 353 | select DMA_ENGINE |
61f135b9 | 354 | help |
3c216190 | 355 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 356 | |
3c216190 VK |
357 | config MMP_TDMA |
358 | bool "MMP Two-Channel DMA support" | |
93d05f1e | 359 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 360 | select DMA_ENGINE |
93d05f1e | 361 | select MMP_SRAM if ARCH_MMP |
d6619761 | 362 | select GENERIC_ALLOCATOR |
8d318a50 | 363 | help |
3c216190 VK |
364 | Support the MMP Two-Channel DMA engine. |
365 | This engine used for MMP Audio DMA and pxa910 SQU. | |
366 | It needs sram driver under mach-mmp. | |
8d318a50 | 367 | |
3c216190 VK |
368 | config MOXART_DMA |
369 | tristate "MOXART DMA support" | |
370 | depends on ARCH_MOXART | |
12458ea0 | 371 | select DMA_ENGINE |
3c216190 | 372 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 373 | help |
3c216190 VK |
374 | Enable support for the MOXA ART SoC DMA controller. |
375 | ||
376 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 377 | |
3c216190 VK |
378 | config MPC512X_DMA |
379 | tristate "Freescale MPC512x built-in DMA engine support" | |
380 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 381 | select DMA_ENGINE |
3c216190 VK |
382 | ---help--- |
383 | Enable support for the Freescale MPC512x built-in DMA engine. | |
de5d4453 | 384 | |
3c216190 VK |
385 | config MV_XOR |
386 | bool "Marvell XOR engine support" | |
c39290a1 | 387 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 388 | select DMA_ENGINE |
3c216190 VK |
389 | select DMA_ENGINE_RAID |
390 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
391 | ---help--- | |
392 | Enable support for the Marvell XOR engine. | |
ca21a146 | 393 | |
19a340b1 TP |
394 | config MV_XOR_V2 |
395 | bool "Marvell XOR engine version 2 support " | |
396 | depends on ARM64 | |
397 | select DMA_ENGINE | |
398 | select DMA_ENGINE_RAID | |
399 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
400 | select GENERIC_MSI_IRQ_DOMAIN | |
401 | ---help--- | |
402 | Enable support for the Marvell version 2 XOR engine. | |
403 | ||
404 | This engine provides acceleration for copy, XOR and RAID6 | |
405 | operations, and is available on Marvell Armada 7K and 8K | |
406 | platforms. | |
407 | ||
3c216190 VK |
408 | config MXS_DMA |
409 | bool "MXS DMA support" | |
d762e4f3 | 410 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 411 | select STMP_DEVICE |
ca21a146 RY |
412 | select DMA_ENGINE |
413 | help | |
3c216190 | 414 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 415 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 416 | |
3c216190 VK |
417 | config MX3_IPU |
418 | bool "MX3x Image Processing Unit support" | |
419 | depends on ARCH_MXC | |
c2dde5f8 | 420 | select DMA_ENGINE |
3c216190 | 421 | default y |
c2dde5f8 | 422 | help |
3c216190 VK |
423 | If you plan to use the Image Processing unit in the i.MX3x, say |
424 | Y here. If unsure, select Y. | |
a074ae38 | 425 | |
3c216190 VK |
426 | config MX3_IPU_IRQS |
427 | int "Number of dynamically mapped interrupts for IPU" | |
428 | depends on MX3_IPU | |
429 | range 2 137 | |
430 | default 4 | |
431 | help | |
432 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
433 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
434 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 435 | |
3c216190 VK |
436 | config NBPFAXI_DMA |
437 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 438 | select DMA_ENGINE |
3c216190 | 439 | depends on ARM || COMPILE_TEST |
b3040e40 | 440 | help |
3c216190 | 441 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 442 | |
47e20577 MS |
443 | config OWL_DMA |
444 | tristate "Actions Semi Owl SoCs DMA support" | |
445 | depends on ARCH_ACTIONS | |
446 | select DMA_ENGINE | |
447 | select DMA_VIRTUAL_CHANNELS | |
448 | help | |
449 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
450 | ||
0c42bd0e | 451 | config PCH_DMA |
ca7fe2db | 452 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 453 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
454 | select DMA_ENGINE |
455 | help | |
2cdf2455 TM |
456 | Enable support for Intel EG20T PCH DMA engine. |
457 | ||
e79e72be | 458 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
459 | Output Hub), ML7213, ML7223 and ML7831. |
460 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
461 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
462 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
463 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 464 | |
3c216190 VK |
465 | config PL330_DMA |
466 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 467 | select DMA_ENGINE |
3c216190 | 468 | depends on ARM_AMBA |
1ec1e82f | 469 | help |
3c216190 VK |
470 | Select if your platform has one or more PL330 DMACs. |
471 | You need to provide platform specific settings via | |
472 | platform_data for a dma-pl330 device. | |
1ec1e82f | 473 | |
3c216190 VK |
474 | config PXA_DMA |
475 | bool "PXA DMA support" | |
476 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 477 | select DMA_ENGINE |
3c216190 | 478 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 479 | help |
3c216190 VK |
480 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
481 | platform. The internal DMA IP of all PXA variants is supported, with | |
482 | 16 to 32 channels for peripheral to memory or memory to memory | |
483 | transfers. | |
1f1846c6 | 484 | |
3c216190 VK |
485 | config SIRF_DMA |
486 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
487 | depends on ARCH_SIRF | |
a580b8c5 SG |
488 | select DMA_ENGINE |
489 | help | |
3c216190 | 490 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 491 | |
3c216190 VK |
492 | config STE_DMA40 |
493 | bool "ST-Ericsson DMA40 support" | |
494 | depends on ARCH_U8500 | |
760ee1c4 MW |
495 | select DMA_ENGINE |
496 | help | |
3c216190 | 497 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 498 | |
6b4cd727 PG |
499 | config ST_FDMA |
500 | tristate "ST FDMA dmaengine support" | |
501 | depends on ARCH_STI | |
3d6b3715 | 502 | depends on REMOTEPROC |
6b4cd727 PG |
503 | select ST_SLIM_REMOTEPROC |
504 | select DMA_ENGINE | |
505 | select DMA_VIRTUAL_CHANNELS | |
506 | help | |
507 | Enable support for ST FDMA controller. | |
508 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
509 | ||
510 | Say Y here if you have such a chipset. | |
511 | If unsure, say N. | |
512 | ||
d8b46839 CM |
513 | config STM32_DMA |
514 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 515 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 516 | select DMA_ENGINE |
d8b46839 CM |
517 | select DMA_VIRTUAL_CHANNELS |
518 | help | |
519 | Enable support for the on-chip DMA controller on STMicroelectronics | |
520 | STM32 MCUs. | |
ddf9bd40 | 521 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
522 | here. |
523 | ||
df7e762d PYM |
524 | config STM32_DMAMUX |
525 | bool "STMicroelectronics STM32 dma multiplexer support" | |
526 | depends on STM32_DMA || COMPILE_TEST | |
527 | help | |
528 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
529 | STM32 MCUs. | |
530 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
531 | here. | |
532 | ||
a4ffb13c PYM |
533 | config STM32_MDMA |
534 | bool "STMicroelectronics STM32 master dma support" | |
535 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 536 | depends on OF |
a4ffb13c | 537 | select DMA_ENGINE |
a4ffb13c PYM |
538 | select DMA_VIRTUAL_CHANNELS |
539 | help | |
540 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
541 | STM32 platforms. | |
542 | If you have a board based on STM32 SoC and wish to use the master DMA | |
543 | say Y here. | |
544 | ||
9b3b8171 BW |
545 | config SPRD_DMA |
546 | tristate "Spreadtrum DMA support" | |
547 | depends on ARCH_SPRD || COMPILE_TEST | |
548 | select DMA_ENGINE | |
549 | select DMA_VIRTUAL_CHANNELS | |
550 | help | |
551 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
552 | ||
3c216190 | 553 | config S3C24XX_DMAC |
9bdca822 | 554 | bool "Samsung S3C24XX DMA support" |
1609db6f | 555 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 556 | select DMA_ENGINE |
50437bff | 557 | select DMA_VIRTUAL_CHANNELS |
6365bead | 558 | help |
3c216190 VK |
559 | Support for the Samsung S3C24XX DMA controller driver. The |
560 | DMA controller is having multiple DMA channels which can be | |
561 | configured for different peripherals like audio, UART, SPI. | |
562 | The DMA controller can transfer data from memory to peripheral, | |
563 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 564 | |
3c216190 VK |
565 | config TXX9_DMAC |
566 | tristate "Toshiba TXx9 SoC DMA support" | |
567 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
568 | select DMA_ENGINE |
569 | help | |
3c216190 VK |
570 | Support the TXx9 SoC internal DMA controller. This can be |
571 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 572 | |
3c216190 VK |
573 | config TEGRA20_APB_DMA |
574 | bool "NVIDIA Tegra20 APB DMA support" | |
575 | depends on ARCH_TEGRA | |
7bedaa55 | 576 | select DMA_ENGINE |
3c216190 VK |
577 | help |
578 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
579 | DMA controller is having multiple DMA channel which can be | |
580 | configured for different peripherals like audio, UART, SPI, | |
581 | I2C etc which is in APB bus. | |
582 | This DMA controller transfers data from memory to peripheral fifo | |
583 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 584 | |
f46b1957 | 585 | config TEGRA210_ADMA |
3ed16793 | 586 | tristate "NVIDIA Tegra210 ADMA support" |
4cd16941 | 587 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK |
f46b1957 JH |
588 | select DMA_ENGINE |
589 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
590 | help |
591 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
592 | DMA controller has multiple DMA channels and is used to service | |
593 | various audio clients in the Tegra210 audio processing engine | |
594 | (APE). This DMA controller transfers data from memory to | |
595 | peripheral and vice versa. It does not support memory to | |
596 | memory data transfer. | |
597 | ||
3c216190 VK |
598 | config TIMB_DMA |
599 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 600 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 601 | select DMA_ENGINE |
3c216190 VK |
602 | help |
603 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 604 | |
32e74aab MY |
605 | config UNIPHIER_MDMAC |
606 | tristate "UniPhier MIO DMAC" | |
607 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
608 | depends on OF | |
609 | select DMA_ENGINE | |
610 | select DMA_VIRTUAL_CHANNELS | |
611 | help | |
612 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
613 | UniPhier platform. This DMA controller is used as the external | |
614 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
615 | ||
3c216190 VK |
616 | config XGENE_DMA |
617 | tristate "APM X-Gene DMA support" | |
618 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 619 | select DMA_ENGINE |
3c216190 VK |
620 | select DMA_ENGINE_RAID |
621 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 622 | help |
3c216190 | 623 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 624 | |
fde57a7c KA |
625 | config XILINX_DMA |
626 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 627 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
628 | select DMA_ENGINE |
629 | help | |
630 | Enable support for Xilinx AXI VDMA Soft IP. | |
631 | ||
fde57a7c | 632 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
633 | between memory and AXI4-Stream video type target |
634 | peripherals including peripherals which support AXI4- | |
635 | Stream Video Protocol. It has two stream interfaces/ | |
636 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
637 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
638 | AXI CDMA engine provides high-bandwidth direct memory access |
639 | between a memory-mapped source address and a memory-mapped | |
640 | destination address. | |
641 | AXI DMA engine provides high-bandwidth one dimensional direct | |
642 | memory access between memory and AXI4-Stream target peripherals. | |
9cd4360d | 643 | |
b0cc417c KA |
644 | config XILINX_ZYNQMP_DMA |
645 | tristate "Xilinx ZynqMP DMA Engine" | |
646 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
647 | select DMA_ENGINE | |
648 | help | |
649 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 650 | |
e3fa9841 | 651 | config ZX_DMA |
253f9f44 | 652 | tristate "ZTE ZX DMA support" |
854d4bd2 | 653 | depends on ARCH_ZX || COMPILE_TEST |
5689ba7f AB |
654 | select DMA_ENGINE |
655 | select DMA_VIRTUAL_CHANNELS | |
656 | help | |
253f9f44 | 657 | Support the DMA engine for ZTE ZX family platform devices. |
5689ba7f | 658 | |
9f2fd0df | 659 | |
3c216190 VK |
660 | # driver files |
661 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 662 | |
548c4597 SW |
663 | source "drivers/dma/mediatek/Kconfig" |
664 | ||
d9b31efc SK |
665 | source "drivers/dma/qcom/Kconfig" |
666 | ||
3c216190 | 667 | source "drivers/dma/dw/Kconfig" |
50437bff | 668 | |
3c216190 | 669 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 670 | |
3c216190 | 671 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 672 | |
d88b1397 PU |
673 | source "drivers/dma/ti/Kconfig" |
674 | ||
3c216190 | 675 | # clients |
db217334 | 676 | comment "DMA Clients" |
2ed6dc34 | 677 | depends on DMA_ENGINE |
db217334 | 678 | |
729b5d1b DW |
679 | config ASYNC_TX_DMA |
680 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 681 | depends on DMA_ENGINE |
729b5d1b DW |
682 | help |
683 | This allows the async_tx api to take advantage of offload engines for | |
684 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
685 | a dma engine that can perform raid operations and you have enabled | |
686 | MD_RAID456 say Y. | |
687 | ||
688 | If unsure, say N. | |
689 | ||
4a776f0a HS |
690 | config DMATEST |
691 | tristate "DMA Test client" | |
692 | depends on DMA_ENGINE | |
58532e66 | 693 | select DMA_ENGINE_RAID |
4a776f0a HS |
694 | help |
695 | Simple DMA test client. Say N unless you're debugging a | |
696 | DMA Device driver. | |
697 | ||
3cc377b9 DW |
698 | config DMA_ENGINE_RAID |
699 | bool | |
700 | ||
2ed6dc34 | 701 | endif |