Commit | Line | Data |
---|---|---|
c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
3c216190 VK |
36 | #core |
37 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
38 | bool | |
95b4ecbf | 39 | |
3c216190 VK |
40 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
41 | bool | |
95b4ecbf | 42 | |
3c216190 | 43 | config DMA_ENGINE |
138f4c35 DW |
44 | bool |
45 | ||
3c216190 VK |
46 | config DMA_VIRTUAL_CHANNELS |
47 | tristate | |
48 | ||
49 | config DMA_ACPI | |
50 | def_bool y | |
51 | depends on ACPI | |
52 | ||
53 | config DMA_OF | |
54 | def_bool y | |
55 | depends on OF | |
56 | select DMA_ENGINE | |
57 | ||
58 | #devices | |
a85c6f1b SR |
59 | config ALTERA_MSGDMA |
60 | tristate "Altera / Intel mSGDMA Engine" | |
61 | select DMA_ENGINE | |
62 | help | |
63 | Enable support for Altera / Intel mSGDMA controller. | |
64 | ||
e8689e63 LW |
65 | config AMBA_PL08X |
66 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 67 | depends on ARM_AMBA |
e8689e63 | 68 | select DMA_ENGINE |
083be28a | 69 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 70 | help |
1e1cfc72 LW |
71 | Say yes if your platform has a PL08x DMAC device which can |
72 | provide DMA engine support. This includes the original ARM | |
73 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
74 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 75 | |
3c216190 VK |
76 | config AMCC_PPC440SPE_ADMA |
77 | tristate "AMCC PPC440SPe ADMA support" | |
78 | depends on 440SPe || 440SP | |
2ed6dc34 | 79 | select DMA_ENGINE |
3cc377b9 | 80 | select DMA_ENGINE_RAID |
3c216190 | 81 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 82 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 83 | help |
3c216190 | 84 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 85 | |
dc78baa2 NF |
86 | config AT_HDMAC |
87 | tristate "Atmel AHB DMA support" | |
f898fed0 | 88 | depends on ARCH_AT91 |
dc78baa2 NF |
89 | select DMA_ENGINE |
90 | help | |
f898fed0 | 91 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 92 | |
e1f7c9ee LD |
93 | config AT_XDMAC |
94 | tristate "Atmel XDMA support" | |
6e5ae29b | 95 | depends on ARCH_AT91 |
e1f7c9ee LD |
96 | select DMA_ENGINE |
97 | help | |
98 | Support the Atmel XDMA controller. | |
2ed6dc34 | 99 | |
3c216190 VK |
100 | config AXI_DMAC |
101 | tristate "Analog Devices AXI-DMAC DMA support" | |
102 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST | |
2ed6dc34 | 103 | select DMA_ENGINE |
3c216190 | 104 | select DMA_VIRTUAL_CHANNELS |
2ed6dc34 | 105 | help |
3c216190 VK |
106 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
107 | controller is often used in Analog Device's reference designs for FPGA | |
108 | platforms. | |
c13c8260 | 109 | |
743e1c8f AP |
110 | config BCM_SBA_RAID |
111 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
112 | depends on ARM64 || COMPILE_TEST |
113 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
114 | select DMA_ENGINE |
115 | select DMA_ENGINE_RAID | |
116 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
117 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 118 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
119 | help |
120 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
121 | engine is available on most of the Broadcom iProc SoCs. It | |
122 | has the capability to offload memcpy, xor and pq computation | |
123 | for raid5/6. | |
124 | ||
3c216190 VK |
125 | config COH901318 |
126 | bool "ST-Ericsson COH901318 DMA support" | |
127 | select DMA_ENGINE | |
6e450376 | 128 | depends on ARCH_U300 || COMPILE_TEST |
3c216190 VK |
129 | help |
130 | Enable support for ST-Ericsson COH 901 318 DMA. | |
131 | ||
132 | config DMA_BCM2835 | |
133 | tristate "BCM2835 DMA engine support" | |
134 | depends on ARCH_BCM2835 | |
135 | select DMA_ENGINE | |
136 | select DMA_VIRTUAL_CHANNELS | |
137 | ||
138 | config DMA_JZ4740 | |
139 | tristate "JZ4740 DMA support" | |
d78d6c07 | 140 | depends on MACH_JZ4740 || COMPILE_TEST |
3c216190 VK |
141 | select DMA_ENGINE |
142 | select DMA_VIRTUAL_CHANNELS | |
143 | ||
144 | config DMA_JZ4780 | |
145 | tristate "JZ4780 DMA support" | |
c558ecd2 | 146 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
147 | select DMA_ENGINE |
148 | select DMA_VIRTUAL_CHANNELS | |
149 | help | |
3c216190 VK |
150 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
151 | If you have a board based on such a SoC and wish to use DMA for | |
152 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 153 | |
3c216190 VK |
154 | config DMA_SA11X0 |
155 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 156 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 157 | select DMA_ENGINE |
3c216190 | 158 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 159 | help |
3c216190 VK |
160 | Support the DMA engine found on Intel StrongARM SA-1100 and |
161 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
162 | devices. | |
dc78baa2 | 163 | |
3c216190 VK |
164 | config DMA_SUN4I |
165 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 166 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 167 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 168 | select DMA_ENGINE |
3c216190 | 169 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 170 | help |
3c216190 VK |
171 | Enable support for the DMA controller present in the sun4i, |
172 | sun5i and sun7i Allwinner ARM SoCs. | |
173 | ||
174 | config DMA_SUN6I | |
175 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 176 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
177 | depends on RESET_CONTROLLER |
178 | select DMA_ENGINE | |
179 | select DMA_VIRTUAL_CHANNELS | |
180 | help | |
181 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
182 | ||
1fe20f1b EP |
183 | config DW_AXI_DMAC |
184 | tristate "Synopsys DesignWare AXI DMA support" | |
185 | depends on OF || COMPILE_TEST | |
186 | select DMA_ENGINE | |
187 | select DMA_VIRTUAL_CHANNELS | |
188 | help | |
189 | Enable support for Synopsys DesignWare AXI DMA controller. | |
190 | NOTE: This driver wasn't tested on 64 bit platform because | |
191 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
192 | ||
3c216190 VK |
193 | config EP93XX_DMA |
194 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 195 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
196 | select DMA_ENGINE |
197 | help | |
198 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 199 | |
173acc7c | 200 | config FSL_DMA |
8de7a7d9 | 201 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 202 | depends on FSL_SOC |
173acc7c | 203 | select DMA_ENGINE |
5fc6d897 | 204 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 205 | ---help--- |
8de7a7d9 HZ |
206 | Enable support for the Freescale Elo series DMA controllers. |
207 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
208 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
209 | some Txxx and Bxxx parts. | |
173acc7c | 210 | |
3c216190 VK |
211 | config FSL_EDMA |
212 | tristate "Freescale eDMA engine support" | |
213 | depends on OF | |
214 | select DMA_ENGINE | |
215 | select DMA_VIRTUAL_CHANNELS | |
216 | help | |
217 | Support the Freescale eDMA engine with programmable channel | |
218 | multiplexing capability for DMA request sources(slot). | |
219 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
220 | ||
ad80da65 XS |
221 | config FSL_RAID |
222 | tristate "Freescale RAID engine Support" | |
223 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
224 | select DMA_ENGINE | |
225 | select DMA_ENGINE_RAID | |
226 | ---help--- | |
227 | Enable support for Freescale RAID Engine. RAID Engine is | |
228 | available on some QorIQ SoCs (like P5020/P5040). It has | |
229 | the capability to offload memcpy, xor and pq computation | |
230 | for raid5/6. | |
231 | ||
3c216190 VK |
232 | config IMG_MDC_DMA |
233 | tristate "IMG MDC support" | |
234 | depends on MIPS || COMPILE_TEST | |
235 | depends on MFD_SYSCON | |
0fb6f739 | 236 | select DMA_ENGINE |
3c216190 VK |
237 | select DMA_VIRTUAL_CHANNELS |
238 | help | |
239 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 240 | |
3c216190 VK |
241 | config IMX_DMA |
242 | tristate "i.MX DMA support" | |
8e2d41f8 | 243 | depends on ARCH_MXC |
ff7b0479 | 244 | select DMA_ENGINE |
5296b56d | 245 | help |
3c216190 VK |
246 | Support the i.MX DMA engine. This engine is integrated into |
247 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 248 | |
3c216190 VK |
249 | config IMX_SDMA |
250 | tristate "i.MX SDMA support" | |
8e2d41f8 | 251 | depends on ARCH_MXC |
5296b56d | 252 | select DMA_ENGINE |
57b772b8 | 253 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 254 | help |
3c216190 VK |
255 | Support the i.MX SDMA engine. This engine is integrated into |
256 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 257 | |
9ab8b4e7 | 258 | config INTEL_IDMA64 |
35271227 LT |
259 | tristate "Intel integrated DMA 64-bit support" |
260 | select DMA_ENGINE | |
261 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 262 | help |
35271227 LT |
263 | Enable DMA support for Intel Low Power Subsystem such as found on |
264 | Intel Skylake PCH. | |
5296b56d | 265 | |
3c216190 VK |
266 | config INTEL_IOATDMA |
267 | tristate "Intel I/OAT DMA support" | |
268 | depends on PCI && X86_64 | |
a57e16cf | 269 | select DMA_ENGINE |
3c216190 VK |
270 | select DMA_ENGINE_RAID |
271 | select DCA | |
a57e16cf | 272 | help |
3c216190 VK |
273 | Enable support for the Intel(R) I/OAT DMA engine present |
274 | in recent Intel Xeon chipsets. | |
a57e16cf | 275 | |
3c216190 VK |
276 | Say Y here if you have such a chipset. |
277 | ||
278 | If unsure, say N. | |
279 | ||
280 | config INTEL_IOP_ADMA | |
281 | tristate "Intel IOP ADMA support" | |
282 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
ea76f0b3 | 283 | select DMA_ENGINE |
3c216190 | 284 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 285 | help |
3c216190 | 286 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 287 | |
3c216190 VK |
288 | config INTEL_MIC_X100_DMA |
289 | tristate "Intel MIC X100 DMA Driver" | |
290 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ec8a1586 LD |
291 | select DMA_ENGINE |
292 | help | |
3c216190 VK |
293 | This enables DMA support for the Intel Many Integrated Core |
294 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
295 | run a 64 bit Linux OS. This driver will be used by both MIC | |
296 | host and card drivers. | |
ec8a1586 | 297 | |
3c216190 VK |
298 | If you are building host kernel with a MIC device or a card |
299 | kernel for a MIC device, then say M (recommended) or Y, else | |
300 | say N. If unsure say N. | |
301 | ||
302 | More information about the Intel MIC family as well as the Linux | |
303 | OS and tools for MIC to use with this driver are available from | |
304 | <http://software.intel.com/en-us/mic-developer>. | |
305 | ||
306 | config K3_DMA | |
307 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 308 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
309 | select DMA_ENGINE |
310 | select DMA_VIRTUAL_CHANNELS | |
311 | help | |
3c216190 VK |
312 | Support the DMA engine for Hisilicon K3 platform |
313 | devices. | |
ddeccb8d | 314 | |
3c216190 VK |
315 | config LPC18XX_DMAMUX |
316 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
317 | depends on ARCH_LPC18XX || COMPILE_TEST | |
318 | depends on OF && AMBA_PL08X | |
319 | select MFD_SYSCON | |
320 | help | |
321 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
322 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 323 | |
e7a3ff92 AD |
324 | config MCF_EDMA |
325 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
326 | depends on M5441x || COMPILE_TEST | |
327 | select DMA_ENGINE | |
328 | select DMA_VIRTUAL_CHANNELS | |
329 | help | |
330 | Support the Freescale ColdFire eDMA engine, 64-channel | |
331 | implementation that performs complex data transfers with | |
332 | minimal intervention from a host processor. | |
333 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
334 | ||
3c216190 VK |
335 | config MMP_PDMA |
336 | bool "MMP PDMA support" | |
cd3a792a | 337 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 338 | select DMA_ENGINE |
61f135b9 | 339 | help |
3c216190 | 340 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 341 | |
3c216190 VK |
342 | config MMP_TDMA |
343 | bool "MMP Two-Channel DMA support" | |
93d05f1e | 344 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 345 | select DMA_ENGINE |
93d05f1e | 346 | select MMP_SRAM if ARCH_MMP |
d6619761 | 347 | select GENERIC_ALLOCATOR |
8d318a50 | 348 | help |
3c216190 VK |
349 | Support the MMP Two-Channel DMA engine. |
350 | This engine used for MMP Audio DMA and pxa910 SQU. | |
351 | It needs sram driver under mach-mmp. | |
8d318a50 | 352 | |
3c216190 VK |
353 | config MOXART_DMA |
354 | tristate "MOXART DMA support" | |
355 | depends on ARCH_MOXART | |
12458ea0 | 356 | select DMA_ENGINE |
3c216190 | 357 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 358 | help |
3c216190 VK |
359 | Enable support for the MOXA ART SoC DMA controller. |
360 | ||
361 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 362 | |
3c216190 VK |
363 | config MPC512X_DMA |
364 | tristate "Freescale MPC512x built-in DMA engine support" | |
365 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 366 | select DMA_ENGINE |
3c216190 VK |
367 | ---help--- |
368 | Enable support for the Freescale MPC512x built-in DMA engine. | |
de5d4453 | 369 | |
3c216190 VK |
370 | config MV_XOR |
371 | bool "Marvell XOR engine support" | |
c39290a1 | 372 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 373 | select DMA_ENGINE |
3c216190 VK |
374 | select DMA_ENGINE_RAID |
375 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
376 | ---help--- | |
377 | Enable support for the Marvell XOR engine. | |
ca21a146 | 378 | |
19a340b1 TP |
379 | config MV_XOR_V2 |
380 | bool "Marvell XOR engine version 2 support " | |
381 | depends on ARM64 | |
382 | select DMA_ENGINE | |
383 | select DMA_ENGINE_RAID | |
384 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
385 | select GENERIC_MSI_IRQ_DOMAIN | |
386 | ---help--- | |
387 | Enable support for the Marvell version 2 XOR engine. | |
388 | ||
389 | This engine provides acceleration for copy, XOR and RAID6 | |
390 | operations, and is available on Marvell Armada 7K and 8K | |
391 | platforms. | |
392 | ||
3c216190 VK |
393 | config MXS_DMA |
394 | bool "MXS DMA support" | |
d762e4f3 | 395 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 396 | select STMP_DEVICE |
ca21a146 RY |
397 | select DMA_ENGINE |
398 | help | |
3c216190 | 399 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 400 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 401 | |
3c216190 VK |
402 | config MX3_IPU |
403 | bool "MX3x Image Processing Unit support" | |
404 | depends on ARCH_MXC | |
c2dde5f8 | 405 | select DMA_ENGINE |
3c216190 | 406 | default y |
c2dde5f8 | 407 | help |
3c216190 VK |
408 | If you plan to use the Image Processing unit in the i.MX3x, say |
409 | Y here. If unsure, select Y. | |
a074ae38 | 410 | |
3c216190 VK |
411 | config MX3_IPU_IRQS |
412 | int "Number of dynamically mapped interrupts for IPU" | |
413 | depends on MX3_IPU | |
414 | range 2 137 | |
415 | default 4 | |
416 | help | |
417 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
418 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
419 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 420 | |
3c216190 VK |
421 | config NBPFAXI_DMA |
422 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 423 | select DMA_ENGINE |
3c216190 | 424 | depends on ARM || COMPILE_TEST |
b3040e40 | 425 | help |
3c216190 | 426 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 427 | |
47e20577 MS |
428 | config OWL_DMA |
429 | tristate "Actions Semi Owl SoCs DMA support" | |
430 | depends on ARCH_ACTIONS | |
431 | select DMA_ENGINE | |
432 | select DMA_VIRTUAL_CHANNELS | |
433 | help | |
434 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
435 | ||
0c42bd0e | 436 | config PCH_DMA |
ca7fe2db | 437 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 438 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
439 | select DMA_ENGINE |
440 | help | |
2cdf2455 TM |
441 | Enable support for Intel EG20T PCH DMA engine. |
442 | ||
e79e72be | 443 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
444 | Output Hub), ML7213, ML7223 and ML7831. |
445 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
446 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
447 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
448 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 449 | |
3c216190 VK |
450 | config PL330_DMA |
451 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 452 | select DMA_ENGINE |
3c216190 | 453 | depends on ARM_AMBA |
1ec1e82f | 454 | help |
3c216190 VK |
455 | Select if your platform has one or more PL330 DMACs. |
456 | You need to provide platform specific settings via | |
457 | platform_data for a dma-pl330 device. | |
1ec1e82f | 458 | |
3c216190 VK |
459 | config PXA_DMA |
460 | bool "PXA DMA support" | |
461 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 462 | select DMA_ENGINE |
3c216190 | 463 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 464 | help |
3c216190 VK |
465 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
466 | platform. The internal DMA IP of all PXA variants is supported, with | |
467 | 16 to 32 channels for peripheral to memory or memory to memory | |
468 | transfers. | |
1f1846c6 | 469 | |
3c216190 VK |
470 | config SIRF_DMA |
471 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
472 | depends on ARCH_SIRF | |
a580b8c5 SG |
473 | select DMA_ENGINE |
474 | help | |
3c216190 | 475 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 476 | |
3c216190 VK |
477 | config STE_DMA40 |
478 | bool "ST-Ericsson DMA40 support" | |
479 | depends on ARCH_U8500 | |
760ee1c4 MW |
480 | select DMA_ENGINE |
481 | help | |
3c216190 | 482 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 483 | |
6b4cd727 PG |
484 | config ST_FDMA |
485 | tristate "ST FDMA dmaengine support" | |
486 | depends on ARCH_STI | |
3d6b3715 | 487 | depends on REMOTEPROC |
6b4cd727 PG |
488 | select ST_SLIM_REMOTEPROC |
489 | select DMA_ENGINE | |
490 | select DMA_VIRTUAL_CHANNELS | |
491 | help | |
492 | Enable support for ST FDMA controller. | |
493 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
494 | ||
495 | Say Y here if you have such a chipset. | |
496 | If unsure, say N. | |
497 | ||
d8b46839 CM |
498 | config STM32_DMA |
499 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 500 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 501 | select DMA_ENGINE |
d8b46839 CM |
502 | select DMA_VIRTUAL_CHANNELS |
503 | help | |
504 | Enable support for the on-chip DMA controller on STMicroelectronics | |
505 | STM32 MCUs. | |
ddf9bd40 | 506 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
507 | here. |
508 | ||
df7e762d PYM |
509 | config STM32_DMAMUX |
510 | bool "STMicroelectronics STM32 dma multiplexer support" | |
511 | depends on STM32_DMA || COMPILE_TEST | |
512 | help | |
513 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
514 | STM32 MCUs. | |
515 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
516 | here. | |
517 | ||
a4ffb13c PYM |
518 | config STM32_MDMA |
519 | bool "STMicroelectronics STM32 master dma support" | |
520 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 521 | depends on OF |
a4ffb13c | 522 | select DMA_ENGINE |
a4ffb13c PYM |
523 | select DMA_VIRTUAL_CHANNELS |
524 | help | |
525 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
526 | STM32 platforms. | |
527 | If you have a board based on STM32 SoC and wish to use the master DMA | |
528 | say Y here. | |
529 | ||
9b3b8171 BW |
530 | config SPRD_DMA |
531 | tristate "Spreadtrum DMA support" | |
532 | depends on ARCH_SPRD || COMPILE_TEST | |
533 | select DMA_ENGINE | |
534 | select DMA_VIRTUAL_CHANNELS | |
535 | help | |
536 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
537 | ||
3c216190 | 538 | config S3C24XX_DMAC |
9bdca822 | 539 | bool "Samsung S3C24XX DMA support" |
1609db6f | 540 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 541 | select DMA_ENGINE |
50437bff | 542 | select DMA_VIRTUAL_CHANNELS |
6365bead | 543 | help |
3c216190 VK |
544 | Support for the Samsung S3C24XX DMA controller driver. The |
545 | DMA controller is having multiple DMA channels which can be | |
546 | configured for different peripherals like audio, UART, SPI. | |
547 | The DMA controller can transfer data from memory to peripheral, | |
548 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 549 | |
3c216190 VK |
550 | config TXX9_DMAC |
551 | tristate "Toshiba TXx9 SoC DMA support" | |
552 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
553 | select DMA_ENGINE |
554 | help | |
3c216190 VK |
555 | Support the TXx9 SoC internal DMA controller. This can be |
556 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 557 | |
3c216190 VK |
558 | config TEGRA20_APB_DMA |
559 | bool "NVIDIA Tegra20 APB DMA support" | |
560 | depends on ARCH_TEGRA | |
7bedaa55 | 561 | select DMA_ENGINE |
3c216190 VK |
562 | help |
563 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
564 | DMA controller is having multiple DMA channel which can be | |
565 | configured for different peripherals like audio, UART, SPI, | |
566 | I2C etc which is in APB bus. | |
567 | This DMA controller transfers data from memory to peripheral fifo | |
568 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 569 | |
f46b1957 | 570 | config TEGRA210_ADMA |
3ed16793 | 571 | tristate "NVIDIA Tegra210 ADMA support" |
4cd16941 | 572 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK |
f46b1957 JH |
573 | select DMA_ENGINE |
574 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
575 | help |
576 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
577 | DMA controller has multiple DMA channels and is used to service | |
578 | various audio clients in the Tegra210 audio processing engine | |
579 | (APE). This DMA controller transfers data from memory to | |
580 | peripheral and vice versa. It does not support memory to | |
581 | memory data transfer. | |
582 | ||
3c216190 VK |
583 | config TIMB_DMA |
584 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 585 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 586 | select DMA_ENGINE |
3c216190 VK |
587 | help |
588 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 589 | |
32e74aab MY |
590 | config UNIPHIER_MDMAC |
591 | tristate "UniPhier MIO DMAC" | |
592 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
593 | depends on OF | |
594 | select DMA_ENGINE | |
595 | select DMA_VIRTUAL_CHANNELS | |
596 | help | |
597 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
598 | UniPhier platform. This DMA controller is used as the external | |
599 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
600 | ||
3c216190 VK |
601 | config XGENE_DMA |
602 | tristate "APM X-Gene DMA support" | |
603 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 604 | select DMA_ENGINE |
3c216190 VK |
605 | select DMA_ENGINE_RAID |
606 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 607 | help |
3c216190 | 608 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 609 | |
fde57a7c KA |
610 | config XILINX_DMA |
611 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 612 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
613 | select DMA_ENGINE |
614 | help | |
615 | Enable support for Xilinx AXI VDMA Soft IP. | |
616 | ||
fde57a7c | 617 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
618 | between memory and AXI4-Stream video type target |
619 | peripherals including peripherals which support AXI4- | |
620 | Stream Video Protocol. It has two stream interfaces/ | |
621 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
622 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
623 | AXI CDMA engine provides high-bandwidth direct memory access |
624 | between a memory-mapped source address and a memory-mapped | |
625 | destination address. | |
626 | AXI DMA engine provides high-bandwidth one dimensional direct | |
627 | memory access between memory and AXI4-Stream target peripherals. | |
9cd4360d | 628 | |
b0cc417c KA |
629 | config XILINX_ZYNQMP_DMA |
630 | tristate "Xilinx ZynqMP DMA Engine" | |
631 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
632 | select DMA_ENGINE | |
633 | help | |
634 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 635 | |
e3fa9841 | 636 | config ZX_DMA |
253f9f44 | 637 | tristate "ZTE ZX DMA support" |
854d4bd2 | 638 | depends on ARCH_ZX || COMPILE_TEST |
5689ba7f AB |
639 | select DMA_ENGINE |
640 | select DMA_VIRTUAL_CHANNELS | |
641 | help | |
253f9f44 | 642 | Support the DMA engine for ZTE ZX family platform devices. |
5689ba7f | 643 | |
9f2fd0df | 644 | |
3c216190 VK |
645 | # driver files |
646 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 647 | |
548c4597 SW |
648 | source "drivers/dma/mediatek/Kconfig" |
649 | ||
d9b31efc SK |
650 | source "drivers/dma/qcom/Kconfig" |
651 | ||
3c216190 | 652 | source "drivers/dma/dw/Kconfig" |
50437bff | 653 | |
3c216190 | 654 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 655 | |
3c216190 | 656 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 657 | |
d88b1397 PU |
658 | source "drivers/dma/ti/Kconfig" |
659 | ||
3c216190 | 660 | # clients |
db217334 | 661 | comment "DMA Clients" |
2ed6dc34 | 662 | depends on DMA_ENGINE |
db217334 | 663 | |
729b5d1b DW |
664 | config ASYNC_TX_DMA |
665 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 666 | depends on DMA_ENGINE |
729b5d1b DW |
667 | help |
668 | This allows the async_tx api to take advantage of offload engines for | |
669 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
670 | a dma engine that can perform raid operations and you have enabled | |
671 | MD_RAID456 say Y. | |
672 | ||
673 | If unsure, say N. | |
674 | ||
4a776f0a HS |
675 | config DMATEST |
676 | tristate "DMA Test client" | |
677 | depends on DMA_ENGINE | |
58532e66 | 678 | select DMA_ENGINE_RAID |
4a776f0a HS |
679 | help |
680 | Simple DMA test client. Say N unless you're debugging a | |
681 | DMA Device driver. | |
682 | ||
3cc377b9 DW |
683 | config DMA_ENGINE_RAID |
684 | bool | |
685 | ||
2ed6dc34 | 686 | endif |