Commit | Line | Data |
---|---|---|
c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
3c216190 VK |
36 | #core |
37 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
38 | bool | |
95b4ecbf | 39 | |
3c216190 VK |
40 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
41 | bool | |
95b4ecbf | 42 | |
3c216190 | 43 | config DMA_ENGINE |
138f4c35 DW |
44 | bool |
45 | ||
3c216190 VK |
46 | config DMA_VIRTUAL_CHANNELS |
47 | tristate | |
48 | ||
49 | config DMA_ACPI | |
50 | def_bool y | |
51 | depends on ACPI | |
52 | ||
53 | config DMA_OF | |
54 | def_bool y | |
55 | depends on OF | |
56 | select DMA_ENGINE | |
57 | ||
58 | #devices | |
a85c6f1b SR |
59 | config ALTERA_MSGDMA |
60 | tristate "Altera / Intel mSGDMA Engine" | |
61 | select DMA_ENGINE | |
62 | help | |
63 | Enable support for Altera / Intel mSGDMA controller. | |
64 | ||
e8689e63 LW |
65 | config AMBA_PL08X |
66 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 67 | depends on ARM_AMBA |
e8689e63 | 68 | select DMA_ENGINE |
083be28a | 69 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 70 | help |
1e1cfc72 LW |
71 | Say yes if your platform has a PL08x DMAC device which can |
72 | provide DMA engine support. This includes the original ARM | |
73 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
74 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 75 | |
3c216190 VK |
76 | config AMCC_PPC440SPE_ADMA |
77 | tristate "AMCC PPC440SPe ADMA support" | |
78 | depends on 440SPe || 440SP | |
2ed6dc34 | 79 | select DMA_ENGINE |
3cc377b9 | 80 | select DMA_ENGINE_RAID |
3c216190 | 81 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 82 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 83 | help |
3c216190 | 84 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 85 | |
dc78baa2 NF |
86 | config AT_HDMAC |
87 | tristate "Atmel AHB DMA support" | |
f898fed0 | 88 | depends on ARCH_AT91 |
dc78baa2 NF |
89 | select DMA_ENGINE |
90 | help | |
f898fed0 | 91 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 92 | |
e1f7c9ee LD |
93 | config AT_XDMAC |
94 | tristate "Atmel XDMA support" | |
6e5ae29b | 95 | depends on ARCH_AT91 |
e1f7c9ee LD |
96 | select DMA_ENGINE |
97 | help | |
98 | Support the Atmel XDMA controller. | |
2ed6dc34 | 99 | |
3c216190 VK |
100 | config AXI_DMAC |
101 | tristate "Analog Devices AXI-DMAC DMA support" | |
102 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST | |
2ed6dc34 | 103 | select DMA_ENGINE |
3c216190 | 104 | select DMA_VIRTUAL_CHANNELS |
2ed6dc34 | 105 | help |
3c216190 VK |
106 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
107 | controller is often used in Analog Device's reference designs for FPGA | |
108 | platforms. | |
c13c8260 | 109 | |
743e1c8f AP |
110 | config BCM_SBA_RAID |
111 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
112 | depends on ARM64 || COMPILE_TEST |
113 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
114 | select DMA_ENGINE |
115 | select DMA_ENGINE_RAID | |
116 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
117 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 118 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
119 | help |
120 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
121 | engine is available on most of the Broadcom iProc SoCs. It | |
122 | has the capability to offload memcpy, xor and pq computation | |
123 | for raid5/6. | |
124 | ||
3c216190 VK |
125 | config COH901318 |
126 | bool "ST-Ericsson COH901318 DMA support" | |
127 | select DMA_ENGINE | |
6e450376 | 128 | depends on ARCH_U300 || COMPILE_TEST |
3c216190 VK |
129 | help |
130 | Enable support for ST-Ericsson COH 901 318 DMA. | |
131 | ||
132 | config DMA_BCM2835 | |
133 | tristate "BCM2835 DMA engine support" | |
134 | depends on ARCH_BCM2835 | |
135 | select DMA_ENGINE | |
136 | select DMA_VIRTUAL_CHANNELS | |
137 | ||
138 | config DMA_JZ4740 | |
139 | tristate "JZ4740 DMA support" | |
d78d6c07 | 140 | depends on MACH_JZ4740 || COMPILE_TEST |
3c216190 VK |
141 | select DMA_ENGINE |
142 | select DMA_VIRTUAL_CHANNELS | |
143 | ||
144 | config DMA_JZ4780 | |
145 | tristate "JZ4780 DMA support" | |
a952b287 | 146 | depends on MACH_JZ4780 || COMPILE_TEST |
667dfed9 AS |
147 | select DMA_ENGINE |
148 | select DMA_VIRTUAL_CHANNELS | |
149 | help | |
3c216190 VK |
150 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
151 | If you have a board based on such a SoC and wish to use DMA for | |
152 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 153 | |
3c216190 VK |
154 | config DMA_OMAP |
155 | tristate "OMAP DMA support" | |
54ff7a2d | 156 | depends on ARCH_OMAP || COMPILE_TEST |
3c216190 VK |
157 | select DMA_ENGINE |
158 | select DMA_VIRTUAL_CHANNELS | |
509cf0b8 | 159 | select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) |
d5ea7b5e | 160 | |
3c216190 VK |
161 | config DMA_SA11X0 |
162 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 163 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 164 | select DMA_ENGINE |
3c216190 | 165 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 166 | help |
3c216190 VK |
167 | Support the DMA engine found on Intel StrongARM SA-1100 and |
168 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
169 | devices. | |
dc78baa2 | 170 | |
3c216190 VK |
171 | config DMA_SUN4I |
172 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 173 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 174 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 175 | select DMA_ENGINE |
3c216190 | 176 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 177 | help |
3c216190 VK |
178 | Enable support for the DMA controller present in the sun4i, |
179 | sun5i and sun7i Allwinner ARM SoCs. | |
180 | ||
181 | config DMA_SUN6I | |
182 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 183 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
184 | depends on RESET_CONTROLLER |
185 | select DMA_ENGINE | |
186 | select DMA_VIRTUAL_CHANNELS | |
187 | help | |
188 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
189 | ||
1fe20f1b EP |
190 | config DW_AXI_DMAC |
191 | tristate "Synopsys DesignWare AXI DMA support" | |
192 | depends on OF || COMPILE_TEST | |
193 | select DMA_ENGINE | |
194 | select DMA_VIRTUAL_CHANNELS | |
195 | help | |
196 | Enable support for Synopsys DesignWare AXI DMA controller. | |
197 | NOTE: This driver wasn't tested on 64 bit platform because | |
198 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
199 | ||
3c216190 VK |
200 | config EP93XX_DMA |
201 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 202 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
203 | select DMA_ENGINE |
204 | help | |
205 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 206 | |
173acc7c | 207 | config FSL_DMA |
8de7a7d9 | 208 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 209 | depends on FSL_SOC |
173acc7c | 210 | select DMA_ENGINE |
5fc6d897 | 211 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 212 | ---help--- |
8de7a7d9 HZ |
213 | Enable support for the Freescale Elo series DMA controllers. |
214 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
215 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
216 | some Txxx and Bxxx parts. | |
173acc7c | 217 | |
3c216190 VK |
218 | config FSL_EDMA |
219 | tristate "Freescale eDMA engine support" | |
220 | depends on OF | |
221 | select DMA_ENGINE | |
222 | select DMA_VIRTUAL_CHANNELS | |
223 | help | |
224 | Support the Freescale eDMA engine with programmable channel | |
225 | multiplexing capability for DMA request sources(slot). | |
226 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
227 | ||
ad80da65 XS |
228 | config FSL_RAID |
229 | tristate "Freescale RAID engine Support" | |
230 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
231 | select DMA_ENGINE | |
232 | select DMA_ENGINE_RAID | |
233 | ---help--- | |
234 | Enable support for Freescale RAID Engine. RAID Engine is | |
235 | available on some QorIQ SoCs (like P5020/P5040). It has | |
236 | the capability to offload memcpy, xor and pq computation | |
237 | for raid5/6. | |
238 | ||
3c216190 VK |
239 | config IMG_MDC_DMA |
240 | tristate "IMG MDC support" | |
241 | depends on MIPS || COMPILE_TEST | |
242 | depends on MFD_SYSCON | |
0fb6f739 | 243 | select DMA_ENGINE |
3c216190 VK |
244 | select DMA_VIRTUAL_CHANNELS |
245 | help | |
246 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 247 | |
3c216190 VK |
248 | config IMX_DMA |
249 | tristate "i.MX DMA support" | |
8e2d41f8 | 250 | depends on ARCH_MXC |
ff7b0479 | 251 | select DMA_ENGINE |
5296b56d | 252 | help |
3c216190 VK |
253 | Support the i.MX DMA engine. This engine is integrated into |
254 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 255 | |
3c216190 VK |
256 | config IMX_SDMA |
257 | tristate "i.MX SDMA support" | |
8e2d41f8 | 258 | depends on ARCH_MXC |
5296b56d | 259 | select DMA_ENGINE |
5296b56d | 260 | help |
3c216190 VK |
261 | Support the i.MX SDMA engine. This engine is integrated into |
262 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 263 | |
9ab8b4e7 | 264 | config INTEL_IDMA64 |
35271227 LT |
265 | tristate "Intel integrated DMA 64-bit support" |
266 | select DMA_ENGINE | |
267 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 268 | help |
35271227 LT |
269 | Enable DMA support for Intel Low Power Subsystem such as found on |
270 | Intel Skylake PCH. | |
5296b56d | 271 | |
3c216190 VK |
272 | config INTEL_IOATDMA |
273 | tristate "Intel I/OAT DMA support" | |
274 | depends on PCI && X86_64 | |
a57e16cf | 275 | select DMA_ENGINE |
3c216190 VK |
276 | select DMA_ENGINE_RAID |
277 | select DCA | |
a57e16cf | 278 | help |
3c216190 VK |
279 | Enable support for the Intel(R) I/OAT DMA engine present |
280 | in recent Intel Xeon chipsets. | |
a57e16cf | 281 | |
3c216190 VK |
282 | Say Y here if you have such a chipset. |
283 | ||
284 | If unsure, say N. | |
285 | ||
286 | config INTEL_IOP_ADMA | |
287 | tristate "Intel IOP ADMA support" | |
288 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
ea76f0b3 | 289 | select DMA_ENGINE |
3c216190 | 290 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 291 | help |
3c216190 | 292 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 293 | |
3c216190 VK |
294 | config INTEL_MIC_X100_DMA |
295 | tristate "Intel MIC X100 DMA Driver" | |
296 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ec8a1586 LD |
297 | select DMA_ENGINE |
298 | help | |
3c216190 VK |
299 | This enables DMA support for the Intel Many Integrated Core |
300 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
301 | run a 64 bit Linux OS. This driver will be used by both MIC | |
302 | host and card drivers. | |
ec8a1586 | 303 | |
3c216190 VK |
304 | If you are building host kernel with a MIC device or a card |
305 | kernel for a MIC device, then say M (recommended) or Y, else | |
306 | say N. If unsure say N. | |
307 | ||
308 | More information about the Intel MIC family as well as the Linux | |
309 | OS and tools for MIC to use with this driver are available from | |
310 | <http://software.intel.com/en-us/mic-developer>. | |
311 | ||
312 | config K3_DMA | |
313 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 314 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
315 | select DMA_ENGINE |
316 | select DMA_VIRTUAL_CHANNELS | |
317 | help | |
3c216190 VK |
318 | Support the DMA engine for Hisilicon K3 platform |
319 | devices. | |
ddeccb8d | 320 | |
3c216190 VK |
321 | config LPC18XX_DMAMUX |
322 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
323 | depends on ARCH_LPC18XX || COMPILE_TEST | |
324 | depends on OF && AMBA_PL08X | |
325 | select MFD_SYSCON | |
326 | help | |
327 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
328 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 329 | |
3c216190 VK |
330 | config MMP_PDMA |
331 | bool "MMP PDMA support" | |
cd3a792a | 332 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 333 | select DMA_ENGINE |
61f135b9 | 334 | help |
3c216190 | 335 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 336 | |
3c216190 VK |
337 | config MMP_TDMA |
338 | bool "MMP Two-Channel DMA support" | |
93d05f1e | 339 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 340 | select DMA_ENGINE |
93d05f1e | 341 | select MMP_SRAM if ARCH_MMP |
d6619761 | 342 | select GENERIC_ALLOCATOR |
8d318a50 | 343 | help |
3c216190 VK |
344 | Support the MMP Two-Channel DMA engine. |
345 | This engine used for MMP Audio DMA and pxa910 SQU. | |
346 | It needs sram driver under mach-mmp. | |
8d318a50 | 347 | |
3c216190 VK |
348 | config MOXART_DMA |
349 | tristate "MOXART DMA support" | |
350 | depends on ARCH_MOXART | |
12458ea0 | 351 | select DMA_ENGINE |
3c216190 | 352 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 353 | help |
3c216190 VK |
354 | Enable support for the MOXA ART SoC DMA controller. |
355 | ||
356 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 357 | |
3c216190 VK |
358 | config MPC512X_DMA |
359 | tristate "Freescale MPC512x built-in DMA engine support" | |
360 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 361 | select DMA_ENGINE |
3c216190 VK |
362 | ---help--- |
363 | Enable support for the Freescale MPC512x built-in DMA engine. | |
de5d4453 | 364 | |
3c216190 VK |
365 | config MV_XOR |
366 | bool "Marvell XOR engine support" | |
c39290a1 | 367 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 368 | select DMA_ENGINE |
3c216190 VK |
369 | select DMA_ENGINE_RAID |
370 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
371 | ---help--- | |
372 | Enable support for the Marvell XOR engine. | |
ca21a146 | 373 | |
19a340b1 TP |
374 | config MV_XOR_V2 |
375 | bool "Marvell XOR engine version 2 support " | |
376 | depends on ARM64 | |
377 | select DMA_ENGINE | |
378 | select DMA_ENGINE_RAID | |
379 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
380 | select GENERIC_MSI_IRQ_DOMAIN | |
381 | ---help--- | |
382 | Enable support for the Marvell version 2 XOR engine. | |
383 | ||
384 | This engine provides acceleration for copy, XOR and RAID6 | |
385 | operations, and is available on Marvell Armada 7K and 8K | |
386 | platforms. | |
387 | ||
3c216190 VK |
388 | config MXS_DMA |
389 | bool "MXS DMA support" | |
d762e4f3 | 390 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 391 | select STMP_DEVICE |
ca21a146 RY |
392 | select DMA_ENGINE |
393 | help | |
3c216190 | 394 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 395 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 396 | |
3c216190 VK |
397 | config MX3_IPU |
398 | bool "MX3x Image Processing Unit support" | |
399 | depends on ARCH_MXC | |
c2dde5f8 | 400 | select DMA_ENGINE |
3c216190 | 401 | default y |
c2dde5f8 | 402 | help |
3c216190 VK |
403 | If you plan to use the Image Processing unit in the i.MX3x, say |
404 | Y here. If unsure, select Y. | |
a074ae38 | 405 | |
3c216190 VK |
406 | config MX3_IPU_IRQS |
407 | int "Number of dynamically mapped interrupts for IPU" | |
408 | depends on MX3_IPU | |
409 | range 2 137 | |
410 | default 4 | |
411 | help | |
412 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
413 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
414 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 415 | |
3c216190 VK |
416 | config NBPFAXI_DMA |
417 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 418 | select DMA_ENGINE |
3c216190 | 419 | depends on ARM || COMPILE_TEST |
b3040e40 | 420 | help |
3c216190 | 421 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 422 | |
0c42bd0e | 423 | config PCH_DMA |
ca7fe2db | 424 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 425 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
426 | select DMA_ENGINE |
427 | help | |
2cdf2455 TM |
428 | Enable support for Intel EG20T PCH DMA engine. |
429 | ||
e79e72be | 430 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
431 | Output Hub), ML7213, ML7223 and ML7831. |
432 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
433 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
434 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
435 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 436 | |
3c216190 VK |
437 | config PL330_DMA |
438 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 439 | select DMA_ENGINE |
3c216190 | 440 | depends on ARM_AMBA |
1ec1e82f | 441 | help |
3c216190 VK |
442 | Select if your platform has one or more PL330 DMACs. |
443 | You need to provide platform specific settings via | |
444 | platform_data for a dma-pl330 device. | |
1ec1e82f | 445 | |
3c216190 VK |
446 | config PXA_DMA |
447 | bool "PXA DMA support" | |
448 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 449 | select DMA_ENGINE |
3c216190 | 450 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 451 | help |
3c216190 VK |
452 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
453 | platform. The internal DMA IP of all PXA variants is supported, with | |
454 | 16 to 32 channels for peripheral to memory or memory to memory | |
455 | transfers. | |
1f1846c6 | 456 | |
3c216190 VK |
457 | config SIRF_DMA |
458 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
459 | depends on ARCH_SIRF | |
a580b8c5 SG |
460 | select DMA_ENGINE |
461 | help | |
3c216190 | 462 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 463 | |
3c216190 VK |
464 | config STE_DMA40 |
465 | bool "ST-Ericsson DMA40 support" | |
466 | depends on ARCH_U8500 | |
760ee1c4 MW |
467 | select DMA_ENGINE |
468 | help | |
3c216190 | 469 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 470 | |
6b4cd727 PG |
471 | config ST_FDMA |
472 | tristate "ST FDMA dmaengine support" | |
473 | depends on ARCH_STI | |
3d6b3715 | 474 | depends on REMOTEPROC |
6b4cd727 PG |
475 | select ST_SLIM_REMOTEPROC |
476 | select DMA_ENGINE | |
477 | select DMA_VIRTUAL_CHANNELS | |
478 | help | |
479 | Enable support for ST FDMA controller. | |
480 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
481 | ||
482 | Say Y here if you have such a chipset. | |
483 | If unsure, say N. | |
484 | ||
d8b46839 CM |
485 | config STM32_DMA |
486 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 487 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 488 | select DMA_ENGINE |
d8b46839 CM |
489 | select DMA_VIRTUAL_CHANNELS |
490 | help | |
491 | Enable support for the on-chip DMA controller on STMicroelectronics | |
492 | STM32 MCUs. | |
ddf9bd40 | 493 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
494 | here. |
495 | ||
df7e762d PYM |
496 | config STM32_DMAMUX |
497 | bool "STMicroelectronics STM32 dma multiplexer support" | |
498 | depends on STM32_DMA || COMPILE_TEST | |
499 | help | |
500 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
501 | STM32 MCUs. | |
502 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
503 | here. | |
504 | ||
a4ffb13c PYM |
505 | config STM32_MDMA |
506 | bool "STMicroelectronics STM32 master dma support" | |
507 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 508 | depends on OF |
a4ffb13c | 509 | select DMA_ENGINE |
a4ffb13c PYM |
510 | select DMA_VIRTUAL_CHANNELS |
511 | help | |
512 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
513 | STM32 platforms. | |
514 | If you have a board based on STM32 SoC and wish to use the master DMA | |
515 | say Y here. | |
516 | ||
9b3b8171 BW |
517 | config SPRD_DMA |
518 | tristate "Spreadtrum DMA support" | |
519 | depends on ARCH_SPRD || COMPILE_TEST | |
520 | select DMA_ENGINE | |
521 | select DMA_VIRTUAL_CHANNELS | |
522 | help | |
523 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
524 | ||
3c216190 | 525 | config S3C24XX_DMAC |
9bdca822 | 526 | bool "Samsung S3C24XX DMA support" |
1609db6f | 527 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 528 | select DMA_ENGINE |
50437bff | 529 | select DMA_VIRTUAL_CHANNELS |
6365bead | 530 | help |
3c216190 VK |
531 | Support for the Samsung S3C24XX DMA controller driver. The |
532 | DMA controller is having multiple DMA channels which can be | |
533 | configured for different peripherals like audio, UART, SPI. | |
534 | The DMA controller can transfer data from memory to peripheral, | |
535 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 536 | |
3c216190 VK |
537 | config TXX9_DMAC |
538 | tristate "Toshiba TXx9 SoC DMA support" | |
539 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
540 | select DMA_ENGINE |
541 | help | |
3c216190 VK |
542 | Support the TXx9 SoC internal DMA controller. This can be |
543 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 544 | |
3c216190 VK |
545 | config TEGRA20_APB_DMA |
546 | bool "NVIDIA Tegra20 APB DMA support" | |
547 | depends on ARCH_TEGRA | |
7bedaa55 | 548 | select DMA_ENGINE |
3c216190 VK |
549 | help |
550 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
551 | DMA controller is having multiple DMA channel which can be | |
552 | configured for different peripherals like audio, UART, SPI, | |
553 | I2C etc which is in APB bus. | |
554 | This DMA controller transfers data from memory to peripheral fifo | |
555 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 556 | |
f46b1957 | 557 | config TEGRA210_ADMA |
3ed16793 | 558 | tristate "NVIDIA Tegra210 ADMA support" |
4cd16941 | 559 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK |
f46b1957 JH |
560 | select DMA_ENGINE |
561 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
562 | help |
563 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
564 | DMA controller has multiple DMA channels and is used to service | |
565 | various audio clients in the Tegra210 audio processing engine | |
566 | (APE). This DMA controller transfers data from memory to | |
567 | peripheral and vice versa. It does not support memory to | |
568 | memory data transfer. | |
569 | ||
3c216190 VK |
570 | config TIMB_DMA |
571 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 572 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 573 | select DMA_ENGINE |
3c216190 VK |
574 | help |
575 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 576 | |
9b3452d1 | 577 | config TI_CPPI41 |
e3fa49ac AB |
578 | tristate "CPPI 4.1 DMA support" |
579 | depends on (ARCH_OMAP || ARCH_DAVINCI_DA8XX) | |
9b3452d1 SAS |
580 | select DMA_ENGINE |
581 | help | |
582 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
e3fa49ac | 583 | is currently used by the USB driver on AM335x and DA8xx platforms. |
9b3452d1 | 584 | |
3c216190 VK |
585 | config TI_DMA_CROSSBAR |
586 | bool | |
d894fc60 | 587 | |
3c216190 VK |
588 | config TI_EDMA |
589 | bool "TI EDMA support" | |
c5df3572 | 590 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST |
8e6152bc ZG |
591 | select DMA_ENGINE |
592 | select DMA_VIRTUAL_CHANNELS | |
509cf0b8 | 593 | select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) |
3c216190 | 594 | default n |
8e6152bc | 595 | help |
3c216190 VK |
596 | Enable support for the TI EDMA controller. This DMA |
597 | engine is found on TI DaVinci and AM33xx parts. | |
8e6152bc | 598 | |
3c216190 VK |
599 | config XGENE_DMA |
600 | tristate "APM X-Gene DMA support" | |
601 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 602 | select DMA_ENGINE |
3c216190 VK |
603 | select DMA_ENGINE_RAID |
604 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 605 | help |
3c216190 | 606 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 607 | |
fde57a7c KA |
608 | config XILINX_DMA |
609 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 610 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
611 | select DMA_ENGINE |
612 | help | |
613 | Enable support for Xilinx AXI VDMA Soft IP. | |
614 | ||
fde57a7c | 615 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
616 | between memory and AXI4-Stream video type target |
617 | peripherals including peripherals which support AXI4- | |
618 | Stream Video Protocol. It has two stream interfaces/ | |
619 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
620 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
621 | AXI CDMA engine provides high-bandwidth direct memory access |
622 | between a memory-mapped source address and a memory-mapped | |
623 | destination address. | |
624 | AXI DMA engine provides high-bandwidth one dimensional direct | |
625 | memory access between memory and AXI4-Stream target peripherals. | |
9cd4360d | 626 | |
b0cc417c KA |
627 | config XILINX_ZYNQMP_DMA |
628 | tristate "Xilinx ZynqMP DMA Engine" | |
629 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
630 | select DMA_ENGINE | |
631 | help | |
632 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 633 | |
e3fa9841 | 634 | config ZX_DMA |
253f9f44 | 635 | tristate "ZTE ZX DMA support" |
854d4bd2 | 636 | depends on ARCH_ZX || COMPILE_TEST |
5689ba7f AB |
637 | select DMA_ENGINE |
638 | select DMA_VIRTUAL_CHANNELS | |
639 | help | |
253f9f44 | 640 | Support the DMA engine for ZTE ZX family platform devices. |
5689ba7f | 641 | |
9f2fd0df | 642 | |
3c216190 VK |
643 | # driver files |
644 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 645 | |
548c4597 SW |
646 | source "drivers/dma/mediatek/Kconfig" |
647 | ||
d9b31efc SK |
648 | source "drivers/dma/qcom/Kconfig" |
649 | ||
3c216190 | 650 | source "drivers/dma/dw/Kconfig" |
50437bff | 651 | |
3c216190 | 652 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 653 | |
3c216190 | 654 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 655 | |
3c216190 | 656 | # clients |
db217334 | 657 | comment "DMA Clients" |
2ed6dc34 | 658 | depends on DMA_ENGINE |
db217334 | 659 | |
729b5d1b DW |
660 | config ASYNC_TX_DMA |
661 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 662 | depends on DMA_ENGINE |
729b5d1b DW |
663 | help |
664 | This allows the async_tx api to take advantage of offload engines for | |
665 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
666 | a dma engine that can perform raid operations and you have enabled | |
667 | MD_RAID456 say Y. | |
668 | ||
669 | If unsure, say N. | |
670 | ||
4a776f0a HS |
671 | config DMATEST |
672 | tristate "DMA Test client" | |
673 | depends on DMA_ENGINE | |
58532e66 | 674 | select DMA_ENGINE_RAID |
4a776f0a HS |
675 | help |
676 | Simple DMA test client. Say N unless you're debugging a | |
677 | DMA Device driver. | |
678 | ||
3cc377b9 DW |
679 | config DMA_ENGINE_RAID |
680 | bool | |
681 | ||
2ed6dc34 | 682 | endif |