Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 | 17 | config DMADEVICES_DEBUG |
67805a4b KK |
18 | bool "DMA Engine debugging" |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
6c664a89 LW |
23 | |
24 | config DMADEVICES_VDEBUG | |
67805a4b KK |
25 | bool "DMA Engine verbose debugging" |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
6c664a89 LW |
31 | |
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
62 | select DMA_ENGINE | |
63 | help | |
64 | Enable support for Altera / Intel mSGDMA controller. | |
65 | ||
e8689e63 LW |
66 | config AMBA_PL08X |
67 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 68 | depends on ARM_AMBA |
e8689e63 | 69 | select DMA_ENGINE |
083be28a | 70 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 71 | help |
1e1cfc72 LW |
72 | Say yes if your platform has a PL08x DMAC device which can |
73 | provide DMA engine support. This includes the original ARM | |
74 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
75 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 76 | |
3c216190 VK |
77 | config AMCC_PPC440SPE_ADMA |
78 | tristate "AMCC PPC440SPe ADMA support" | |
79 | depends on 440SPe || 440SP | |
2ed6dc34 | 80 | select DMA_ENGINE |
3cc377b9 | 81 | select DMA_ENGINE_RAID |
3c216190 | 82 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 83 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 84 | help |
3c216190 | 85 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 86 | |
dc78baa2 NF |
87 | config AT_HDMAC |
88 | tristate "Atmel AHB DMA support" | |
f898fed0 | 89 | depends on ARCH_AT91 |
dc78baa2 NF |
90 | select DMA_ENGINE |
91 | help | |
f898fed0 | 92 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 93 | |
e1f7c9ee LD |
94 | config AT_XDMAC |
95 | tristate "Atmel XDMA support" | |
6e5ae29b | 96 | depends on ARCH_AT91 |
e1f7c9ee LD |
97 | select DMA_ENGINE |
98 | help | |
99 | Support the Atmel XDMA controller. | |
2ed6dc34 | 100 | |
3c216190 VK |
101 | config AXI_DMAC |
102 | tristate "Analog Devices AXI-DMAC DMA support" | |
5c038872 | 103 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 104 | select DMA_ENGINE |
3c216190 | 105 | select DMA_VIRTUAL_CHANNELS |
fc15be39 | 106 | select REGMAP_MMIO |
2ed6dc34 | 107 | help |
3c216190 | 108 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
2fea2906 | 109 | controller is often used in Analog Devices' reference designs for FPGA |
3c216190 | 110 | platforms. |
c13c8260 | 111 | |
743e1c8f AP |
112 | config BCM_SBA_RAID |
113 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
114 | depends on ARM64 || COMPILE_TEST |
115 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
116 | select DMA_ENGINE |
117 | select DMA_ENGINE_RAID | |
118 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
119 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 120 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
121 | help |
122 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
123 | engine is available on most of the Broadcom iProc SoCs. It | |
124 | has the capability to offload memcpy, xor and pq computation | |
125 | for raid5/6. | |
126 | ||
3c216190 VK |
127 | config DMA_BCM2835 |
128 | tristate "BCM2835 DMA engine support" | |
129 | depends on ARCH_BCM2835 | |
130 | select DMA_ENGINE | |
131 | select DMA_VIRTUAL_CHANNELS | |
132 | ||
3c216190 VK |
133 | config DMA_JZ4780 |
134 | tristate "JZ4780 DMA support" | |
c558ecd2 | 135 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
136 | select DMA_ENGINE |
137 | select DMA_VIRTUAL_CHANNELS | |
138 | help | |
3c216190 VK |
139 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
140 | If you have a board based on such a SoC and wish to use DMA for | |
141 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 142 | |
3c216190 VK |
143 | config DMA_SA11X0 |
144 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 145 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 146 | select DMA_ENGINE |
3c216190 | 147 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 148 | help |
3c216190 VK |
149 | Support the DMA engine found on Intel StrongARM SA-1100 and |
150 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
151 | devices. | |
dc78baa2 | 152 | |
3c216190 VK |
153 | config DMA_SUN4I |
154 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 155 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 156 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 157 | select DMA_ENGINE |
3c216190 | 158 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 159 | help |
3c216190 VK |
160 | Enable support for the DMA controller present in the sun4i, |
161 | sun5i and sun7i Allwinner ARM SoCs. | |
162 | ||
163 | config DMA_SUN6I | |
164 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 165 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
166 | depends on RESET_CONTROLLER |
167 | select DMA_ENGINE | |
168 | select DMA_VIRTUAL_CHANNELS | |
169 | help | |
170 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
171 | ||
1fe20f1b EP |
172 | config DW_AXI_DMAC |
173 | tristate "Synopsys DesignWare AXI DMA support" | |
174 | depends on OF || COMPILE_TEST | |
cd0f00c3 | 175 | depends on HAS_IOMEM |
1fe20f1b EP |
176 | select DMA_ENGINE |
177 | select DMA_VIRTUAL_CHANNELS | |
178 | help | |
179 | Enable support for Synopsys DesignWare AXI DMA controller. | |
180 | NOTE: This driver wasn't tested on 64 bit platform because | |
181 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
182 | ||
3c216190 VK |
183 | config EP93XX_DMA |
184 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 185 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
186 | select DMA_ENGINE |
187 | help | |
188 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 189 | |
173acc7c | 190 | config FSL_DMA |
8de7a7d9 | 191 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 192 | depends on FSL_SOC |
173acc7c | 193 | select DMA_ENGINE |
5fc6d897 | 194 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
a7f7f624 | 195 | help |
8de7a7d9 HZ |
196 | Enable support for the Freescale Elo series DMA controllers. |
197 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
198 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
199 | some Txxx and Bxxx parts. | |
173acc7c | 200 | |
3c216190 VK |
201 | config FSL_EDMA |
202 | tristate "Freescale eDMA engine support" | |
203 | depends on OF | |
204 | select DMA_ENGINE | |
205 | select DMA_VIRTUAL_CHANNELS | |
206 | help | |
207 | Support the Freescale eDMA engine with programmable channel | |
208 | multiplexing capability for DMA request sources(slot). | |
209 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
210 | ||
b092529e | 211 | config FSL_QDMA |
67805a4b KK |
212 | tristate "NXP Layerscape qDMA engine support" |
213 | depends on ARM || ARM64 | |
214 | select DMA_ENGINE | |
215 | select DMA_VIRTUAL_CHANNELS | |
216 | select DMA_ENGINE_RAID | |
217 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
218 | help | |
219 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
220 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
221 | or dequeuing DMA jobs from, different work queues. | |
222 | This module can be found on NXP Layerscape SoCs. | |
b092529e PM |
223 | The qdma driver only work on SoCs with a DPAA hardware block. |
224 | ||
ad80da65 | 225 | config FSL_RAID |
67805a4b KK |
226 | tristate "Freescale RAID engine Support" |
227 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
228 | select DMA_ENGINE | |
229 | select DMA_ENGINE_RAID | |
a7f7f624 | 230 | help |
67805a4b KK |
231 | Enable support for Freescale RAID Engine. RAID Engine is |
232 | available on some QorIQ SoCs (like P5020/P5040). It has | |
233 | the capability to offload memcpy, xor and pq computation | |
ad80da65 XS |
234 | for raid5/6. |
235 | ||
e9f08b65 ZW |
236 | config HISI_DMA |
237 | tristate "HiSilicon DMA Engine support" | |
ae148b43 Y |
238 | depends on ARM64 || COMPILE_TEST |
239 | depends on PCI_MSI | |
e9f08b65 ZW |
240 | select DMA_ENGINE |
241 | select DMA_VIRTUAL_CHANNELS | |
242 | help | |
243 | Support HiSilicon Kunpeng DMA engine. | |
244 | ||
3c216190 VK |
245 | config IMG_MDC_DMA |
246 | tristate "IMG MDC support" | |
247 | depends on MIPS || COMPILE_TEST | |
248 | depends on MFD_SYSCON | |
0fb6f739 | 249 | select DMA_ENGINE |
3c216190 VK |
250 | select DMA_VIRTUAL_CHANNELS |
251 | help | |
252 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 253 | |
3c216190 VK |
254 | config IMX_DMA |
255 | tristate "i.MX DMA support" | |
8e2d41f8 | 256 | depends on ARCH_MXC |
ff7b0479 | 257 | select DMA_ENGINE |
5296b56d | 258 | help |
3c216190 VK |
259 | Support the i.MX DMA engine. This engine is integrated into |
260 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 261 | |
3c216190 VK |
262 | config IMX_SDMA |
263 | tristate "i.MX SDMA support" | |
8e2d41f8 | 264 | depends on ARCH_MXC |
5296b56d | 265 | select DMA_ENGINE |
57b772b8 | 266 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 267 | help |
3c216190 VK |
268 | Support the i.MX SDMA engine. This engine is integrated into |
269 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 270 | |
9ab8b4e7 | 271 | config INTEL_IDMA64 |
35271227 LT |
272 | tristate "Intel integrated DMA 64-bit support" |
273 | select DMA_ENGINE | |
274 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 275 | help |
35271227 LT |
276 | Enable DMA support for Intel Low Power Subsystem such as found on |
277 | Intel Skylake PCH. | |
5296b56d | 278 | |
bfe1d560 DJ |
279 | config INTEL_IDXD |
280 | tristate "Intel Data Accelerators support" | |
281 | depends on PCI && X86_64 | |
d6a7bb86 | 282 | depends on PCI_MSI |
0705107f | 283 | depends on SBITMAP |
bfe1d560 | 284 | select DMA_ENGINE |
bfe1d560 DJ |
285 | help |
286 | Enable support for the Intel(R) data accelerators present | |
287 | in Intel Xeon CPU. | |
288 | ||
289 | Say Y if you have such a platform. | |
290 | ||
291 | If unsure, say N. | |
292 | ||
8e50d392 DJ |
293 | # Config symbol that collects all the dependencies that's necessary to |
294 | # support shared virtual memory for the devices supported by idxd. | |
295 | config INTEL_IDXD_SVM | |
296 | bool "Accelerator Shared Virtual Memory Support" | |
297 | depends on INTEL_IDXD | |
298 | depends on INTEL_IOMMU_SVM | |
299 | depends on PCI_PRI | |
300 | depends on PCI_PASID | |
301 | depends on PCI_IOV | |
302 | ||
81dd4d4d TZ |
303 | config INTEL_IDXD_PERFMON |
304 | bool "Intel Data Accelerators performance monitor support" | |
305 | depends on INTEL_IDXD | |
306 | help | |
307 | Enable performance monitor (pmu) support for the Intel(R) | |
308 | data accelerators present in Intel Xeon CPU. With this | |
309 | enabled, perf can be used to monitor the DSA (Intel Data | |
310 | Streaming Accelerator) events described in the Intel DSA | |
311 | spec. | |
312 | ||
313 | If unsure, say N. | |
314 | ||
3c216190 VK |
315 | config INTEL_IOATDMA |
316 | tristate "Intel I/OAT DMA support" | |
317 | depends on PCI && X86_64 | |
a57e16cf | 318 | select DMA_ENGINE |
3c216190 VK |
319 | select DMA_ENGINE_RAID |
320 | select DCA | |
a57e16cf | 321 | help |
3c216190 VK |
322 | Enable support for the Intel(R) I/OAT DMA engine present |
323 | in recent Intel Xeon chipsets. | |
a57e16cf | 324 | |
3c216190 VK |
325 | Say Y here if you have such a chipset. |
326 | ||
327 | If unsure, say N. | |
328 | ||
329 | config INTEL_IOP_ADMA | |
aad7ad2a | 330 | tristate "Intel IOP32x ADMA support" |
04cbfba6 | 331 | depends on ARCH_IOP32X || COMPILE_TEST |
ea76f0b3 | 332 | select DMA_ENGINE |
3c216190 | 333 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 334 | help |
3c216190 | 335 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 336 | |
3c216190 VK |
337 | config K3_DMA |
338 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 339 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
340 | select DMA_ENGINE |
341 | select DMA_VIRTUAL_CHANNELS | |
342 | help | |
3c216190 VK |
343 | Support the DMA engine for Hisilicon K3 platform |
344 | devices. | |
ddeccb8d | 345 | |
3c216190 VK |
346 | config LPC18XX_DMAMUX |
347 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
348 | depends on ARCH_LPC18XX || COMPILE_TEST | |
349 | depends on OF && AMBA_PL08X | |
350 | select MFD_SYSCON | |
351 | help | |
352 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
353 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 354 | |
e7a3ff92 AD |
355 | config MCF_EDMA |
356 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
357 | depends on M5441x || COMPILE_TEST | |
358 | select DMA_ENGINE | |
359 | select DMA_VIRTUAL_CHANNELS | |
360 | help | |
361 | Support the Freescale ColdFire eDMA engine, 64-channel | |
362 | implementation that performs complex data transfers with | |
363 | minimal intervention from a host processor. | |
364 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
365 | ||
6c3214e6 JB |
366 | config MILBEAUT_HDMAC |
367 | tristate "Milbeaut AHB DMA support" | |
368 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
369 | depends on OF | |
370 | select DMA_ENGINE | |
371 | select DMA_VIRTUAL_CHANNELS | |
372 | help | |
373 | Say yes here to support the Socionext Milbeaut | |
374 | HDMAC device. | |
375 | ||
a6e9be05 JB |
376 | config MILBEAUT_XDMAC |
377 | tristate "Milbeaut AXI DMA support" | |
378 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
379 | depends on OF | |
380 | select DMA_ENGINE | |
381 | select DMA_VIRTUAL_CHANNELS | |
382 | help | |
383 | Say yes here to support the Socionext Milbeaut | |
384 | XDMAC device. | |
385 | ||
3c216190 | 386 | config MMP_PDMA |
793dff4b | 387 | tristate "MMP PDMA support" |
cd3a792a | 388 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 389 | select DMA_ENGINE |
61f135b9 | 390 | help |
3c216190 | 391 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 392 | |
3c216190 | 393 | config MMP_TDMA |
9f3c14d4 | 394 | tristate "MMP Two-Channel DMA support" |
93d05f1e | 395 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 396 | select DMA_ENGINE |
d6619761 | 397 | select GENERIC_ALLOCATOR |
8d318a50 | 398 | help |
3c216190 VK |
399 | Support the MMP Two-Channel DMA engine. |
400 | This engine used for MMP Audio DMA and pxa910 SQU. | |
8d318a50 | 401 | |
3c216190 VK |
402 | config MOXART_DMA |
403 | tristate "MOXART DMA support" | |
404 | depends on ARCH_MOXART | |
12458ea0 | 405 | select DMA_ENGINE |
3c216190 | 406 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 407 | help |
3c216190 VK |
408 | Enable support for the MOXA ART SoC DMA controller. |
409 | ||
410 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 411 | |
3c216190 VK |
412 | config MPC512X_DMA |
413 | tristate "Freescale MPC512x built-in DMA engine support" | |
414 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 415 | select DMA_ENGINE |
a7f7f624 | 416 | help |
3c216190 | 417 | Enable support for the Freescale MPC512x built-in DMA engine. |
de5d4453 | 418 | |
3c216190 VK |
419 | config MV_XOR |
420 | bool "Marvell XOR engine support" | |
c39290a1 | 421 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 422 | select DMA_ENGINE |
3c216190 VK |
423 | select DMA_ENGINE_RAID |
424 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
a7f7f624 | 425 | help |
3c216190 | 426 | Enable support for the Marvell XOR engine. |
ca21a146 | 427 | |
19a340b1 TP |
428 | config MV_XOR_V2 |
429 | bool "Marvell XOR engine version 2 support " | |
430 | depends on ARM64 | |
431 | select DMA_ENGINE | |
432 | select DMA_ENGINE_RAID | |
433 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
434 | select GENERIC_MSI_IRQ_DOMAIN | |
a7f7f624 | 435 | help |
19a340b1 TP |
436 | Enable support for the Marvell version 2 XOR engine. |
437 | ||
438 | This engine provides acceleration for copy, XOR and RAID6 | |
439 | operations, and is available on Marvell Armada 7K and 8K | |
440 | platforms. | |
441 | ||
3c216190 VK |
442 | config MXS_DMA |
443 | bool "MXS DMA support" | |
d762e4f3 | 444 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 445 | select STMP_DEVICE |
ca21a146 RY |
446 | select DMA_ENGINE |
447 | help | |
3c216190 | 448 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 449 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 450 | |
3c216190 VK |
451 | config MX3_IPU |
452 | bool "MX3x Image Processing Unit support" | |
453 | depends on ARCH_MXC | |
c2dde5f8 | 454 | select DMA_ENGINE |
3c216190 | 455 | default y |
c2dde5f8 | 456 | help |
3c216190 VK |
457 | If you plan to use the Image Processing unit in the i.MX3x, say |
458 | Y here. If unsure, select Y. | |
a074ae38 | 459 | |
3c216190 VK |
460 | config MX3_IPU_IRQS |
461 | int "Number of dynamically mapped interrupts for IPU" | |
462 | depends on MX3_IPU | |
463 | range 2 137 | |
464 | default 4 | |
465 | help | |
466 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
467 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
468 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 469 | |
3c216190 VK |
470 | config NBPFAXI_DMA |
471 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 472 | select DMA_ENGINE |
3c216190 | 473 | depends on ARM || COMPILE_TEST |
b3040e40 | 474 | help |
3c216190 | 475 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 476 | |
47e20577 MS |
477 | config OWL_DMA |
478 | tristate "Actions Semi Owl SoCs DMA support" | |
479 | depends on ARCH_ACTIONS | |
480 | select DMA_ENGINE | |
481 | select DMA_VIRTUAL_CHANNELS | |
482 | help | |
483 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
484 | ||
0c42bd0e | 485 | config PCH_DMA |
ca7fe2db | 486 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 487 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
488 | select DMA_ENGINE |
489 | help | |
2cdf2455 TM |
490 | Enable support for Intel EG20T PCH DMA engine. |
491 | ||
e79e72be | 492 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
493 | Output Hub), ML7213, ML7223 and ML7831. |
494 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
495 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
496 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
497 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 498 | |
3c216190 VK |
499 | config PL330_DMA |
500 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 501 | select DMA_ENGINE |
3c216190 | 502 | depends on ARM_AMBA |
1ec1e82f | 503 | help |
3c216190 VK |
504 | Select if your platform has one or more PL330 DMACs. |
505 | You need to provide platform specific settings via | |
506 | platform_data for a dma-pl330 device. | |
1ec1e82f | 507 | |
3c216190 VK |
508 | config PXA_DMA |
509 | bool "PXA DMA support" | |
510 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 511 | select DMA_ENGINE |
3c216190 | 512 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 513 | help |
3c216190 VK |
514 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
515 | platform. The internal DMA IP of all PXA variants is supported, with | |
516 | 16 to 32 channels for peripheral to memory or memory to memory | |
517 | transfers. | |
1f1846c6 | 518 | |
905ca51e LG |
519 | config PLX_DMA |
520 | tristate "PLX ExpressLane PEX Switch DMA Engine Support" | |
521 | depends on PCI | |
522 | select DMA_ENGINE | |
523 | help | |
524 | Some PLX ExpressLane PCI Switches support additional DMA engines. | |
525 | These are exposed via extra functions on the switch's | |
526 | upstream port. Each function exposes one DMA channel. | |
527 | ||
3c216190 VK |
528 | config STE_DMA40 |
529 | bool "ST-Ericsson DMA40 support" | |
530 | depends on ARCH_U8500 | |
760ee1c4 MW |
531 | select DMA_ENGINE |
532 | help | |
3c216190 | 533 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 534 | |
6b4cd727 PG |
535 | config ST_FDMA |
536 | tristate "ST FDMA dmaengine support" | |
537 | depends on ARCH_STI | |
3d6b3715 | 538 | depends on REMOTEPROC |
6b4cd727 PG |
539 | select ST_SLIM_REMOTEPROC |
540 | select DMA_ENGINE | |
541 | select DMA_VIRTUAL_CHANNELS | |
542 | help | |
543 | Enable support for ST FDMA controller. | |
544 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
545 | ||
546 | Say Y here if you have such a chipset. | |
547 | If unsure, say N. | |
548 | ||
d8b46839 CM |
549 | config STM32_DMA |
550 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 551 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 552 | select DMA_ENGINE |
d8b46839 CM |
553 | select DMA_VIRTUAL_CHANNELS |
554 | help | |
555 | Enable support for the on-chip DMA controller on STMicroelectronics | |
556 | STM32 MCUs. | |
ddf9bd40 | 557 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
558 | here. |
559 | ||
df7e762d PYM |
560 | config STM32_DMAMUX |
561 | bool "STMicroelectronics STM32 dma multiplexer support" | |
562 | depends on STM32_DMA || COMPILE_TEST | |
563 | help | |
564 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
565 | STM32 MCUs. | |
566 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
567 | here. | |
568 | ||
a4ffb13c PYM |
569 | config STM32_MDMA |
570 | bool "STMicroelectronics STM32 master dma support" | |
571 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 572 | depends on OF |
a4ffb13c | 573 | select DMA_ENGINE |
a4ffb13c PYM |
574 | select DMA_VIRTUAL_CHANNELS |
575 | help | |
576 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
577 | STM32 platforms. | |
578 | If you have a board based on STM32 SoC and wish to use the master DMA | |
579 | say Y here. | |
580 | ||
9b3b8171 BW |
581 | config SPRD_DMA |
582 | tristate "Spreadtrum DMA support" | |
583 | depends on ARCH_SPRD || COMPILE_TEST | |
584 | select DMA_ENGINE | |
585 | select DMA_VIRTUAL_CHANNELS | |
586 | help | |
587 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
588 | ||
3c216190 | 589 | config S3C24XX_DMAC |
9bdca822 | 590 | bool "Samsung S3C24XX DMA support" |
1609db6f | 591 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 592 | select DMA_ENGINE |
50437bff | 593 | select DMA_VIRTUAL_CHANNELS |
6365bead | 594 | help |
3c216190 VK |
595 | Support for the Samsung S3C24XX DMA controller driver. The |
596 | DMA controller is having multiple DMA channels which can be | |
597 | configured for different peripherals like audio, UART, SPI. | |
598 | The DMA controller can transfer data from memory to peripheral, | |
599 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 600 | |
3c216190 VK |
601 | config TXX9_DMAC |
602 | tristate "Toshiba TXx9 SoC DMA support" | |
603 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
604 | select DMA_ENGINE |
605 | help | |
3c216190 VK |
606 | Support the TXx9 SoC internal DMA controller. This can be |
607 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 608 | |
3c216190 | 609 | config TEGRA20_APB_DMA |
703b70f4 | 610 | tristate "NVIDIA Tegra20 APB DMA support" |
6c41ac96 | 611 | depends on ARCH_TEGRA || COMPILE_TEST |
7bedaa55 | 612 | select DMA_ENGINE |
3c216190 VK |
613 | help |
614 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
615 | DMA controller is having multiple DMA channel which can be | |
616 | configured for different peripherals like audio, UART, SPI, | |
617 | I2C etc which is in APB bus. | |
618 | This DMA controller transfers data from memory to peripheral fifo | |
619 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 620 | |
f46b1957 | 621 | config TEGRA210_ADMA |
3ed16793 | 622 | tristate "NVIDIA Tegra210 ADMA support" |
3145d73e | 623 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) |
f46b1957 JH |
624 | select DMA_ENGINE |
625 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
626 | help |
627 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
628 | DMA controller has multiple DMA channels and is used to service | |
629 | various audio clients in the Tegra210 audio processing engine | |
630 | (APE). This DMA controller transfers data from memory to | |
631 | peripheral and vice versa. It does not support memory to | |
632 | memory data transfer. | |
633 | ||
3c216190 VK |
634 | config TIMB_DMA |
635 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 636 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 637 | select DMA_ENGINE |
3c216190 VK |
638 | help |
639 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 640 | |
32e74aab MY |
641 | config UNIPHIER_MDMAC |
642 | tristate "UniPhier MIO DMAC" | |
643 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
644 | depends on OF | |
645 | select DMA_ENGINE | |
646 | select DMA_VIRTUAL_CHANNELS | |
647 | help | |
648 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
649 | UniPhier platform. This DMA controller is used as the external | |
650 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
651 | ||
667b9251 KH |
652 | config UNIPHIER_XDMAC |
653 | tristate "UniPhier XDMAC support" | |
654 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
655 | depends on OF | |
656 | select DMA_ENGINE | |
657 | select DMA_VIRTUAL_CHANNELS | |
658 | help | |
659 | Enable support for the XDMAC (external DMA controller) on the | |
660 | UniPhier platform. This DMA controller can transfer data from | |
661 | memory to memory, memory to peripheral and peripheral to memory. | |
662 | ||
3c216190 VK |
663 | config XGENE_DMA |
664 | tristate "APM X-Gene DMA support" | |
665 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 666 | select DMA_ENGINE |
3c216190 VK |
667 | select DMA_ENGINE_RAID |
668 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 669 | help |
3c216190 | 670 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 671 | |
fde57a7c KA |
672 | config XILINX_DMA |
673 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 674 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
675 | select DMA_ENGINE |
676 | help | |
677 | Enable support for Xilinx AXI VDMA Soft IP. | |
678 | ||
fde57a7c | 679 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
680 | between memory and AXI4-Stream video type target |
681 | peripherals including peripherals which support AXI4- | |
682 | Stream Video Protocol. It has two stream interfaces/ | |
683 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
684 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
685 | AXI CDMA engine provides high-bandwidth direct memory access |
686 | between a memory-mapped source address and a memory-mapped | |
687 | destination address. | |
688 | AXI DMA engine provides high-bandwidth one dimensional direct | |
689 | memory access between memory and AXI4-Stream target peripherals. | |
6ccd692b RSP |
690 | AXI MCDMA engine provides high-bandwidth direct memory access |
691 | between memory and AXI4-Stream target peripherals. It provides | |
692 | the scatter gather interface with multiple channels independent | |
693 | configuration support. | |
9cd4360d | 694 | |
b0cc417c KA |
695 | config XILINX_ZYNQMP_DMA |
696 | tristate "Xilinx ZynqMP DMA Engine" | |
697 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
698 | select DMA_ENGINE | |
699 | help | |
700 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 701 | |
7cbb0c63 HK |
702 | config XILINX_ZYNQMP_DPDMA |
703 | tristate "Xilinx DPDMA Engine" | |
704 | select DMA_ENGINE | |
705 | select DMA_VIRTUAL_CHANNELS | |
706 | help | |
707 | Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option | |
708 | if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The | |
709 | driver provides the dmaengine required by the DisplayPort subsystem | |
710 | display driver. | |
711 | ||
3c216190 VK |
712 | # driver files |
713 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 714 | |
548c4597 SW |
715 | source "drivers/dma/mediatek/Kconfig" |
716 | ||
d9b31efc SK |
717 | source "drivers/dma/qcom/Kconfig" |
718 | ||
3c216190 | 719 | source "drivers/dma/dw/Kconfig" |
50437bff | 720 | |
e63d79d1 GP |
721 | source "drivers/dma/dw-edma/Kconfig" |
722 | ||
3c216190 | 723 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 724 | |
6973886a GW |
725 | source "drivers/dma/sf-pdma/Kconfig" |
726 | ||
3c216190 | 727 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 728 | |
d88b1397 PU |
729 | source "drivers/dma/ti/Kconfig" |
730 | ||
7fdf9b05 PM |
731 | source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
732 | ||
32d31c79 AM |
733 | source "drivers/dma/lgm/Kconfig" |
734 | ||
3c216190 | 735 | # clients |
db217334 | 736 | comment "DMA Clients" |
2ed6dc34 | 737 | depends on DMA_ENGINE |
db217334 | 738 | |
729b5d1b DW |
739 | config ASYNC_TX_DMA |
740 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 741 | depends on DMA_ENGINE |
729b5d1b DW |
742 | help |
743 | This allows the async_tx api to take advantage of offload engines for | |
744 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
745 | a dma engine that can perform raid operations and you have enabled | |
746 | MD_RAID456 say Y. | |
747 | ||
748 | If unsure, say N. | |
749 | ||
4a776f0a HS |
750 | config DMATEST |
751 | tristate "DMA Test client" | |
752 | depends on DMA_ENGINE | |
58532e66 | 753 | select DMA_ENGINE_RAID |
4a776f0a HS |
754 | help |
755 | Simple DMA test client. Say N unless you're debugging a | |
756 | DMA Device driver. | |
757 | ||
3cc377b9 DW |
758 | config DMA_ENGINE_RAID |
759 | bool | |
760 | ||
2ed6dc34 | 761 | endif |