Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 | 17 | config DMADEVICES_DEBUG |
67805a4b KK |
18 | bool "DMA Engine debugging" |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
6c664a89 LW |
23 | |
24 | config DMADEVICES_VDEBUG | |
67805a4b KK |
25 | bool "DMA Engine verbose debugging" |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
6c664a89 LW |
31 | |
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
253697b9 | 62 | depends on HAS_IOMEM |
a85c6f1b SR |
63 | select DMA_ENGINE |
64 | help | |
65 | Enable support for Altera / Intel mSGDMA controller. | |
66 | ||
e8689e63 LW |
67 | config AMBA_PL08X |
68 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 69 | depends on ARM_AMBA |
e8689e63 | 70 | select DMA_ENGINE |
083be28a | 71 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 72 | help |
1e1cfc72 LW |
73 | Say yes if your platform has a PL08x DMAC device which can |
74 | provide DMA engine support. This includes the original ARM | |
75 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
76 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 77 | |
3c216190 VK |
78 | config AMCC_PPC440SPE_ADMA |
79 | tristate "AMCC PPC440SPe ADMA support" | |
80 | depends on 440SPe || 440SP | |
2ed6dc34 | 81 | select DMA_ENGINE |
3cc377b9 | 82 | select DMA_ENGINE_RAID |
3c216190 | 83 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 84 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 85 | help |
3c216190 | 86 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 87 | |
b127315d MP |
88 | config APPLE_ADMAC |
89 | tristate "Apple ADMAC support" | |
90 | depends on ARCH_APPLE || COMPILE_TEST | |
91 | select DMA_ENGINE | |
92 | default ARCH_APPLE | |
93 | help | |
94 | Enable support for Audio DMA Controller found on Apple Silicon SoCs. | |
95 | ||
dc78baa2 NF |
96 | config AT_HDMAC |
97 | tristate "Atmel AHB DMA support" | |
f898fed0 | 98 | depends on ARCH_AT91 |
dc78baa2 NF |
99 | select DMA_ENGINE |
100 | help | |
f898fed0 | 101 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 102 | |
e1f7c9ee LD |
103 | config AT_XDMAC |
104 | tristate "Atmel XDMA support" | |
6e5ae29b | 105 | depends on ARCH_AT91 |
e1f7c9ee LD |
106 | select DMA_ENGINE |
107 | help | |
108 | Support the Atmel XDMA controller. | |
2ed6dc34 | 109 | |
3c216190 VK |
110 | config AXI_DMAC |
111 | tristate "Analog Devices AXI-DMAC DMA support" | |
5c038872 | 112 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 113 | select DMA_ENGINE |
3c216190 | 114 | select DMA_VIRTUAL_CHANNELS |
fc15be39 | 115 | select REGMAP_MMIO |
2ed6dc34 | 116 | help |
3c216190 | 117 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
2fea2906 | 118 | controller is often used in Analog Devices' reference designs for FPGA |
3c216190 | 119 | platforms. |
c13c8260 | 120 | |
743e1c8f AP |
121 | config BCM_SBA_RAID |
122 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
123 | depends on ARM64 || COMPILE_TEST |
124 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
125 | select DMA_ENGINE |
126 | select DMA_ENGINE_RAID | |
127 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
128 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 129 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
130 | help |
131 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
132 | engine is available on most of the Broadcom iProc SoCs. It | |
133 | has the capability to offload memcpy, xor and pq computation | |
134 | for raid5/6. | |
135 | ||
3c216190 VK |
136 | config DMA_BCM2835 |
137 | tristate "BCM2835 DMA engine support" | |
138 | depends on ARCH_BCM2835 | |
139 | select DMA_ENGINE | |
140 | select DMA_VIRTUAL_CHANNELS | |
141 | ||
3c216190 VK |
142 | config DMA_JZ4780 |
143 | tristate "JZ4780 DMA support" | |
c558ecd2 | 144 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
145 | select DMA_ENGINE |
146 | select DMA_VIRTUAL_CHANNELS | |
147 | help | |
3c216190 VK |
148 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
149 | If you have a board based on such a SoC and wish to use DMA for | |
150 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 151 | |
3c216190 VK |
152 | config DMA_SA11X0 |
153 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 154 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 155 | select DMA_ENGINE |
3c216190 | 156 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 157 | help |
3c216190 VK |
158 | Support the DMA engine found on Intel StrongARM SA-1100 and |
159 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
160 | devices. | |
dc78baa2 | 161 | |
3c216190 VK |
162 | config DMA_SUN4I |
163 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 164 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 165 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 166 | select DMA_ENGINE |
3c216190 | 167 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 168 | help |
3c216190 VK |
169 | Enable support for the DMA controller present in the sun4i, |
170 | sun5i and sun7i Allwinner ARM SoCs. | |
171 | ||
172 | config DMA_SUN6I | |
173 | tristate "Allwinner A31 SoCs DMA support" | |
8292a155 | 174 | depends on ARCH_SUNXI || COMPILE_TEST |
3c216190 VK |
175 | depends on RESET_CONTROLLER |
176 | select DMA_ENGINE | |
177 | select DMA_VIRTUAL_CHANNELS | |
178 | help | |
179 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
180 | ||
1fe20f1b EP |
181 | config DW_AXI_DMAC |
182 | tristate "Synopsys DesignWare AXI DMA support" | |
84dd3b2b | 183 | depends on OF |
cd0f00c3 | 184 | depends on HAS_IOMEM |
1fe20f1b EP |
185 | select DMA_ENGINE |
186 | select DMA_VIRTUAL_CHANNELS | |
187 | help | |
188 | Enable support for Synopsys DesignWare AXI DMA controller. | |
189 | NOTE: This driver wasn't tested on 64 bit platform because | |
190 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
191 | ||
3c216190 VK |
192 | config EP93XX_DMA |
193 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 194 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
195 | select DMA_ENGINE |
196 | help | |
197 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 198 | |
173acc7c | 199 | config FSL_DMA |
8de7a7d9 | 200 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 201 | depends on FSL_SOC |
173acc7c | 202 | select DMA_ENGINE |
5fc6d897 | 203 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
a7f7f624 | 204 | help |
8de7a7d9 HZ |
205 | Enable support for the Freescale Elo series DMA controllers. |
206 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
207 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
208 | some Txxx and Bxxx parts. | |
173acc7c | 209 | |
3c216190 VK |
210 | config FSL_EDMA |
211 | tristate "Freescale eDMA engine support" | |
212 | depends on OF | |
213 | select DMA_ENGINE | |
214 | select DMA_VIRTUAL_CHANNELS | |
215 | help | |
216 | Support the Freescale eDMA engine with programmable channel | |
217 | multiplexing capability for DMA request sources(slot). | |
218 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
219 | ||
b092529e | 220 | config FSL_QDMA |
67805a4b KK |
221 | tristate "NXP Layerscape qDMA engine support" |
222 | depends on ARM || ARM64 | |
223 | select DMA_ENGINE | |
224 | select DMA_VIRTUAL_CHANNELS | |
225 | select DMA_ENGINE_RAID | |
226 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
227 | help | |
228 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
229 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
230 | or dequeuing DMA jobs from, different work queues. | |
231 | This module can be found on NXP Layerscape SoCs. | |
b092529e PM |
232 | The qdma driver only work on SoCs with a DPAA hardware block. |
233 | ||
ad80da65 | 234 | config FSL_RAID |
67805a4b KK |
235 | tristate "Freescale RAID engine Support" |
236 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
237 | select DMA_ENGINE | |
238 | select DMA_ENGINE_RAID | |
a7f7f624 | 239 | help |
67805a4b KK |
240 | Enable support for Freescale RAID Engine. RAID Engine is |
241 | available on some QorIQ SoCs (like P5020/P5040). It has | |
242 | the capability to offload memcpy, xor and pq computation | |
ad80da65 XS |
243 | for raid5/6. |
244 | ||
e9f08b65 ZW |
245 | config HISI_DMA |
246 | tristate "HiSilicon DMA Engine support" | |
ae148b43 Y |
247 | depends on ARM64 || COMPILE_TEST |
248 | depends on PCI_MSI | |
e9f08b65 ZW |
249 | select DMA_ENGINE |
250 | select DMA_VIRTUAL_CHANNELS | |
251 | help | |
252 | Support HiSilicon Kunpeng DMA engine. | |
253 | ||
3c216190 VK |
254 | config IMG_MDC_DMA |
255 | tristate "IMG MDC support" | |
256 | depends on MIPS || COMPILE_TEST | |
257 | depends on MFD_SYSCON | |
0fb6f739 | 258 | select DMA_ENGINE |
3c216190 VK |
259 | select DMA_VIRTUAL_CHANNELS |
260 | help | |
261 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 262 | |
3c216190 VK |
263 | config IMX_DMA |
264 | tristate "i.MX DMA support" | |
8e2d41f8 | 265 | depends on ARCH_MXC |
ff7b0479 | 266 | select DMA_ENGINE |
5296b56d | 267 | help |
3c216190 VK |
268 | Support the i.MX DMA engine. This engine is integrated into |
269 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 270 | |
3c216190 VK |
271 | config IMX_SDMA |
272 | tristate "i.MX SDMA support" | |
8e2d41f8 | 273 | depends on ARCH_MXC |
5296b56d | 274 | select DMA_ENGINE |
57b772b8 | 275 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 276 | help |
3c216190 VK |
277 | Support the i.MX SDMA engine. This engine is integrated into |
278 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 279 | |
9ab8b4e7 | 280 | config INTEL_IDMA64 |
35271227 LT |
281 | tristate "Intel integrated DMA 64-bit support" |
282 | select DMA_ENGINE | |
283 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 284 | help |
35271227 LT |
285 | Enable DMA support for Intel Low Power Subsystem such as found on |
286 | Intel Skylake PCH. | |
5296b56d | 287 | |
d9e5481f DJ |
288 | config INTEL_IDXD_BUS |
289 | tristate | |
290 | default INTEL_IDXD | |
291 | ||
bfe1d560 DJ |
292 | config INTEL_IDXD |
293 | tristate "Intel Data Accelerators support" | |
b2296eea | 294 | depends on PCI && X86_64 && !UML |
d6a7bb86 | 295 | depends on PCI_MSI |
d8071323 | 296 | depends on PCI_PASID |
0705107f | 297 | depends on SBITMAP |
bfe1d560 | 298 | select DMA_ENGINE |
bfe1d560 DJ |
299 | help |
300 | Enable support for the Intel(R) data accelerators present | |
301 | in Intel Xeon CPU. | |
302 | ||
303 | Say Y if you have such a platform. | |
304 | ||
305 | If unsure, say N. | |
306 | ||
6e7f3ee9 DJ |
307 | config INTEL_IDXD_COMPAT |
308 | bool "Legacy behavior for idxd driver" | |
309 | depends on PCI && X86_64 | |
310 | select INTEL_IDXD_BUS | |
311 | help | |
312 | Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior. | |
313 | The old behavior performed driver bind/unbind for device and wq | |
314 | devices all under the dsa driver. The compat driver will emulate | |
315 | the legacy behavior in order to allow existing support apps (i.e. | |
316 | accel-config) to continue function. It is expected that accel-config | |
317 | v3.2 and earlier will need the compat mode. A distro with later | |
318 | accel-config version can disable this compat config. | |
319 | ||
320 | Say Y if you have old applications that require such behavior. | |
321 | ||
322 | If unsure, say N. | |
323 | ||
8e50d392 DJ |
324 | # Config symbol that collects all the dependencies that's necessary to |
325 | # support shared virtual memory for the devices supported by idxd. | |
326 | config INTEL_IDXD_SVM | |
327 | bool "Accelerator Shared Virtual Memory Support" | |
328 | depends on INTEL_IDXD | |
329 | depends on INTEL_IOMMU_SVM | |
330 | depends on PCI_PRI | |
331 | depends on PCI_PASID | |
332 | depends on PCI_IOV | |
333 | ||
81dd4d4d TZ |
334 | config INTEL_IDXD_PERFMON |
335 | bool "Intel Data Accelerators performance monitor support" | |
336 | depends on INTEL_IDXD | |
337 | help | |
338 | Enable performance monitor (pmu) support for the Intel(R) | |
339 | data accelerators present in Intel Xeon CPU. With this | |
340 | enabled, perf can be used to monitor the DSA (Intel Data | |
341 | Streaming Accelerator) events described in the Intel DSA | |
342 | spec. | |
343 | ||
344 | If unsure, say N. | |
345 | ||
3c216190 VK |
346 | config INTEL_IOATDMA |
347 | tristate "Intel I/OAT DMA support" | |
bbac7a92 | 348 | depends on PCI && X86_64 && !UML |
a57e16cf | 349 | select DMA_ENGINE |
3c216190 VK |
350 | select DMA_ENGINE_RAID |
351 | select DCA | |
a57e16cf | 352 | help |
3c216190 VK |
353 | Enable support for the Intel(R) I/OAT DMA engine present |
354 | in recent Intel Xeon chipsets. | |
a57e16cf | 355 | |
3c216190 VK |
356 | Say Y here if you have such a chipset. |
357 | ||
358 | If unsure, say N. | |
359 | ||
360 | config INTEL_IOP_ADMA | |
aad7ad2a | 361 | tristate "Intel IOP32x ADMA support" |
04cbfba6 | 362 | depends on ARCH_IOP32X || COMPILE_TEST |
ea76f0b3 | 363 | select DMA_ENGINE |
3c216190 | 364 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 365 | help |
3c216190 | 366 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 367 | |
3c216190 VK |
368 | config K3_DMA |
369 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 370 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
371 | select DMA_ENGINE |
372 | select DMA_VIRTUAL_CHANNELS | |
373 | help | |
3c216190 VK |
374 | Support the DMA engine for Hisilicon K3 platform |
375 | devices. | |
ddeccb8d | 376 | |
3c216190 VK |
377 | config LPC18XX_DMAMUX |
378 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
379 | depends on ARCH_LPC18XX || COMPILE_TEST | |
380 | depends on OF && AMBA_PL08X | |
381 | select MFD_SYSCON | |
382 | help | |
383 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
384 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 385 | |
e7a3ff92 AD |
386 | config MCF_EDMA |
387 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
388 | depends on M5441x || COMPILE_TEST | |
389 | select DMA_ENGINE | |
390 | select DMA_VIRTUAL_CHANNELS | |
391 | help | |
392 | Support the Freescale ColdFire eDMA engine, 64-channel | |
393 | implementation that performs complex data transfers with | |
394 | minimal intervention from a host processor. | |
395 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
396 | ||
6c3214e6 JB |
397 | config MILBEAUT_HDMAC |
398 | tristate "Milbeaut AHB DMA support" | |
399 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
400 | depends on OF | |
401 | select DMA_ENGINE | |
402 | select DMA_VIRTUAL_CHANNELS | |
403 | help | |
404 | Say yes here to support the Socionext Milbeaut | |
405 | HDMAC device. | |
406 | ||
a6e9be05 JB |
407 | config MILBEAUT_XDMAC |
408 | tristate "Milbeaut AXI DMA support" | |
409 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
410 | depends on OF | |
411 | select DMA_ENGINE | |
412 | select DMA_VIRTUAL_CHANNELS | |
413 | help | |
414 | Say yes here to support the Socionext Milbeaut | |
415 | XDMAC device. | |
416 | ||
3c216190 | 417 | config MMP_PDMA |
793dff4b | 418 | tristate "MMP PDMA support" |
cd3a792a | 419 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 420 | select DMA_ENGINE |
61f135b9 | 421 | help |
3c216190 | 422 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 423 | |
3c216190 | 424 | config MMP_TDMA |
9f3c14d4 | 425 | tristate "MMP Two-Channel DMA support" |
93d05f1e | 426 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 427 | select DMA_ENGINE |
d6619761 | 428 | select GENERIC_ALLOCATOR |
8d318a50 | 429 | help |
3c216190 VK |
430 | Support the MMP Two-Channel DMA engine. |
431 | This engine used for MMP Audio DMA and pxa910 SQU. | |
8d318a50 | 432 | |
3c216190 VK |
433 | config MOXART_DMA |
434 | tristate "MOXART DMA support" | |
435 | depends on ARCH_MOXART | |
12458ea0 | 436 | select DMA_ENGINE |
3c216190 | 437 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 438 | help |
3c216190 VK |
439 | Enable support for the MOXA ART SoC DMA controller. |
440 | ||
441 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 442 | |
3c216190 VK |
443 | config MPC512X_DMA |
444 | tristate "Freescale MPC512x built-in DMA engine support" | |
445 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 446 | select DMA_ENGINE |
a7f7f624 | 447 | help |
3c216190 | 448 | Enable support for the Freescale MPC512x built-in DMA engine. |
de5d4453 | 449 | |
3c216190 VK |
450 | config MV_XOR |
451 | bool "Marvell XOR engine support" | |
c39290a1 | 452 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 453 | select DMA_ENGINE |
3c216190 VK |
454 | select DMA_ENGINE_RAID |
455 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
a7f7f624 | 456 | help |
3c216190 | 457 | Enable support for the Marvell XOR engine. |
ca21a146 | 458 | |
19a340b1 TP |
459 | config MV_XOR_V2 |
460 | bool "Marvell XOR engine version 2 support " | |
461 | depends on ARM64 | |
462 | select DMA_ENGINE | |
463 | select DMA_ENGINE_RAID | |
464 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
13e7accb | 465 | select GENERIC_MSI_IRQ |
a7f7f624 | 466 | help |
19a340b1 TP |
467 | Enable support for the Marvell version 2 XOR engine. |
468 | ||
469 | This engine provides acceleration for copy, XOR and RAID6 | |
470 | operations, and is available on Marvell Armada 7K and 8K | |
471 | platforms. | |
472 | ||
3c216190 VK |
473 | config MXS_DMA |
474 | bool "MXS DMA support" | |
d762e4f3 | 475 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 476 | select STMP_DEVICE |
ca21a146 RY |
477 | select DMA_ENGINE |
478 | help | |
3c216190 | 479 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 480 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 481 | |
3c216190 VK |
482 | config MX3_IPU |
483 | bool "MX3x Image Processing Unit support" | |
484 | depends on ARCH_MXC | |
c2dde5f8 | 485 | select DMA_ENGINE |
3c216190 | 486 | default y |
c2dde5f8 | 487 | help |
3c216190 VK |
488 | If you plan to use the Image Processing unit in the i.MX3x, say |
489 | Y here. If unsure, select Y. | |
a074ae38 | 490 | |
3c216190 VK |
491 | config MX3_IPU_IRQS |
492 | int "Number of dynamically mapped interrupts for IPU" | |
493 | depends on MX3_IPU | |
494 | range 2 137 | |
495 | default 4 | |
496 | help | |
497 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
498 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
499 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 500 | |
3c216190 VK |
501 | config NBPFAXI_DMA |
502 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 503 | select DMA_ENGINE |
3c216190 | 504 | depends on ARM || COMPILE_TEST |
b3040e40 | 505 | help |
3c216190 | 506 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 507 | |
47e20577 MS |
508 | config OWL_DMA |
509 | tristate "Actions Semi Owl SoCs DMA support" | |
510 | depends on ARCH_ACTIONS | |
511 | select DMA_ENGINE | |
512 | select DMA_VIRTUAL_CHANNELS | |
513 | help | |
514 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
515 | ||
0c42bd0e | 516 | config PCH_DMA |
ca7fe2db | 517 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 518 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
519 | select DMA_ENGINE |
520 | help | |
2cdf2455 TM |
521 | Enable support for Intel EG20T PCH DMA engine. |
522 | ||
e79e72be | 523 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
524 | Output Hub), ML7213, ML7223 and ML7831. |
525 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
526 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
527 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
528 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 529 | |
3c216190 VK |
530 | config PL330_DMA |
531 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 532 | select DMA_ENGINE |
3c216190 | 533 | depends on ARM_AMBA |
1ec1e82f | 534 | help |
3c216190 VK |
535 | Select if your platform has one or more PL330 DMACs. |
536 | You need to provide platform specific settings via | |
537 | platform_data for a dma-pl330 device. | |
1ec1e82f | 538 | |
3c216190 VK |
539 | config PXA_DMA |
540 | bool "PXA DMA support" | |
541 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 542 | select DMA_ENGINE |
3c216190 | 543 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 544 | help |
3c216190 VK |
545 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
546 | platform. The internal DMA IP of all PXA variants is supported, with | |
547 | 16 to 32 channels for peripheral to memory or memory to memory | |
548 | transfers. | |
1f1846c6 | 549 | |
905ca51e LG |
550 | config PLX_DMA |
551 | tristate "PLX ExpressLane PEX Switch DMA Engine Support" | |
552 | depends on PCI | |
553 | select DMA_ENGINE | |
554 | help | |
555 | Some PLX ExpressLane PCI Switches support additional DMA engines. | |
556 | These are exposed via extra functions on the switch's | |
557 | upstream port. Each function exposes one DMA channel. | |
558 | ||
3c216190 VK |
559 | config STE_DMA40 |
560 | bool "ST-Ericsson DMA40 support" | |
561 | depends on ARCH_U8500 | |
760ee1c4 MW |
562 | select DMA_ENGINE |
563 | help | |
3c216190 | 564 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 565 | |
6b4cd727 PG |
566 | config ST_FDMA |
567 | tristate "ST FDMA dmaengine support" | |
568 | depends on ARCH_STI | |
3d6b3715 | 569 | depends on REMOTEPROC |
6b4cd727 PG |
570 | select ST_SLIM_REMOTEPROC |
571 | select DMA_ENGINE | |
572 | select DMA_VIRTUAL_CHANNELS | |
573 | help | |
574 | Enable support for ST FDMA controller. | |
575 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
576 | ||
577 | Say Y here if you have such a chipset. | |
578 | If unsure, say N. | |
579 | ||
d8b46839 CM |
580 | config STM32_DMA |
581 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 582 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 583 | select DMA_ENGINE |
d8b46839 CM |
584 | select DMA_VIRTUAL_CHANNELS |
585 | help | |
586 | Enable support for the on-chip DMA controller on STMicroelectronics | |
587 | STM32 MCUs. | |
ddf9bd40 | 588 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
589 | here. |
590 | ||
df7e762d PYM |
591 | config STM32_DMAMUX |
592 | bool "STMicroelectronics STM32 dma multiplexer support" | |
593 | depends on STM32_DMA || COMPILE_TEST | |
594 | help | |
595 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
596 | STM32 MCUs. | |
597 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
598 | here. | |
599 | ||
a4ffb13c PYM |
600 | config STM32_MDMA |
601 | bool "STMicroelectronics STM32 master dma support" | |
602 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 603 | depends on OF |
a4ffb13c | 604 | select DMA_ENGINE |
a4ffb13c PYM |
605 | select DMA_VIRTUAL_CHANNELS |
606 | help | |
607 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
608 | STM32 platforms. | |
609 | If you have a board based on STM32 SoC and wish to use the master DMA | |
610 | say Y here. | |
611 | ||
9b3b8171 BW |
612 | config SPRD_DMA |
613 | tristate "Spreadtrum DMA support" | |
614 | depends on ARCH_SPRD || COMPILE_TEST | |
615 | select DMA_ENGINE | |
616 | select DMA_VIRTUAL_CHANNELS | |
617 | help | |
618 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
619 | ||
3c216190 | 620 | config S3C24XX_DMAC |
9bdca822 | 621 | bool "Samsung S3C24XX DMA support" |
1609db6f | 622 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 623 | select DMA_ENGINE |
50437bff | 624 | select DMA_VIRTUAL_CHANNELS |
6365bead | 625 | help |
3c216190 VK |
626 | Support for the Samsung S3C24XX DMA controller driver. The |
627 | DMA controller is having multiple DMA channels which can be | |
628 | configured for different peripherals like audio, UART, SPI. | |
629 | The DMA controller can transfer data from memory to peripheral, | |
630 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 631 | |
3c216190 VK |
632 | config TXX9_DMAC |
633 | tristate "Toshiba TXx9 SoC DMA support" | |
455481fc | 634 | depends on MACH_TX49XX |
c6da0ba8 ZG |
635 | select DMA_ENGINE |
636 | help | |
3c216190 VK |
637 | Support the TXx9 SoC internal DMA controller. This can be |
638 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 639 | |
ee170280 A |
640 | config TEGRA186_GPC_DMA |
641 | tristate "NVIDIA Tegra GPC DMA support" | |
642 | depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT | |
2cdd3ca6 | 643 | depends on IOMMU_API |
ee170280 A |
644 | select DMA_ENGINE |
645 | help | |
646 | Support for the NVIDIA Tegra General Purpose Central DMA controller. | |
647 | The DMA controller has multiple DMA channels which can be configured | |
648 | for different peripherals like UART, SPI, etc which are on APB bus. | |
649 | This DMA controller transfers data from memory to peripheral FIFO | |
650 | or vice versa. It also supports memory to memory data transfer. | |
651 | ||
3c216190 | 652 | config TEGRA20_APB_DMA |
703b70f4 | 653 | tristate "NVIDIA Tegra20 APB DMA support" |
6c41ac96 | 654 | depends on ARCH_TEGRA || COMPILE_TEST |
7bedaa55 | 655 | select DMA_ENGINE |
3c216190 VK |
656 | help |
657 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
658 | DMA controller is having multiple DMA channel which can be | |
659 | configured for different peripherals like audio, UART, SPI, | |
660 | I2C etc which is in APB bus. | |
661 | This DMA controller transfers data from memory to peripheral fifo | |
662 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 663 | |
f46b1957 | 664 | config TEGRA210_ADMA |
3ed16793 | 665 | tristate "NVIDIA Tegra210 ADMA support" |
3145d73e | 666 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) |
f46b1957 JH |
667 | select DMA_ENGINE |
668 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
669 | help |
670 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
671 | DMA controller has multiple DMA channels and is used to service | |
672 | various audio clients in the Tegra210 audio processing engine | |
673 | (APE). This DMA controller transfers data from memory to | |
674 | peripheral and vice versa. It does not support memory to | |
675 | memory data transfer. | |
676 | ||
3c216190 VK |
677 | config TIMB_DMA |
678 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 679 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 680 | select DMA_ENGINE |
3c216190 VK |
681 | help |
682 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 683 | |
32e74aab MY |
684 | config UNIPHIER_MDMAC |
685 | tristate "UniPhier MIO DMAC" | |
686 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
687 | depends on OF | |
688 | select DMA_ENGINE | |
689 | select DMA_VIRTUAL_CHANNELS | |
690 | help | |
691 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
692 | UniPhier platform. This DMA controller is used as the external | |
693 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
694 | ||
667b9251 KH |
695 | config UNIPHIER_XDMAC |
696 | tristate "UniPhier XDMAC support" | |
697 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
698 | depends on OF | |
699 | select DMA_ENGINE | |
700 | select DMA_VIRTUAL_CHANNELS | |
701 | help | |
702 | Enable support for the XDMAC (external DMA controller) on the | |
703 | UniPhier platform. This DMA controller can transfer data from | |
704 | memory to memory, memory to peripheral and peripheral to memory. | |
705 | ||
3c216190 VK |
706 | config XGENE_DMA |
707 | tristate "APM X-Gene DMA support" | |
708 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 709 | select DMA_ENGINE |
3c216190 VK |
710 | select DMA_ENGINE_RAID |
711 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 712 | help |
3c216190 | 713 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 714 | |
fde57a7c KA |
715 | config XILINX_DMA |
716 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 717 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
718 | select DMA_ENGINE |
719 | help | |
720 | Enable support for Xilinx AXI VDMA Soft IP. | |
721 | ||
fde57a7c | 722 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
723 | between memory and AXI4-Stream video type target |
724 | peripherals including peripherals which support AXI4- | |
725 | Stream Video Protocol. It has two stream interfaces/ | |
726 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
727 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
728 | AXI CDMA engine provides high-bandwidth direct memory access |
729 | between a memory-mapped source address and a memory-mapped | |
730 | destination address. | |
731 | AXI DMA engine provides high-bandwidth one dimensional direct | |
732 | memory access between memory and AXI4-Stream target peripherals. | |
6ccd692b RSP |
733 | AXI MCDMA engine provides high-bandwidth direct memory access |
734 | between memory and AXI4-Stream target peripherals. It provides | |
735 | the scatter gather interface with multiple channels independent | |
736 | configuration support. | |
9cd4360d | 737 | |
b0cc417c KA |
738 | config XILINX_ZYNQMP_DMA |
739 | tristate "Xilinx ZynqMP DMA Engine" | |
7073b5a8 | 740 | depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST |
b0cc417c KA |
741 | select DMA_ENGINE |
742 | help | |
743 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 744 | |
7cbb0c63 HK |
745 | config XILINX_ZYNQMP_DPDMA |
746 | tristate "Xilinx DPDMA Engine" | |
32828b82 | 747 | depends on HAS_IOMEM && OF |
7cbb0c63 HK |
748 | select DMA_ENGINE |
749 | select DMA_VIRTUAL_CHANNELS | |
750 | help | |
751 | Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option | |
752 | if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The | |
753 | driver provides the dmaengine required by the DisplayPort subsystem | |
754 | display driver. | |
755 | ||
3c216190 VK |
756 | # driver files |
757 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 758 | |
548c4597 SW |
759 | source "drivers/dma/mediatek/Kconfig" |
760 | ||
fa5d823b SM |
761 | source "drivers/dma/ptdma/Kconfig" |
762 | ||
d9b31efc SK |
763 | source "drivers/dma/qcom/Kconfig" |
764 | ||
3c216190 | 765 | source "drivers/dma/dw/Kconfig" |
50437bff | 766 | |
e63d79d1 GP |
767 | source "drivers/dma/dw-edma/Kconfig" |
768 | ||
3c216190 | 769 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 770 | |
6973886a GW |
771 | source "drivers/dma/sf-pdma/Kconfig" |
772 | ||
3c216190 | 773 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 774 | |
d88b1397 PU |
775 | source "drivers/dma/ti/Kconfig" |
776 | ||
7fdf9b05 PM |
777 | source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
778 | ||
32d31c79 AM |
779 | source "drivers/dma/lgm/Kconfig" |
780 | ||
3c216190 | 781 | # clients |
db217334 | 782 | comment "DMA Clients" |
2ed6dc34 | 783 | depends on DMA_ENGINE |
db217334 | 784 | |
729b5d1b DW |
785 | config ASYNC_TX_DMA |
786 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 787 | depends on DMA_ENGINE |
729b5d1b DW |
788 | help |
789 | This allows the async_tx api to take advantage of offload engines for | |
790 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
791 | a dma engine that can perform raid operations and you have enabled | |
792 | MD_RAID456 say Y. | |
793 | ||
794 | If unsure, say N. | |
795 | ||
4a776f0a HS |
796 | config DMATEST |
797 | tristate "DMA Test client" | |
798 | depends on DMA_ENGINE | |
58532e66 | 799 | select DMA_ENGINE_RAID |
4a776f0a HS |
800 | help |
801 | Simple DMA test client. Say N unless you're debugging a | |
802 | DMA Device driver. | |
803 | ||
3cc377b9 DW |
804 | config DMA_ENGINE_RAID |
805 | bool | |
806 | ||
2ed6dc34 | 807 | endif |