Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 | 17 | config DMADEVICES_DEBUG |
67805a4b KK |
18 | bool "DMA Engine debugging" |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
6c664a89 LW |
23 | |
24 | config DMADEVICES_VDEBUG | |
67805a4b KK |
25 | bool "DMA Engine verbose debugging" |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
6c664a89 LW |
31 | |
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
253697b9 | 62 | depends on HAS_IOMEM |
a85c6f1b SR |
63 | select DMA_ENGINE |
64 | help | |
65 | Enable support for Altera / Intel mSGDMA controller. | |
66 | ||
e8689e63 LW |
67 | config AMBA_PL08X |
68 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 69 | depends on ARM_AMBA |
e8689e63 | 70 | select DMA_ENGINE |
083be28a | 71 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 72 | help |
1e1cfc72 LW |
73 | Say yes if your platform has a PL08x DMAC device which can |
74 | provide DMA engine support. This includes the original ARM | |
75 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
76 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 77 | |
3c216190 VK |
78 | config AMCC_PPC440SPE_ADMA |
79 | tristate "AMCC PPC440SPe ADMA support" | |
80 | depends on 440SPe || 440SP | |
2ed6dc34 | 81 | select DMA_ENGINE |
3cc377b9 | 82 | select DMA_ENGINE_RAID |
3c216190 | 83 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 84 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 85 | help |
3c216190 | 86 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 87 | |
b127315d MP |
88 | config APPLE_ADMAC |
89 | tristate "Apple ADMAC support" | |
90 | depends on ARCH_APPLE || COMPILE_TEST | |
91 | select DMA_ENGINE | |
92 | default ARCH_APPLE | |
93 | help | |
94 | Enable support for Audio DMA Controller found on Apple Silicon SoCs. | |
95 | ||
dc78baa2 NF |
96 | config AT_HDMAC |
97 | tristate "Atmel AHB DMA support" | |
f898fed0 | 98 | depends on ARCH_AT91 |
dc78baa2 | 99 | select DMA_ENGINE |
ac803b56 | 100 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 101 | help |
f898fed0 | 102 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 103 | |
e1f7c9ee LD |
104 | config AT_XDMAC |
105 | tristate "Atmel XDMA support" | |
6e5ae29b | 106 | depends on ARCH_AT91 |
e1f7c9ee LD |
107 | select DMA_ENGINE |
108 | help | |
109 | Support the Atmel XDMA controller. | |
2ed6dc34 | 110 | |
3c216190 VK |
111 | config AXI_DMAC |
112 | tristate "Analog Devices AXI-DMAC DMA support" | |
5c038872 | 113 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 114 | select DMA_ENGINE |
3c216190 | 115 | select DMA_VIRTUAL_CHANNELS |
fc15be39 | 116 | select REGMAP_MMIO |
2ed6dc34 | 117 | help |
3c216190 | 118 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
2fea2906 | 119 | controller is often used in Analog Devices' reference designs for FPGA |
3c216190 | 120 | platforms. |
c13c8260 | 121 | |
743e1c8f AP |
122 | config BCM_SBA_RAID |
123 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
124 | depends on ARM64 || COMPILE_TEST |
125 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
126 | select DMA_ENGINE |
127 | select DMA_ENGINE_RAID | |
128 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
129 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 130 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
131 | help |
132 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
133 | engine is available on most of the Broadcom iProc SoCs. It | |
134 | has the capability to offload memcpy, xor and pq computation | |
135 | for raid5/6. | |
136 | ||
3c216190 VK |
137 | config DMA_BCM2835 |
138 | tristate "BCM2835 DMA engine support" | |
139 | depends on ARCH_BCM2835 | |
140 | select DMA_ENGINE | |
141 | select DMA_VIRTUAL_CHANNELS | |
142 | ||
3c216190 VK |
143 | config DMA_JZ4780 |
144 | tristate "JZ4780 DMA support" | |
c558ecd2 | 145 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
146 | select DMA_ENGINE |
147 | select DMA_VIRTUAL_CHANNELS | |
148 | help | |
3c216190 VK |
149 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
150 | If you have a board based on such a SoC and wish to use DMA for | |
151 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 152 | |
3c216190 VK |
153 | config DMA_SA11X0 |
154 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 155 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 156 | select DMA_ENGINE |
3c216190 | 157 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 158 | help |
3c216190 VK |
159 | Support the DMA engine found on Intel StrongARM SA-1100 and |
160 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
161 | devices. | |
dc78baa2 | 162 | |
3c216190 VK |
163 | config DMA_SUN4I |
164 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 165 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 166 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 167 | select DMA_ENGINE |
3c216190 | 168 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 169 | help |
3c216190 VK |
170 | Enable support for the DMA controller present in the sun4i, |
171 | sun5i and sun7i Allwinner ARM SoCs. | |
172 | ||
173 | config DMA_SUN6I | |
174 | tristate "Allwinner A31 SoCs DMA support" | |
8292a155 | 175 | depends on ARCH_SUNXI || COMPILE_TEST |
3c216190 VK |
176 | depends on RESET_CONTROLLER |
177 | select DMA_ENGINE | |
178 | select DMA_VIRTUAL_CHANNELS | |
179 | help | |
180 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
181 | ||
1fe20f1b EP |
182 | config DW_AXI_DMAC |
183 | tristate "Synopsys DesignWare AXI DMA support" | |
84dd3b2b | 184 | depends on OF |
cd0f00c3 | 185 | depends on HAS_IOMEM |
1fe20f1b EP |
186 | select DMA_ENGINE |
187 | select DMA_VIRTUAL_CHANNELS | |
188 | help | |
189 | Enable support for Synopsys DesignWare AXI DMA controller. | |
190 | NOTE: This driver wasn't tested on 64 bit platform because | |
191 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
192 | ||
3c216190 VK |
193 | config EP93XX_DMA |
194 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 195 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
196 | select DMA_ENGINE |
197 | help | |
198 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 199 | |
173acc7c | 200 | config FSL_DMA |
8de7a7d9 | 201 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 202 | depends on FSL_SOC |
173acc7c | 203 | select DMA_ENGINE |
5fc6d897 | 204 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
a7f7f624 | 205 | help |
8de7a7d9 HZ |
206 | Enable support for the Freescale Elo series DMA controllers. |
207 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
208 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
209 | some Txxx and Bxxx parts. | |
173acc7c | 210 | |
3c216190 VK |
211 | config FSL_EDMA |
212 | tristate "Freescale eDMA engine support" | |
213 | depends on OF | |
b1e213a9 | 214 | depends on HAS_IOMEM |
3c216190 VK |
215 | select DMA_ENGINE |
216 | select DMA_VIRTUAL_CHANNELS | |
217 | help | |
218 | Support the Freescale eDMA engine with programmable channel | |
219 | multiplexing capability for DMA request sources(slot). | |
220 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
221 | ||
b092529e | 222 | config FSL_QDMA |
67805a4b KK |
223 | tristate "NXP Layerscape qDMA engine support" |
224 | depends on ARM || ARM64 | |
225 | select DMA_ENGINE | |
226 | select DMA_VIRTUAL_CHANNELS | |
227 | select DMA_ENGINE_RAID | |
228 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
229 | help | |
230 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
231 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
232 | or dequeuing DMA jobs from, different work queues. | |
233 | This module can be found on NXP Layerscape SoCs. | |
b092529e PM |
234 | The qdma driver only work on SoCs with a DPAA hardware block. |
235 | ||
ad80da65 | 236 | config FSL_RAID |
67805a4b KK |
237 | tristate "Freescale RAID engine Support" |
238 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
239 | select DMA_ENGINE | |
240 | select DMA_ENGINE_RAID | |
a7f7f624 | 241 | help |
67805a4b KK |
242 | Enable support for Freescale RAID Engine. RAID Engine is |
243 | available on some QorIQ SoCs (like P5020/P5040). It has | |
244 | the capability to offload memcpy, xor and pq computation | |
ad80da65 XS |
245 | for raid5/6. |
246 | ||
e9f08b65 ZW |
247 | config HISI_DMA |
248 | tristate "HiSilicon DMA Engine support" | |
dcca9d04 | 249 | depends on ARCH_HISI || COMPILE_TEST |
ae148b43 | 250 | depends on PCI_MSI |
e9f08b65 ZW |
251 | select DMA_ENGINE |
252 | select DMA_VIRTUAL_CHANNELS | |
253 | help | |
254 | Support HiSilicon Kunpeng DMA engine. | |
255 | ||
3c216190 VK |
256 | config IMG_MDC_DMA |
257 | tristate "IMG MDC support" | |
258 | depends on MIPS || COMPILE_TEST | |
259 | depends on MFD_SYSCON | |
0fb6f739 | 260 | select DMA_ENGINE |
3c216190 VK |
261 | select DMA_VIRTUAL_CHANNELS |
262 | help | |
263 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 264 | |
3c216190 VK |
265 | config IMX_DMA |
266 | tristate "i.MX DMA support" | |
8e2d41f8 | 267 | depends on ARCH_MXC |
ff7b0479 | 268 | select DMA_ENGINE |
5296b56d | 269 | help |
3c216190 VK |
270 | Support the i.MX DMA engine. This engine is integrated into |
271 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 272 | |
3c216190 VK |
273 | config IMX_SDMA |
274 | tristate "i.MX SDMA support" | |
8e2d41f8 | 275 | depends on ARCH_MXC |
5296b56d | 276 | select DMA_ENGINE |
57b772b8 | 277 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 278 | help |
3c216190 VK |
279 | Support the i.MX SDMA engine. This engine is integrated into |
280 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 281 | |
9ab8b4e7 | 282 | config INTEL_IDMA64 |
35271227 | 283 | tristate "Intel integrated DMA 64-bit support" |
b1e213a9 | 284 | depends on HAS_IOMEM |
35271227 LT |
285 | select DMA_ENGINE |
286 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 287 | help |
35271227 LT |
288 | Enable DMA support for Intel Low Power Subsystem such as found on |
289 | Intel Skylake PCH. | |
5296b56d | 290 | |
d9e5481f DJ |
291 | config INTEL_IDXD_BUS |
292 | tristate | |
293 | default INTEL_IDXD | |
294 | ||
bfe1d560 DJ |
295 | config INTEL_IDXD |
296 | tristate "Intel Data Accelerators support" | |
b2296eea | 297 | depends on PCI && X86_64 && !UML |
d6a7bb86 | 298 | depends on PCI_MSI |
d8071323 | 299 | depends on PCI_PASID |
0705107f | 300 | depends on SBITMAP |
bfe1d560 | 301 | select DMA_ENGINE |
bfe1d560 DJ |
302 | help |
303 | Enable support for the Intel(R) data accelerators present | |
304 | in Intel Xeon CPU. | |
305 | ||
306 | Say Y if you have such a platform. | |
307 | ||
308 | If unsure, say N. | |
309 | ||
6e7f3ee9 DJ |
310 | config INTEL_IDXD_COMPAT |
311 | bool "Legacy behavior for idxd driver" | |
312 | depends on PCI && X86_64 | |
313 | select INTEL_IDXD_BUS | |
314 | help | |
315 | Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior. | |
316 | The old behavior performed driver bind/unbind for device and wq | |
317 | devices all under the dsa driver. The compat driver will emulate | |
318 | the legacy behavior in order to allow existing support apps (i.e. | |
319 | accel-config) to continue function. It is expected that accel-config | |
320 | v3.2 and earlier will need the compat mode. A distro with later | |
321 | accel-config version can disable this compat config. | |
322 | ||
323 | Say Y if you have old applications that require such behavior. | |
324 | ||
325 | If unsure, say N. | |
326 | ||
8e50d392 DJ |
327 | # Config symbol that collects all the dependencies that's necessary to |
328 | # support shared virtual memory for the devices supported by idxd. | |
329 | config INTEL_IDXD_SVM | |
330 | bool "Accelerator Shared Virtual Memory Support" | |
331 | depends on INTEL_IDXD | |
332 | depends on INTEL_IOMMU_SVM | |
333 | depends on PCI_PRI | |
334 | depends on PCI_PASID | |
335 | depends on PCI_IOV | |
336 | ||
81dd4d4d TZ |
337 | config INTEL_IDXD_PERFMON |
338 | bool "Intel Data Accelerators performance monitor support" | |
339 | depends on INTEL_IDXD | |
340 | help | |
341 | Enable performance monitor (pmu) support for the Intel(R) | |
342 | data accelerators present in Intel Xeon CPU. With this | |
343 | enabled, perf can be used to monitor the DSA (Intel Data | |
344 | Streaming Accelerator) events described in the Intel DSA | |
345 | spec. | |
346 | ||
347 | If unsure, say N. | |
348 | ||
3c216190 VK |
349 | config INTEL_IOATDMA |
350 | tristate "Intel I/OAT DMA support" | |
bbac7a92 | 351 | depends on PCI && X86_64 && !UML |
a57e16cf | 352 | select DMA_ENGINE |
3c216190 VK |
353 | select DMA_ENGINE_RAID |
354 | select DCA | |
a57e16cf | 355 | help |
3c216190 VK |
356 | Enable support for the Intel(R) I/OAT DMA engine present |
357 | in recent Intel Xeon chipsets. | |
a57e16cf | 358 | |
3c216190 VK |
359 | Say Y here if you have such a chipset. |
360 | ||
361 | If unsure, say N. | |
362 | ||
3c216190 VK |
363 | config K3_DMA |
364 | tristate "Hisilicon K3 DMA support" | |
65b87548 | 365 | depends on ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
366 | select DMA_ENGINE |
367 | select DMA_VIRTUAL_CHANNELS | |
368 | help | |
3c216190 VK |
369 | Support the DMA engine for Hisilicon K3 platform |
370 | devices. | |
ddeccb8d | 371 | |
3c216190 VK |
372 | config LPC18XX_DMAMUX |
373 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
374 | depends on ARCH_LPC18XX || COMPILE_TEST | |
375 | depends on OF && AMBA_PL08X | |
376 | select MFD_SYSCON | |
377 | help | |
378 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
379 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 380 | |
71e7d3cb BZ |
381 | config LS2X_APB_DMA |
382 | tristate "Loongson LS2X APB DMA support" | |
383 | depends on LOONGARCH || COMPILE_TEST | |
384 | select DMA_ENGINE | |
385 | select DMA_VIRTUAL_CHANNELS | |
386 | help | |
387 | Support for the Loongson LS2X APB DMA controller driver. The | |
388 | DMA controller is having single DMA channel which can be | |
389 | configured for different peripherals like audio, nand, sdio | |
390 | etc which is in APB bus. | |
391 | ||
392 | This DMA controller transfers data from memory to peripheral fifo. | |
393 | It does not support memory to memory data transfer. | |
394 | ||
e7a3ff92 AD |
395 | config MCF_EDMA |
396 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
397 | depends on M5441x || COMPILE_TEST | |
398 | select DMA_ENGINE | |
399 | select DMA_VIRTUAL_CHANNELS | |
400 | help | |
401 | Support the Freescale ColdFire eDMA engine, 64-channel | |
402 | implementation that performs complex data transfers with | |
403 | minimal intervention from a host processor. | |
404 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
405 | ||
6c3214e6 JB |
406 | config MILBEAUT_HDMAC |
407 | tristate "Milbeaut AHB DMA support" | |
408 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
409 | depends on OF | |
410 | select DMA_ENGINE | |
411 | select DMA_VIRTUAL_CHANNELS | |
412 | help | |
413 | Say yes here to support the Socionext Milbeaut | |
414 | HDMAC device. | |
415 | ||
a6e9be05 JB |
416 | config MILBEAUT_XDMAC |
417 | tristate "Milbeaut AXI DMA support" | |
418 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
419 | depends on OF | |
420 | select DMA_ENGINE | |
421 | select DMA_VIRTUAL_CHANNELS | |
422 | help | |
423 | Say yes here to support the Socionext Milbeaut | |
424 | XDMAC device. | |
425 | ||
3c216190 | 426 | config MMP_PDMA |
793dff4b | 427 | tristate "MMP PDMA support" |
cd3a792a | 428 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 429 | select DMA_ENGINE |
61f135b9 | 430 | help |
3c216190 | 431 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 432 | |
3c216190 | 433 | config MMP_TDMA |
9f3c14d4 | 434 | tristate "MMP Two-Channel DMA support" |
93d05f1e | 435 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 436 | select DMA_ENGINE |
d6619761 | 437 | select GENERIC_ALLOCATOR |
8d318a50 | 438 | help |
3c216190 VK |
439 | Support the MMP Two-Channel DMA engine. |
440 | This engine used for MMP Audio DMA and pxa910 SQU. | |
8d318a50 | 441 | |
3c216190 VK |
442 | config MOXART_DMA |
443 | tristate "MOXART DMA support" | |
444 | depends on ARCH_MOXART | |
12458ea0 | 445 | select DMA_ENGINE |
3c216190 | 446 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 447 | help |
3c216190 VK |
448 | Enable support for the MOXA ART SoC DMA controller. |
449 | ||
450 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 451 | |
3c216190 VK |
452 | config MPC512X_DMA |
453 | tristate "Freescale MPC512x built-in DMA engine support" | |
454 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 455 | select DMA_ENGINE |
a7f7f624 | 456 | help |
3c216190 | 457 | Enable support for the Freescale MPC512x built-in DMA engine. |
de5d4453 | 458 | |
3c216190 VK |
459 | config MV_XOR |
460 | bool "Marvell XOR engine support" | |
c39290a1 | 461 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 462 | select DMA_ENGINE |
3c216190 VK |
463 | select DMA_ENGINE_RAID |
464 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
a7f7f624 | 465 | help |
3c216190 | 466 | Enable support for the Marvell XOR engine. |
ca21a146 | 467 | |
19a340b1 TP |
468 | config MV_XOR_V2 |
469 | bool "Marvell XOR engine version 2 support " | |
470 | depends on ARM64 | |
471 | select DMA_ENGINE | |
472 | select DMA_ENGINE_RAID | |
473 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
13e7accb | 474 | select GENERIC_MSI_IRQ |
a7f7f624 | 475 | help |
19a340b1 TP |
476 | Enable support for the Marvell version 2 XOR engine. |
477 | ||
478 | This engine provides acceleration for copy, XOR and RAID6 | |
479 | operations, and is available on Marvell Armada 7K and 8K | |
480 | platforms. | |
481 | ||
3c216190 VK |
482 | config MXS_DMA |
483 | bool "MXS DMA support" | |
d762e4f3 | 484 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 485 | select STMP_DEVICE |
ca21a146 RY |
486 | select DMA_ENGINE |
487 | help | |
3c216190 | 488 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 489 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 490 | |
3c216190 VK |
491 | config NBPFAXI_DMA |
492 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 493 | select DMA_ENGINE |
3c216190 | 494 | depends on ARM || COMPILE_TEST |
b3040e40 | 495 | help |
3c216190 | 496 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 497 | |
47e20577 MS |
498 | config OWL_DMA |
499 | tristate "Actions Semi Owl SoCs DMA support" | |
500 | depends on ARCH_ACTIONS | |
501 | select DMA_ENGINE | |
502 | select DMA_VIRTUAL_CHANNELS | |
503 | help | |
504 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
505 | ||
0c42bd0e | 506 | config PCH_DMA |
ca7fe2db | 507 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 508 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
509 | select DMA_ENGINE |
510 | help | |
2cdf2455 TM |
511 | Enable support for Intel EG20T PCH DMA engine. |
512 | ||
e79e72be | 513 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
514 | Output Hub), ML7213, ML7223 and ML7831. |
515 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
516 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
517 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
518 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 519 | |
3c216190 VK |
520 | config PL330_DMA |
521 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 522 | select DMA_ENGINE |
3c216190 | 523 | depends on ARM_AMBA |
1ec1e82f | 524 | help |
3c216190 VK |
525 | Select if your platform has one or more PL330 DMACs. |
526 | You need to provide platform specific settings via | |
527 | platform_data for a dma-pl330 device. | |
1ec1e82f | 528 | |
3c216190 VK |
529 | config PXA_DMA |
530 | bool "PXA DMA support" | |
531 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 532 | select DMA_ENGINE |
3c216190 | 533 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 534 | help |
3c216190 VK |
535 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
536 | platform. The internal DMA IP of all PXA variants is supported, with | |
537 | 16 to 32 channels for peripheral to memory or memory to memory | |
538 | transfers. | |
1f1846c6 | 539 | |
905ca51e LG |
540 | config PLX_DMA |
541 | tristate "PLX ExpressLane PEX Switch DMA Engine Support" | |
542 | depends on PCI | |
543 | select DMA_ENGINE | |
544 | help | |
545 | Some PLX ExpressLane PCI Switches support additional DMA engines. | |
546 | These are exposed via extra functions on the switch's | |
547 | upstream port. Each function exposes one DMA channel. | |
548 | ||
3c216190 VK |
549 | config STE_DMA40 |
550 | bool "ST-Ericsson DMA40 support" | |
551 | depends on ARCH_U8500 | |
760ee1c4 | 552 | select DMA_ENGINE |
5a1a3b9c | 553 | select SRAM |
760ee1c4 | 554 | help |
3c216190 | 555 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 556 | |
6b4cd727 PG |
557 | config ST_FDMA |
558 | tristate "ST FDMA dmaengine support" | |
559 | depends on ARCH_STI | |
3d6b3715 | 560 | depends on REMOTEPROC |
6b4cd727 PG |
561 | select ST_SLIM_REMOTEPROC |
562 | select DMA_ENGINE | |
563 | select DMA_VIRTUAL_CHANNELS | |
564 | help | |
565 | Enable support for ST FDMA controller. | |
566 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
567 | ||
568 | Say Y here if you have such a chipset. | |
569 | If unsure, say N. | |
570 | ||
d8b46839 CM |
571 | config STM32_DMA |
572 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 573 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 574 | select DMA_ENGINE |
d8b46839 CM |
575 | select DMA_VIRTUAL_CHANNELS |
576 | help | |
577 | Enable support for the on-chip DMA controller on STMicroelectronics | |
578 | STM32 MCUs. | |
ddf9bd40 | 579 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
580 | here. |
581 | ||
df7e762d PYM |
582 | config STM32_DMAMUX |
583 | bool "STMicroelectronics STM32 dma multiplexer support" | |
584 | depends on STM32_DMA || COMPILE_TEST | |
585 | help | |
586 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
587 | STM32 MCUs. | |
588 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
589 | here. | |
590 | ||
a4ffb13c PYM |
591 | config STM32_MDMA |
592 | bool "STMicroelectronics STM32 master dma support" | |
593 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 594 | depends on OF |
a4ffb13c | 595 | select DMA_ENGINE |
a4ffb13c PYM |
596 | select DMA_VIRTUAL_CHANNELS |
597 | help | |
598 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
599 | STM32 platforms. | |
600 | If you have a board based on STM32 SoC and wish to use the master DMA | |
601 | say Y here. | |
602 | ||
9b3b8171 BW |
603 | config SPRD_DMA |
604 | tristate "Spreadtrum DMA support" | |
605 | depends on ARCH_SPRD || COMPILE_TEST | |
606 | select DMA_ENGINE | |
607 | select DMA_VIRTUAL_CHANNELS | |
608 | help | |
609 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
610 | ||
3c216190 VK |
611 | config TXX9_DMAC |
612 | tristate "Toshiba TXx9 SoC DMA support" | |
455481fc | 613 | depends on MACH_TX49XX |
c6da0ba8 ZG |
614 | select DMA_ENGINE |
615 | help | |
3c216190 VK |
616 | Support the TXx9 SoC internal DMA controller. This can be |
617 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 618 | |
ee170280 A |
619 | config TEGRA186_GPC_DMA |
620 | tristate "NVIDIA Tegra GPC DMA support" | |
621 | depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT | |
2cdd3ca6 | 622 | depends on IOMMU_API |
ee170280 | 623 | select DMA_ENGINE |
7511f287 | 624 | select DMA_VIRTUAL_CHANNELS |
ee170280 A |
625 | help |
626 | Support for the NVIDIA Tegra General Purpose Central DMA controller. | |
627 | The DMA controller has multiple DMA channels which can be configured | |
628 | for different peripherals like UART, SPI, etc which are on APB bus. | |
629 | This DMA controller transfers data from memory to peripheral FIFO | |
630 | or vice versa. It also supports memory to memory data transfer. | |
631 | ||
3c216190 | 632 | config TEGRA20_APB_DMA |
703b70f4 | 633 | tristate "NVIDIA Tegra20 APB DMA support" |
6c41ac96 | 634 | depends on ARCH_TEGRA || COMPILE_TEST |
7bedaa55 | 635 | select DMA_ENGINE |
3c216190 VK |
636 | help |
637 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
638 | DMA controller is having multiple DMA channel which can be | |
639 | configured for different peripherals like audio, UART, SPI, | |
640 | I2C etc which is in APB bus. | |
641 | This DMA controller transfers data from memory to peripheral fifo | |
642 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 643 | |
f46b1957 | 644 | config TEGRA210_ADMA |
3ed16793 | 645 | tristate "NVIDIA Tegra210 ADMA support" |
33b7db45 | 646 | depends on (ARCH_TEGRA || COMPILE_TEST) |
f46b1957 JH |
647 | select DMA_ENGINE |
648 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 | 649 | help |
33b7db45 PR |
650 | Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA |
651 | controller driver. The DMA controller has multiple DMA channels | |
652 | and is used to service various audio clients in the Tegra210 | |
653 | audio processing engine (APE). This DMA controller transfers | |
654 | data from memory to peripheral and vice versa. It does not | |
655 | support memory to memory data transfer. | |
f46b1957 | 656 | |
3c216190 VK |
657 | config TIMB_DMA |
658 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 659 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 660 | select DMA_ENGINE |
3c216190 VK |
661 | help |
662 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 663 | |
32e74aab MY |
664 | config UNIPHIER_MDMAC |
665 | tristate "UniPhier MIO DMAC" | |
666 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
667 | depends on OF | |
668 | select DMA_ENGINE | |
669 | select DMA_VIRTUAL_CHANNELS | |
670 | help | |
671 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
672 | UniPhier platform. This DMA controller is used as the external | |
673 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
674 | ||
667b9251 KH |
675 | config UNIPHIER_XDMAC |
676 | tristate "UniPhier XDMAC support" | |
677 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
678 | depends on OF | |
679 | select DMA_ENGINE | |
680 | select DMA_VIRTUAL_CHANNELS | |
681 | help | |
682 | Enable support for the XDMAC (external DMA controller) on the | |
683 | UniPhier platform. This DMA controller can transfer data from | |
684 | memory to memory, memory to peripheral and peripheral to memory. | |
685 | ||
3c216190 VK |
686 | config XGENE_DMA |
687 | tristate "APM X-Gene DMA support" | |
688 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 689 | select DMA_ENGINE |
3c216190 VK |
690 | select DMA_ENGINE_RAID |
691 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 692 | help |
3c216190 | 693 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 694 | |
fde57a7c KA |
695 | config XILINX_DMA |
696 | tristate "Xilinx AXI DMAS Engine" | |
1b13e52c | 697 | depends on HAS_IOMEM |
9cd4360d ST |
698 | select DMA_ENGINE |
699 | help | |
700 | Enable support for Xilinx AXI VDMA Soft IP. | |
701 | ||
fde57a7c | 702 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
703 | between memory and AXI4-Stream video type target |
704 | peripherals including peripherals which support AXI4- | |
705 | Stream Video Protocol. It has two stream interfaces/ | |
706 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
707 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
708 | AXI CDMA engine provides high-bandwidth direct memory access |
709 | between a memory-mapped source address and a memory-mapped | |
710 | destination address. | |
711 | AXI DMA engine provides high-bandwidth one dimensional direct | |
712 | memory access between memory and AXI4-Stream target peripherals. | |
6ccd692b RSP |
713 | AXI MCDMA engine provides high-bandwidth direct memory access |
714 | between memory and AXI4-Stream target peripherals. It provides | |
715 | the scatter gather interface with multiple channels independent | |
716 | configuration support. | |
9cd4360d | 717 | |
17ce2522 LH |
718 | config XILINX_XDMA |
719 | tristate "Xilinx DMA/Bridge Subsystem DMA Engine" | |
720 | depends on HAS_IOMEM | |
721 | select DMA_ENGINE | |
722 | select DMA_VIRTUAL_CHANNELS | |
723 | select REGMAP_MMIO | |
724 | help | |
725 | Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA | |
726 | provides high performance block data movement between Host memory | |
727 | and the DMA subsystem. These direct memory transfers can be both in | |
728 | the Host to Card (H2C) and Card to Host (C2H) transfers. | |
729 | The core also provides up to 16 user interrupt wires that generate | |
730 | interrupts to the host. | |
731 | ||
b0cc417c KA |
732 | config XILINX_ZYNQMP_DMA |
733 | tristate "Xilinx ZynqMP DMA Engine" | |
7073b5a8 | 734 | depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST |
b0cc417c KA |
735 | select DMA_ENGINE |
736 | help | |
737 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 738 | |
7cbb0c63 HK |
739 | config XILINX_ZYNQMP_DPDMA |
740 | tristate "Xilinx DPDMA Engine" | |
32828b82 | 741 | depends on HAS_IOMEM && OF |
7cbb0c63 HK |
742 | select DMA_ENGINE |
743 | select DMA_VIRTUAL_CHANNELS | |
744 | help | |
745 | Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option | |
746 | if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The | |
747 | driver provides the dmaengine required by the DisplayPort subsystem | |
748 | display driver. | |
749 | ||
3c216190 VK |
750 | # driver files |
751 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 752 | |
548c4597 SW |
753 | source "drivers/dma/mediatek/Kconfig" |
754 | ||
fa5d823b SM |
755 | source "drivers/dma/ptdma/Kconfig" |
756 | ||
d9b31efc SK |
757 | source "drivers/dma/qcom/Kconfig" |
758 | ||
3c216190 | 759 | source "drivers/dma/dw/Kconfig" |
50437bff | 760 | |
e63d79d1 GP |
761 | source "drivers/dma/dw-edma/Kconfig" |
762 | ||
3c216190 | 763 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 764 | |
6973886a GW |
765 | source "drivers/dma/sf-pdma/Kconfig" |
766 | ||
3c216190 | 767 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 768 | |
d88b1397 PU |
769 | source "drivers/dma/ti/Kconfig" |
770 | ||
7fdf9b05 PM |
771 | source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
772 | ||
32d31c79 AM |
773 | source "drivers/dma/lgm/Kconfig" |
774 | ||
3c216190 | 775 | # clients |
db217334 | 776 | comment "DMA Clients" |
2ed6dc34 | 777 | depends on DMA_ENGINE |
db217334 | 778 | |
729b5d1b DW |
779 | config ASYNC_TX_DMA |
780 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 781 | depends on DMA_ENGINE |
729b5d1b DW |
782 | help |
783 | This allows the async_tx api to take advantage of offload engines for | |
784 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
785 | a dma engine that can perform raid operations and you have enabled | |
786 | MD_RAID456 say Y. | |
787 | ||
788 | If unsure, say N. | |
789 | ||
4a776f0a HS |
790 | config DMATEST |
791 | tristate "DMA Test client" | |
792 | depends on DMA_ENGINE | |
58532e66 | 793 | select DMA_ENGINE_RAID |
4a776f0a HS |
794 | help |
795 | Simple DMA test client. Say N unless you're debugging a | |
796 | DMA Device driver. | |
797 | ||
3cc377b9 DW |
798 | config DMA_ENGINE_RAID |
799 | bool | |
800 | ||
2ed6dc34 | 801 | endif |