[linux-2.6-block.git] / drivers / crypto / qat / qat_common / adf_aer.c

/*
  This file is provided under a dual BSD/GPLv2 license.  When using or
  redistributing this file, you may do so under either license.

  GPL LICENSE SUMMARY
  Copyright(c) 2014 Intel Corporation.
  This program is free software; you can redistribute it and/or modify
  it under the terms of version 2 of the GNU General Public License as
  published by the Free Software Foundation.

  This program is distributed in the hope that it will be useful, but
  WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  General Public License for more details.

  Contact Information:
  qat-linux@intel.com

  BSD LICENSE
  Copyright(c) 2014 Intel Corporation.
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions
  are met:

    * Redistributions of source code must retain the above copyright
      notice, this list of conditions and the following disclaimer.
    * Redistributions in binary form must reproduce the above copyright
      notice, this list of conditions and the following disclaimer in
      the documentation and/or other materials provided with the
      distribution.
    * Neither the name of Intel Corporation nor the names of its
      contributors may be used to endorse or promote products derived
      from this software without specific prior written permission.

  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/aer.h>
#include <linux/completion.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include "adf_accel_devices.h"
#include "adf_common_drv.h"

static struct workqueue_struct *device_reset_wq;

static pci_ers_result_t adf_error_detected(struct pci_dev *pdev,
					   pci_channel_state_t state)
{
	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);

	dev_info(&pdev->dev, "Acceleration driver hardware error detected.\n");
	if (!accel_dev) {
		dev_err(&pdev->dev, "Can't find acceleration device\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	if (state == pci_channel_io_perm_failure) {
		dev_err(&pdev->dev, "Can't recover from device error\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	return PCI_ERS_RESULT_NEED_RESET;
}

/* reset dev data */
struct adf_reset_dev_data {
	int mode;
	struct adf_accel_dev *accel_dev;
	struct completion compl;
	struct work_struct reset_work;
};

void adf_dev_restore(struct adf_accel_dev *accel_dev)
{
	struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
	struct pci_dev *parent = pdev->bus->self;
	uint16_t bridge_ctl = 0;

	if (accel_dev->is_vf)
		return;

	dev_info(&GET_DEV(accel_dev), "Resetting device qat_dev%d\n",
		 accel_dev->accel_id);

	if (!parent)
		parent = pdev;

	if (!pci_wait_for_pending_transaction(pdev))
		dev_info(&GET_DEV(accel_dev),
			 "Transaction still in progress. Proceeding\n");

	pci_read_config_word(parent, PCI_BRIDGE_CONTROL, &bridge_ctl);
	bridge_ctl |= PCI_BRIDGE_CTL_BUS_RESET;
	pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
	msleep(100);
	bridge_ctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
	pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
	msleep(100);
	pci_restore_state(pdev);
	pci_save_state(pdev);
}

static void adf_device_reset_worker(struct work_struct *work)
{
	struct adf_reset_dev_data *reset_data =
		  container_of(work, struct adf_reset_dev_data, reset_work);
	struct adf_accel_dev *accel_dev = reset_data->accel_dev;

	adf_dev_restarting_notify(accel_dev);
	adf_dev_stop(accel_dev);
	adf_dev_shutdown(accel_dev);
	if (adf_dev_init(accel_dev) || adf_dev_start(accel_dev)) {
		/* The device hanged and we can't restart it so stop here */
		dev_err(&GET_DEV(accel_dev), "Restart device failed\n");
		kfree(reset_data);
		WARN(1, "QAT: device restart failed. Device is unusable\n");
		return;
	}
	adf_dev_restarted_notify(accel_dev);
	clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status);

	/* The dev is back alive. Notify the caller if in sync mode */
	if (reset_data->mode == ADF_DEV_RESET_SYNC)
		complete(&reset_data->compl);
	else
		kfree(reset_data);
}

static int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev,
				      enum adf_dev_reset_mode mode)
{
	struct adf_reset_dev_data *reset_data;

	if (!adf_dev_started(accel_dev) ||
	    test_bit(ADF_STATUS_RESTARTING, &accel_dev->status))
		return 0;

	set_bit(ADF_STATUS_RESTARTING, &accel_dev->status);
	reset_data = kzalloc(sizeof(*reset_data), GFP_ATOMIC);
	if (!reset_data)
		return -ENOMEM;
	reset_data->accel_dev = accel_dev;
	init_completion(&reset_data->compl);
	reset_data->mode = mode;
	INIT_WORK(&reset_data->reset_work, adf_device_reset_worker);
	queue_work(device_reset_wq, &reset_data->reset_work);

	/* If in sync mode wait for the result */
	if (mode == ADF_DEV_RESET_SYNC) {
		int ret = 0;
		/* Maximum device reset time is 10 seconds */
		unsigned long wait_jiffies = msecs_to_jiffies(10000);
		unsigned long timeout = wait_for_completion_timeout(
				   &reset_data->compl, wait_jiffies);
		if (!timeout) {
			dev_err(&GET_DEV(accel_dev),
				"Reset device timeout expired\n");
			ret = -EFAULT;
		}
		kfree(reset_data);
		return ret;
	}
	return 0;
}

static pci_ers_result_t adf_slot_reset(struct pci_dev *pdev)
{
	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);

	if (!accel_dev) {
		pr_err("QAT: Can't find acceleration device\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}
	pci_cleanup_aer_uncorrect_error_status(pdev);
	if (adf_dev_aer_schedule_reset(accel_dev, ADF_DEV_RESET_SYNC))
		return PCI_ERS_RESULT_DISCONNECT;

	return PCI_ERS_RESULT_RECOVERED;
}

static void adf_resume(struct pci_dev *pdev)
{
	dev_info(&pdev->dev, "Acceleration driver reset completed\n");
	dev_info(&pdev->dev, "Device is up and runnig\n");
}

static const struct pci_error_handlers adf_err_handler = {
	.error_detected = adf_error_detected,
	.slot_reset = adf_slot_reset,
	.resume = adf_resume,
};

/**
 * adf_enable_aer() - Enable Advance Error Reporting for acceleration device
 * @accel_dev:  Pointer to acceleration device.
 * @adf:        PCI device driver owning the given acceleration device.
 *
 * Function enables PCI Advance Error Reporting for the
 * QAT acceleration device accel_dev.
 * To be used by QAT device specific drivers.
 *
 * Return: 0 on success, error code otherwise.
 */
int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf)
{
	struct pci_dev *pdev = accel_to_pci_dev(accel_dev);

	adf->err_handler = &adf_err_handler;
	pci_enable_pcie_error_reporting(pdev);
	return 0;
}
EXPORT_SYMBOL_GPL(adf_enable_aer);

/**
 * adf_disable_aer() - Enable Advance Error Reporting for acceleration device
 * @accel_dev:  Pointer to acceleration device.
 *
 * Function disables PCI Advance Error Reporting for the
 * QAT acceleration device accel_dev.
 * To be used by QAT device specific drivers.
 *
 * Return: void
 */
void adf_disable_aer(struct adf_accel_dev *accel_dev)
{
	struct pci_dev *pdev = accel_to_pci_dev(accel_dev);

	pci_disable_pcie_error_reporting(pdev);
}
EXPORT_SYMBOL_GPL(adf_disable_aer);

int adf_init_aer(void)
{
	device_reset_wq = create_workqueue("qat_device_reset_wq");
	return !device_reset_wq ? -EFAULT : 0;
}

void adf_exit_aer(void)
{
	if (device_reset_wq)
		destroy_workqueue(device_reset_wq);
	device_reset_wq = NULL;
}
Commit	Line	Data
d8cba25d TS	1	/*
	2	This file is provided under a dual BSD/GPLv2 license. When using or
	3	redistributing this file, you may do so under either license.
	4
	5	GPL LICENSE SUMMARY
	6	Copyright(c) 2014 Intel Corporation.
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of version 2 of the GNU General Public License as
	9	published by the Free Software Foundation.
	10
	11	This program is distributed in the hope that it will be useful, but
	12	WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	General Public License for more details.
	15
	16	Contact Information:
	17	qat-linux@intel.com
	18
	19	BSD LICENSE
	20	Copyright(c) 2014 Intel Corporation.
	21	Redistribution and use in source and binary forms, with or without
	22	modification, are permitted provided that the following conditions
	23	are met:
	24
	25	* Redistributions of source code must retain the above copyright
	26	notice, this list of conditions and the following disclaimer.
	27	* Redistributions in binary form must reproduce the above copyright
	28	notice, this list of conditions and the following disclaimer in
	29	the documentation and/or other materials provided with the
	30	distribution.
	31	* Neither the name of Intel Corporation nor the names of its
	32	contributors may be used to endorse or promote products derived
	33	from this software without specific prior written permission.
	34
	35	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	36	"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	37	LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	38	A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	39	OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	40	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	41	LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	42	DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	43	THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	44	(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	45	OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	46	*/
	47	#include <linux/kernel.h>
	48	#include <linux/pci.h>
	49	#include <linux/aer.h>
	50	#include <linux/completion.h>
	51	#include <linux/workqueue.h>
	52	#include <linux/delay.h>
	53	#include "adf_accel_devices.h"
	54	#include "adf_common_drv.h"
	55
	56	static struct workqueue_struct *device_reset_wq;
	57
	58	static pci_ers_result_t adf_error_detected(struct pci_dev *pdev,
	59	pci_channel_state_t state)
	60	{
	61	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
	62
66550304	63	dev_info(&pdev->dev, "Acceleration driver hardware error detected.\n");
d8cba25d	64	if (!accel_dev) {
66550304	65	dev_err(&pdev->dev, "Can't find acceleration device\n");
d8cba25d TS	66	return PCI_ERS_RESULT_DISCONNECT;
	67	}
	68
	69	if (state == pci_channel_io_perm_failure) {
66550304	70	dev_err(&pdev->dev, "Can't recover from device error\n");
d8cba25d TS	71	return PCI_ERS_RESULT_DISCONNECT;
	72	}
	73
	74	return PCI_ERS_RESULT_NEED_RESET;
	75	}
	76
	77	/* reset dev data */
	78	struct adf_reset_dev_data {
	79	int mode;
	80	struct adf_accel_dev *accel_dev;
	81	struct completion compl;
	82	struct work_struct reset_work;
	83	};
	84
1a72d3a6	85	void adf_dev_restore(struct adf_accel_dev *accel_dev)
d8cba25d TS	86	{
	87	struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
	88	struct pci_dev *parent = pdev->bus->self;
a6bcc1e4	89	uint16_t bridge_ctl = 0;
d8cba25d	90
17762c5a CM	91	if (accel_dev->is_vf)
	92	return;
	93
66550304 AB	94	dev_info(&GET_DEV(accel_dev), "Resetting device qat_dev%d\n",
66550304 AB	95	accel_dev->accel_id);
d8cba25d	96
ed8ccaef TS	97	if (!parent)
	98	parent = pdev;
	99
a6bcc1e4	100	if (!pci_wait_for_pending_transaction(pdev))
66550304 AB	101	dev_info(&GET_DEV(accel_dev),
66550304 AB	102	"Transaction still in progress. Proceeding\n");
d8cba25d TS	103
	104	pci_read_config_word(parent, PCI_BRIDGE_CONTROL, &bridge_ctl);
	105	bridge_ctl \|= PCI_BRIDGE_CTL_BUS_RESET;
	106	pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
	107	msleep(100);
	108	bridge_ctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
	109	pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
	110	msleep(100);
	111	pci_restore_state(pdev);
	112	pci_save_state(pdev);
	113	}
	114
	115	static void adf_device_reset_worker(struct work_struct *work)
	116	{
	117	struct adf_reset_dev_data *reset_data =
	118	container_of(work, struct adf_reset_dev_data, reset_work);
	119	struct adf_accel_dev *accel_dev = reset_data->accel_dev;
	120
	121	adf_dev_restarting_notify(accel_dev);
	122	adf_dev_stop(accel_dev);
22e4dda0	123	adf_dev_shutdown(accel_dev);
22e4dda0	124	if (adf_dev_init(accel_dev) \|\| adf_dev_start(accel_dev)) {
d8cba25d TS	125	/* The device hanged and we can't restart it so stop here */
	126	dev_err(&GET_DEV(accel_dev), "Restart device failed\n");
	127	kfree(reset_data);
	128	WARN(1, "QAT: device restart failed. Device is unusable\n");
	129	return;
	130	}
	131	adf_dev_restarted_notify(accel_dev);
	132	clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status);
	133
	134	/* The dev is back alive. Notify the caller if in sync mode */
	135	if (reset_data->mode == ADF_DEV_RESET_SYNC)
	136	complete(&reset_data->compl);
	137	else
	138	kfree(reset_data);
	139	}
	140
	141	static int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev,
	142	enum adf_dev_reset_mode mode)
	143	{
	144	struct adf_reset_dev_data *reset_data;
	145
22e4dda0 AB	146	if (!adf_dev_started(accel_dev) \|\|
22e4dda0 AB	147	test_bit(ADF_STATUS_RESTARTING, &accel_dev->status))
d8cba25d TS	148	return 0;
	149
	150	set_bit(ADF_STATUS_RESTARTING, &accel_dev->status);
	151	reset_data = kzalloc(sizeof(*reset_data), GFP_ATOMIC);
	152	if (!reset_data)
	153	return -ENOMEM;
	154	reset_data->accel_dev = accel_dev;
	155	init_completion(&reset_data->compl);
	156	reset_data->mode = mode;
	157	INIT_WORK(&reset_data->reset_work, adf_device_reset_worker);
	158	queue_work(device_reset_wq, &reset_data->reset_work);
	159
	160	/* If in sync mode wait for the result */
	161	if (mode == ADF_DEV_RESET_SYNC) {
	162	int ret = 0;
	163	/* Maximum device reset time is 10 seconds */
	164	unsigned long wait_jiffies = msecs_to_jiffies(10000);
	165	unsigned long timeout = wait_for_completion_timeout(
	166	&reset_data->compl, wait_jiffies);
	167	if (!timeout) {
66550304 AB	168	dev_err(&GET_DEV(accel_dev),
66550304 AB	169	"Reset device timeout expired\n");
d8cba25d TS	170	ret = -EFAULT;
	171	}
	172	kfree(reset_data);
	173	return ret;
	174	}
	175	return 0;
	176	}
	177
	178	static pci_ers_result_t adf_slot_reset(struct pci_dev *pdev)
	179	{
	180	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
	181
	182	if (!accel_dev) {
	183	pr_err("QAT: Can't find acceleration device\n");
	184	return PCI_ERS_RESULT_DISCONNECT;
	185	}
	186	pci_cleanup_aer_uncorrect_error_status(pdev);
	187	if (adf_dev_aer_schedule_reset(accel_dev, ADF_DEV_RESET_SYNC))
	188	return PCI_ERS_RESULT_DISCONNECT;
	189
	190	return PCI_ERS_RESULT_RECOVERED;
	191	}
	192
	193	static void adf_resume(struct pci_dev *pdev)
	194	{
66550304 AB	195	dev_info(&pdev->dev, "Acceleration driver reset completed\n");
66550304 AB	196	dev_info(&pdev->dev, "Device is up and runnig\n");
d8cba25d TS	197	}
d8cba25d TS	198
202a32f0	199	static const struct pci_error_handlers adf_err_handler = {
d8cba25d TS	200	.error_detected = adf_error_detected,
	201	.slot_reset = adf_slot_reset,
	202	.resume = adf_resume,
	203	};
	204
	205	/**
	206	* adf_enable_aer() - Enable Advance Error Reporting for acceleration device
	207	* @accel_dev: Pointer to acceleration device.
	208	* @adf: PCI device driver owning the given acceleration device.
	209	*
	210	* Function enables PCI Advance Error Reporting for the
	211	* QAT acceleration device accel_dev.
	212	* To be used by QAT device specific drivers.
	213	*
ec0d6fa3	214	* Return: 0 on success, error code otherwise.
d8cba25d TS	215	*/
	216	int adf_enable_aer(struct adf_accel_dev accel_dev, struct pci_driver adf)
	217	{
	218	struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
	219
	220	adf->err_handler = &adf_err_handler;
	221	pci_enable_pcie_error_reporting(pdev);
	222	return 0;
	223	}
	224	EXPORT_SYMBOL_GPL(adf_enable_aer);
	225
	226	/**
	227	* adf_disable_aer() - Enable Advance Error Reporting for acceleration device
	228	* @accel_dev: Pointer to acceleration device.
	229	*
	230	* Function disables PCI Advance Error Reporting for the
	231	* QAT acceleration device accel_dev.
	232	* To be used by QAT device specific drivers.
	233	*
	234	* Return: void
	235	*/
	236	void adf_disable_aer(struct adf_accel_dev *accel_dev)
	237	{
	238	struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
	239
	240	pci_disable_pcie_error_reporting(pdev);
	241	}
	242	EXPORT_SYMBOL_GPL(adf_disable_aer);
	243
	244	int adf_init_aer(void)
	245	{
	246	device_reset_wq = create_workqueue("qat_device_reset_wq");
724c76ce	247	return !device_reset_wq ? -EFAULT : 0;
d8cba25d TS	248	}
	249
	250	void adf_exit_aer(void)
	251	{
	252	if (device_reset_wq)
	253	destroy_workqueue(device_reset_wq);
	254	device_reset_wq = NULL;
	255	}