[linux-2.6-block.git] / drivers / crypto / chelsio / chcr_crypto.h

/*
 * This file is part of the Chelsio T6 Crypto driver for Linux.
 *
 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#ifndef __CHCR_CRYPTO_H__
#define __CHCR_CRYPTO_H__

#define GHASH_BLOCK_SIZE    16
#define GHASH_DIGEST_SIZE   16

#define CCM_B0_SIZE             16
#define CCM_AAD_FIELD_SIZE      2
#define T6_MAX_AAD_SIZE 511


/* Define following if h/w is not dropping the AAD and IV data before
 * giving the processed data
 */

#define CHCR_CRA_PRIORITY 500
#define CHCR_AEAD_PRIORITY 6000
#define CHCR_AES_MAX_KEY_LEN  (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
#define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */

#define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/
#define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/

#define CHCR_GIVENCRYPT_OP 2
/* CPL/SCMD parameters */

#define CHCR_ENCRYPT_OP 0
#define CHCR_DECRYPT_OP 1

#define CHCR_SCMD_SEQ_NO_CTRL_32BIT     1
#define CHCR_SCMD_SEQ_NO_CTRL_48BIT     2
#define CHCR_SCMD_SEQ_NO_CTRL_64BIT     3

#define CHCR_SCMD_PROTO_VERSION_GENERIC 4

#define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0
#define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1

#define CHCR_SCMD_CIPHER_MODE_NOP               0
#define CHCR_SCMD_CIPHER_MODE_AES_CBC           1
#define CHCR_SCMD_CIPHER_MODE_AES_GCM           2
#define CHCR_SCMD_CIPHER_MODE_AES_CTR           3
#define CHCR_SCMD_CIPHER_MODE_GENERIC_AES       4
#define CHCR_SCMD_CIPHER_MODE_AES_XTS           6
#define CHCR_SCMD_CIPHER_MODE_AES_CCM           7

#define CHCR_SCMD_AUTH_MODE_NOP             0
#define CHCR_SCMD_AUTH_MODE_SHA1            1
#define CHCR_SCMD_AUTH_MODE_SHA224          2
#define CHCR_SCMD_AUTH_MODE_SHA256          3
#define CHCR_SCMD_AUTH_MODE_GHASH           4
#define CHCR_SCMD_AUTH_MODE_SHA512_224      5
#define CHCR_SCMD_AUTH_MODE_SHA512_256      6
#define CHCR_SCMD_AUTH_MODE_SHA512_384      7
#define CHCR_SCMD_AUTH_MODE_SHA512_512      8
#define CHCR_SCMD_AUTH_MODE_CBCMAC          9
#define CHCR_SCMD_AUTH_MODE_CMAC            10

#define CHCR_SCMD_HMAC_CTRL_NOP             0
#define CHCR_SCMD_HMAC_CTRL_NO_TRUNC        1
#define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366   2
#define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT     3
#define CHCR_SCMD_HMAC_CTRL_PL1		    4
#define CHCR_SCMD_HMAC_CTRL_PL2		    5
#define CHCR_SCMD_HMAC_CTRL_PL3		    6
#define CHCR_SCMD_HMAC_CTRL_DIV2	    7
#define VERIFY_HW 0
#define VERIFY_SW 1

#define CHCR_SCMD_IVGEN_CTRL_HW             0
#define CHCR_SCMD_IVGEN_CTRL_SW             1
/* This are not really mac key size. They are intermediate values
 * of sha engine and its size
 */
#define CHCR_KEYCTX_MAC_KEY_SIZE_128        0
#define CHCR_KEYCTX_MAC_KEY_SIZE_160        1
#define CHCR_KEYCTX_MAC_KEY_SIZE_192        2
#define CHCR_KEYCTX_MAC_KEY_SIZE_256        3
#define CHCR_KEYCTX_MAC_KEY_SIZE_512        4
#define CHCR_KEYCTX_CIPHER_KEY_SIZE_128     0
#define CHCR_KEYCTX_CIPHER_KEY_SIZE_192     1
#define CHCR_KEYCTX_CIPHER_KEY_SIZE_256     2
#define CHCR_KEYCTX_NO_KEY                  15

#define CHCR_CPL_FW4_PLD_IV_OFFSET          (5 * 64) /* bytes. flt #5 and #6 */
#define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */
#define CHCR_CPL_FW4_PLD_DATA_SIZE          (4 * 64) /* bytes. flt #4 to #7 */

#define KEY_CONTEXT_HDR_SALT_AND_PAD	    16
#define flits_to_bytes(x)  (x * 8)

#define IV_NOP                  0
#define IV_IMMEDIATE            1
#define IV_DSGL			2

#define AEAD_H_SIZE             16

#define CRYPTO_ALG_SUB_TYPE_MASK            0x0f000000
#define CRYPTO_ALG_SUB_TYPE_HASH_HMAC       0x01000000
#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106    0x02000000
#define CRYPTO_ALG_SUB_TYPE_AEAD_GCM	    0x03000000
#define CRYPTO_ALG_SUB_TYPE_CBC_SHA	    0x04000000
#define CRYPTO_ALG_SUB_TYPE_AEAD_CCM        0x05000000
#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309    0x06000000
#define CRYPTO_ALG_SUB_TYPE_CBC_NULL	    0x07000000
#define CRYPTO_ALG_SUB_TYPE_CTR             0x08000000
#define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686     0x09000000
#define CRYPTO_ALG_SUB_TYPE_XTS		    0x0a000000
#define CRYPTO_ALG_SUB_TYPE_CBC		    0x0b000000
#define CRYPTO_ALG_SUB_TYPE_CTR_SHA	    0x0c000000
#define CRYPTO_ALG_SUB_TYPE_CTR_NULL   0x0d000000
#define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\
			      CRYPTO_ALG_SUB_TYPE_HASH_HMAC)

#define MAX_SCRATCH_PAD_SIZE    32

#define CHCR_HASH_MAX_BLOCK_SIZE_64  64
#define CHCR_HASH_MAX_BLOCK_SIZE_128 128
#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))
#define CHCR_DST_SG_SIZE 2048

static inline struct chcr_context *a_ctx(struct crypto_aead *tfm)
{
	return crypto_aead_ctx(tfm);
}

static inline struct chcr_context *c_ctx(struct crypto_ablkcipher *tfm)
{
	return crypto_ablkcipher_ctx(tfm);
}

static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm)
{
	return crypto_tfm_ctx(crypto_ahash_tfm(tfm));
}

struct ablk_ctx {
	struct crypto_skcipher *sw_cipher;
	struct crypto_cipher *aes_generic;
	__be32 key_ctx_hdr;
	unsigned int enckey_len;
	unsigned char ciph_mode;
	u8 key[CHCR_AES_MAX_KEY_LEN];
	u8 nonce[4];
	u8 rrkey[AES_MAX_KEY_SIZE];
};
struct chcr_aead_reqctx {
	struct	sk_buff	*skb;
	dma_addr_t iv_dma;
	dma_addr_t b0_dma;
	unsigned int b0_len;
	unsigned int op;
	short int aad_nents;
	short int src_nents;
	short int dst_nents;
	u16 imm;
	u16 verify;
	u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
	unsigned char scratch_pad[MAX_SCRATCH_PAD_SIZE];
};

struct ulptx_walk {
	struct ulptx_sgl *sgl;
	unsigned int nents;
	unsigned int pair_idx;
	unsigned int last_sg_len;
	struct scatterlist *last_sg;
	struct ulptx_sge_pair *pair;

};

struct dsgl_walk {
	unsigned int nents;
	unsigned int last_sg_len;
	struct scatterlist *last_sg;
	struct cpl_rx_phys_dsgl *dsgl;
	struct phys_sge_pairs *to;
};

struct chcr_gcm_ctx {
	u8 ghash_h[AEAD_H_SIZE];
};

struct chcr_authenc_ctx {
	u8 dec_rrkey[AES_MAX_KEY_SIZE];
	u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE];
	unsigned char auth_mode;
};

struct __aead_ctx {
	struct chcr_gcm_ctx gcm[0];
	struct chcr_authenc_ctx authenc[0];
};

struct chcr_aead_ctx {
	__be32 key_ctx_hdr;
	unsigned int enckey_len;
	struct crypto_aead *sw_cipher;
	u8 salt[MAX_SALT];
	u8 key[CHCR_AES_MAX_KEY_LEN];
	u8 nonce[4];
	u16 hmac_ctrl;
	u16 mayverify;
	struct	__aead_ctx ctx[0];
};

struct hmac_ctx {
	struct crypto_shash *base_hash;
	u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];
	u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];
};

struct __crypto_ctx {
	struct hmac_ctx hmacctx[0];
	struct ablk_ctx ablkctx[0];
	struct chcr_aead_ctx aeadctx[0];
};

struct chcr_context {
	struct chcr_dev *dev;
	unsigned char tx_qidx;
	unsigned char rx_qidx;
	struct __crypto_ctx crypto_ctx[0];
};

struct chcr_ahash_req_ctx {
	u32 result;
	u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128];
	u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];
	u8 *reqbfr;
	u8 *skbfr;
	dma_addr_t dma_addr;
	u32 dma_len;
	u8 reqlen;
	u8 imm;
	u8 is_sg_map;
	u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
	u64 data_len;  /* Data len till time */
	/* SKB which is being sent to the hardware for processing */
	struct sk_buff *skb;
};

struct chcr_blkcipher_req_ctx {
	struct sk_buff *skb;
	struct scatterlist *dstsg;
	unsigned int processed;
	unsigned int last_req_len;
	struct scatterlist *srcsg;
	unsigned int src_ofst;
	unsigned int dst_ofst;
	unsigned int op;
	dma_addr_t iv_dma;
	u16 imm;
	u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
};

struct chcr_alg_template {
	u32 type;
	u32 is_registered;
	union {
		struct crypto_alg crypto;
		struct ahash_alg hash;
		struct aead_alg aead;
	} alg;
};

typedef struct sk_buff *(*create_wr_t)(struct aead_request *req,
				       unsigned short qid,
				       int size,
				       unsigned short op_type);

void chcr_verify_tag(struct aead_request *req, u8 *input, int *err);
int chcr_aead_dma_map(struct device *dev, struct aead_request *req,
		      unsigned short op_type);
void chcr_aead_dma_unmap(struct device *dev, struct aead_request *req,
			 unsigned short op_type);
void chcr_add_aead_dst_ent(struct aead_request *req,
			   struct cpl_rx_phys_dsgl *phys_cpl,
			   unsigned int assoclen, unsigned short op_type,
			   unsigned short qid);
void chcr_add_aead_src_ent(struct aead_request *req, struct ulptx_sgl *ulptx,
			   unsigned int assoclen, unsigned short op_type);
void chcr_add_cipher_src_ent(struct ablkcipher_request *req,
			     struct ulptx_sgl *ulptx,
			     struct  cipher_wr_param *wrparam);
int chcr_cipher_dma_map(struct device *dev, struct ablkcipher_request *req);
void chcr_cipher_dma_unmap(struct device *dev, struct ablkcipher_request *req);
void chcr_add_cipher_dst_ent(struct ablkcipher_request *req,
			     struct cpl_rx_phys_dsgl *phys_cpl,
			     struct  cipher_wr_param *wrparam,
			     unsigned short qid);
int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip);
void chcr_add_hash_src_ent(struct ahash_request *req, struct ulptx_sgl *ulptx,
			   struct hash_wr_param *param);
int chcr_hash_dma_map(struct device *dev, struct ahash_request *req);
void chcr_hash_dma_unmap(struct device *dev, struct ahash_request *req);
#endif /* __CHCR_CRYPTO_H__ */
Commit	Line	Data
324429d7 HS	1	/*
	2	* This file is part of the Chelsio T6 Crypto driver for Linux.
	3	*
	4	* Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
	5	*
	6	* This software is available to you under a choice of one of two
	7	* licenses. You may choose to be licensed under the terms of the GNU
	8	* General Public License (GPL) Version 2, available from the file
	9	* COPYING in the main directory of this source tree, or the
	10	* OpenIB.org BSD license below:
	11	*
	12	* Redistribution and use in source and binary forms, with or
	13	* without modification, are permitted provided that the following
	14	* conditions are met:
	15	*
	16	* - Redistributions of source code must retain the above
	17	* copyright notice, this list of conditions and the following
	18	* disclaimer.
	19	*
	20	* - Redistributions in binary form must reproduce the above
	21	* copyright notice, this list of conditions and the following
	22	* disclaimer in the documentation and/or other materials
	23	* provided with the distribution.
	24	*
	25	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	26	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	27	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	28	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	29	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	30	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	31	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	32	* SOFTWARE.
	33	*
	34	*/
	35
	36	#ifndef __CHCR_CRYPTO_H__
	37	#define __CHCR_CRYPTO_H__
	38
2debd332 HJ	39	#define GHASH_BLOCK_SIZE 16
	40	#define GHASH_DIGEST_SIZE 16
	41
	42	#define CCM_B0_SIZE 16
	43	#define CCM_AAD_FIELD_SIZE 2
0e93708d	44	#define T6_MAX_AAD_SIZE 511
2debd332 HJ	45
2debd332 HJ	46
324429d7 HS	47	/* Define following if h/w is not dropping the AAD and IV data before
	48	* giving the processed data
	49	*/
	50
e29abda5 HJ	51	#define CHCR_CRA_PRIORITY 500
e29abda5 HJ	52	#define CHCR_AEAD_PRIORITY 6000
324429d7 HS	53	#define CHCR_AES_MAX_KEY_LEN (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
	54	#define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */
	55
	56	#define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/
	57	#define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/
	58
	59	#define CHCR_GIVENCRYPT_OP 2
	60	/* CPL/SCMD parameters */
	61
	62	#define CHCR_ENCRYPT_OP 0
	63	#define CHCR_DECRYPT_OP 1
	64
	65	#define CHCR_SCMD_SEQ_NO_CTRL_32BIT 1
	66	#define CHCR_SCMD_SEQ_NO_CTRL_48BIT 2
	67	#define CHCR_SCMD_SEQ_NO_CTRL_64BIT 3
	68
	69	#define CHCR_SCMD_PROTO_VERSION_GENERIC 4
	70
	71	#define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0
	72	#define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1
	73
2debd332 HJ	74	#define CHCR_SCMD_CIPHER_MODE_NOP 0
	75	#define CHCR_SCMD_CIPHER_MODE_AES_CBC 1
	76	#define CHCR_SCMD_CIPHER_MODE_AES_GCM 2
	77	#define CHCR_SCMD_CIPHER_MODE_AES_CTR 3
	78	#define CHCR_SCMD_CIPHER_MODE_GENERIC_AES 4
	79	#define CHCR_SCMD_CIPHER_MODE_AES_XTS 6
	80	#define CHCR_SCMD_CIPHER_MODE_AES_CCM 7
324429d7 HS	81
	82	#define CHCR_SCMD_AUTH_MODE_NOP 0
	83	#define CHCR_SCMD_AUTH_MODE_SHA1 1
	84	#define CHCR_SCMD_AUTH_MODE_SHA224 2
	85	#define CHCR_SCMD_AUTH_MODE_SHA256 3
2debd332	86	#define CHCR_SCMD_AUTH_MODE_GHASH 4
324429d7 HS	87	#define CHCR_SCMD_AUTH_MODE_SHA512_224 5
	88	#define CHCR_SCMD_AUTH_MODE_SHA512_256 6
	89	#define CHCR_SCMD_AUTH_MODE_SHA512_384 7
	90	#define CHCR_SCMD_AUTH_MODE_SHA512_512 8
2debd332 HJ	91	#define CHCR_SCMD_AUTH_MODE_CBCMAC 9
2debd332 HJ	92	#define CHCR_SCMD_AUTH_MODE_CMAC 10
324429d7 HS	93
	94	#define CHCR_SCMD_HMAC_CTRL_NOP 0
	95	#define CHCR_SCMD_HMAC_CTRL_NO_TRUNC 1
2debd332 HJ	96	#define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366 2
	97	#define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT 3
	98	#define CHCR_SCMD_HMAC_CTRL_PL1 4
	99	#define CHCR_SCMD_HMAC_CTRL_PL2 5
	100	#define CHCR_SCMD_HMAC_CTRL_PL3 6
	101	#define CHCR_SCMD_HMAC_CTRL_DIV2 7
	102	#define VERIFY_HW 0
	103	#define VERIFY_SW 1
324429d7 HS	104
	105	#define CHCR_SCMD_IVGEN_CTRL_HW 0
	106	#define CHCR_SCMD_IVGEN_CTRL_SW 1
	107	/* This are not really mac key size. They are intermediate values
	108	* of sha engine and its size
	109	*/
	110	#define CHCR_KEYCTX_MAC_KEY_SIZE_128 0
	111	#define CHCR_KEYCTX_MAC_KEY_SIZE_160 1
	112	#define CHCR_KEYCTX_MAC_KEY_SIZE_192 2
	113	#define CHCR_KEYCTX_MAC_KEY_SIZE_256 3
	114	#define CHCR_KEYCTX_MAC_KEY_SIZE_512 4
	115	#define CHCR_KEYCTX_CIPHER_KEY_SIZE_128 0
	116	#define CHCR_KEYCTX_CIPHER_KEY_SIZE_192 1
	117	#define CHCR_KEYCTX_CIPHER_KEY_SIZE_256 2
	118	#define CHCR_KEYCTX_NO_KEY 15
	119
	120	#define CHCR_CPL_FW4_PLD_IV_OFFSET (5 * 64) /* bytes. flt #5 and #6 */
	121	#define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */
	122	#define CHCR_CPL_FW4_PLD_DATA_SIZE (4 * 64) /* bytes. flt #4 to #7 */
	123
	124	#define KEY_CONTEXT_HDR_SALT_AND_PAD 16
	125	#define flits_to_bytes(x) (x * 8)
	126
	127	#define IV_NOP 0
	128	#define IV_IMMEDIATE 1
	129	#define IV_DSGL 2
	130
2debd332 HJ	131	#define AEAD_H_SIZE 16
2debd332 HJ	132
324429d7 HS	133	#define CRYPTO_ALG_SUB_TYPE_MASK 0x0f000000
324429d7 HS	134	#define CRYPTO_ALG_SUB_TYPE_HASH_HMAC 0x01000000
2debd332 HJ	135	#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 0x02000000
2debd332 HJ	136	#define CRYPTO_ALG_SUB_TYPE_AEAD_GCM 0x03000000
3d64bd67	137	#define CRYPTO_ALG_SUB_TYPE_CBC_SHA 0x04000000
2debd332 HJ	138	#define CRYPTO_ALG_SUB_TYPE_AEAD_CCM 0x05000000
2debd332 HJ	139	#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309 0x06000000
3d64bd67	140	#define CRYPTO_ALG_SUB_TYPE_CBC_NULL 0x07000000
2debd332	141	#define CRYPTO_ALG_SUB_TYPE_CTR 0x08000000
b8fd1f41 HJ	142	#define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686 0x09000000
	143	#define CRYPTO_ALG_SUB_TYPE_XTS 0x0a000000
	144	#define CRYPTO_ALG_SUB_TYPE_CBC 0x0b000000
3d64bd67 HJ	145	#define CRYPTO_ALG_SUB_TYPE_CTR_SHA 0x0c000000
3d64bd67 HJ	146	#define CRYPTO_ALG_SUB_TYPE_CTR_NULL 0x0d000000
324429d7 HS	147	#define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH \|\
	148	CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
	149
324429d7 HS	150	#define MAX_SCRATCH_PAD_SIZE 32
	151
	152	#define CHCR_HASH_MAX_BLOCK_SIZE_64 64
	153	#define CHCR_HASH_MAX_BLOCK_SIZE_128 128
2f47d580 HJ	154	#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))
2f47d580 HJ	155	#define CHCR_DST_SG_SIZE 2048
324429d7	156
2f47d580 HJ	157	static inline struct chcr_context a_ctx(struct crypto_aead tfm)
	158	{
	159	return crypto_aead_ctx(tfm);
	160	}
	161
	162	static inline struct chcr_context c_ctx(struct crypto_ablkcipher tfm)
	163	{
	164	return crypto_ablkcipher_ctx(tfm);
	165	}
	166
	167	static inline struct chcr_context h_ctx(struct crypto_ahash tfm)
	168	{
	169	return crypto_tfm_ctx(crypto_ahash_tfm(tfm));
	170	}
324429d7 HS	171
324429d7 HS	172	struct ablk_ctx {
b8fd1f41	173	struct crypto_skcipher *sw_cipher;
d3f1d2f7	174	struct crypto_cipher *aes_generic;
324429d7 HS	175	__be32 key_ctx_hdr;
324429d7 HS	176	unsigned int enckey_len;
324429d7	177	unsigned char ciph_mode;
b8fd1f41 HJ	178	u8 key[CHCR_AES_MAX_KEY_LEN];
b8fd1f41 HJ	179	u8 nonce[4];
5c86a8ff	180	u8 rrkey[AES_MAX_KEY_SIZE];
324429d7	181	};
2debd332 HJ	182	struct chcr_aead_reqctx {
2debd332 HJ	183	struct sk_buff *skb;
2f47d580 HJ	184	dma_addr_t iv_dma;
	185	dma_addr_t b0_dma;
	186	unsigned int b0_len;
	187	unsigned int op;
	188	short int aad_nents;
	189	short int src_nents;
2debd332	190	short int dst_nents;
2f47d580	191	u16 imm;
2debd332 HJ	192	u16 verify;
	193	u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
	194	unsigned char scratch_pad[MAX_SCRATCH_PAD_SIZE];
	195	};
	196
2f47d580 HJ	197	struct ulptx_walk {
	198	struct ulptx_sgl *sgl;
	199	unsigned int nents;
	200	unsigned int pair_idx;
	201	unsigned int last_sg_len;
	202	struct scatterlist *last_sg;
	203	struct ulptx_sge_pair *pair;
	204
	205	};
	206
	207	struct dsgl_walk {
	208	unsigned int nents;
	209	unsigned int last_sg_len;
	210	struct scatterlist *last_sg;
	211	struct cpl_rx_phys_dsgl *dsgl;
	212	struct phys_sge_pairs *to;
	213	};
	214
2debd332 HJ	215	struct chcr_gcm_ctx {
	216	u8 ghash_h[AEAD_H_SIZE];
	217	};
	218
	219	struct chcr_authenc_ctx {
	220	u8 dec_rrkey[AES_MAX_KEY_SIZE];
	221	u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE];
	222	unsigned char auth_mode;
	223	};
	224
	225	struct __aead_ctx {
	226	struct chcr_gcm_ctx gcm[0];
	227	struct chcr_authenc_ctx authenc[0];
	228	};
	229
2debd332 HJ	230	struct chcr_aead_ctx {
	231	__be32 key_ctx_hdr;
	232	unsigned int enckey_len;
0e93708d	233	struct crypto_aead *sw_cipher;
2debd332 HJ	234	u8 salt[MAX_SALT];
2debd332 HJ	235	u8 key[CHCR_AES_MAX_KEY_LEN];
3d64bd67	236	u8 nonce[4];
2debd332 HJ	237	u16 hmac_ctrl;
	238	u16 mayverify;
	239	struct __aead_ctx ctx[0];
	240	};
	241
324429d7	242	struct hmac_ctx {
e7922729	243	struct crypto_shash *base_hash;
324429d7 HS	244	u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];
	245	u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];
	246	};
	247
	248	struct __crypto_ctx {
	249	struct hmac_ctx hmacctx[0];
	250	struct ablk_ctx ablkctx[0];
2debd332	251	struct chcr_aead_ctx aeadctx[0];
324429d7 HS	252	};
	253
	254	struct chcr_context {
	255	struct chcr_dev *dev;
72a56ca9 HJ	256	unsigned char tx_qidx;
72a56ca9 HJ	257	unsigned char rx_qidx;
324429d7 HS	258	struct __crypto_ctx crypto_ctx[0];
	259	};
	260
	261	struct chcr_ahash_req_ctx {
	262	u32 result;
44fce12a HJ	263	u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128];
	264	u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];
	265	u8 *reqbfr;
	266	u8 *skbfr;
2f47d580 HJ	267	dma_addr_t dma_addr;
2f47d580 HJ	268	u32 dma_len;
44fce12a	269	u8 reqlen;
2f47d580 HJ	270	u8 imm;
2f47d580 HJ	271	u8 is_sg_map;
324429d7 HS	272	u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
324429d7 HS	273	u64 data_len; /* Data len till time */
324429d7 HS	274	/* SKB which is being sent to the hardware for processing */
	275	struct sk_buff *skb;
	276	};
	277
	278	struct chcr_blkcipher_req_ctx {
	279	struct sk_buff *skb;
b8fd1f41	280	struct scatterlist *dstsg;
b8fd1f41	281	unsigned int processed;
de1a00ac	282	unsigned int last_req_len;
2f47d580 HJ	283	struct scatterlist *srcsg;
	284	unsigned int src_ofst;
	285	unsigned int dst_ofst;
b8fd1f41	286	unsigned int op;
2f47d580 HJ	287	dma_addr_t iv_dma;
2f47d580 HJ	288	u16 imm;
5c86a8ff	289	u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
324429d7 HS	290	};
	291
	292	struct chcr_alg_template {
	293	u32 type;
	294	u32 is_registered;
	295	union {
	296	struct crypto_alg crypto;
	297	struct ahash_alg hash;
2debd332	298	struct aead_alg aead;
324429d7 HS	299	} alg;
	300	};
	301
2debd332	302	typedef struct sk_buff (create_wr_t)(struct aead_request *req,
324429d7	303	unsigned short qid,
2debd332	304	int size,
324429d7 HS	305	unsigned short op_type);
324429d7 HS	306
6dad4e8a AG	307	void chcr_verify_tag(struct aead_request req, u8 input, int *err);
	308	int chcr_aead_dma_map(struct device dev, struct aead_request req,
	309	unsigned short op_type);
	310	void chcr_aead_dma_unmap(struct device dev, struct aead_request req,
	311	unsigned short op_type);
	312	void chcr_add_aead_dst_ent(struct aead_request *req,
	313	struct cpl_rx_phys_dsgl *phys_cpl,
	314	unsigned int assoclen, unsigned short op_type,
	315	unsigned short qid);
	316	void chcr_add_aead_src_ent(struct aead_request req, struct ulptx_sgl ulptx,
	317	unsigned int assoclen, unsigned short op_type);
	318	void chcr_add_cipher_src_ent(struct ablkcipher_request *req,
	319	struct ulptx_sgl *ulptx,
	320	struct cipher_wr_param *wrparam);
	321	int chcr_cipher_dma_map(struct device dev, struct ablkcipher_request req);
	322	void chcr_cipher_dma_unmap(struct device dev, struct ablkcipher_request req);
	323	void chcr_add_cipher_dst_ent(struct ablkcipher_request *req,
	324	struct cpl_rx_phys_dsgl *phys_cpl,
	325	struct cipher_wr_param *wrparam,
	326	unsigned short qid);
2f47d580	327	int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip);
6dad4e8a AG	328	void chcr_add_hash_src_ent(struct ahash_request req, struct ulptx_sgl ulptx,
	329	struct hash_wr_param *param);
	330	int chcr_hash_dma_map(struct device dev, struct ahash_request req);
	331	void chcr_hash_dma_unmap(struct device dev, struct ahash_request req);
324429d7	332	#endif /* __CHCR_CRYPTO_H__ */