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8e8ec596 KP |
1 | /* |
2 | * CAAM Error Reporting | |
3 | * | |
4 | * Copyright 2009-2011 Freescale Semiconductor, Inc. | |
5 | */ | |
6 | ||
7 | #include "compat.h" | |
8 | #include "regs.h" | |
9 | #include "intern.h" | |
10 | #include "desc.h" | |
11 | #include "jr.h" | |
12 | #include "error.h" | |
13 | ||
9724d7ad MV |
14 | static const struct { |
15 | u8 value; | |
e397ee0f | 16 | const char *error_text; |
9724d7ad MV |
17 | } desc_error_list[] = { |
18 | { 0x00, "No error." }, | |
da37503d | 19 | { 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." }, |
9724d7ad | 20 | { 0x02, "SGT Null Entry Error." }, |
da37503d MV |
21 | { 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." }, |
22 | { 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." }, | |
9724d7ad MV |
23 | { 0x05, "Reserved." }, |
24 | { 0x06, "Invalid KEY Command" }, | |
25 | { 0x07, "Invalid LOAD Command" }, | |
26 | { 0x08, "Invalid STORE Command" }, | |
27 | { 0x09, "Invalid OPERATION Command" }, | |
28 | { 0x0A, "Invalid FIFO LOAD Command" }, | |
29 | { 0x0B, "Invalid FIFO STORE Command" }, | |
30 | { 0x0C, "Invalid MOVE/MOVE_LEN Command" }, | |
da37503d | 31 | { 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." }, |
9724d7ad MV |
32 | { 0x0E, "Invalid MATH Command" }, |
33 | { 0x0F, "Invalid SIGNATURE Command" }, | |
da37503d | 34 | { 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." }, |
9724d7ad MV |
35 | { 0x11, "Skip data type invalid. The type must be 0xE or 0xF."}, |
36 | { 0x12, "Shared Descriptor Header Error" }, | |
da37503d MV |
37 | { 0x13, "Header Error. Invalid length or parity, or certain other problems." }, |
38 | { 0x14, "Burster Error. Burster has gotten to an illegal state" }, | |
39 | { 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." }, | |
9724d7ad MV |
40 | { 0x16, "DMA Error" }, |
41 | { 0x17, "Reserved." }, | |
42 | { 0x1A, "Job failed due to JR reset" }, | |
43 | { 0x1B, "Job failed due to Fail Mode" }, | |
44 | { 0x1C, "DECO Watchdog timer timeout error" }, | |
da37503d MV |
45 | { 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" }, |
46 | { 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" }, | |
47 | { 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." }, | |
48 | { 0x20, "DECO has completed a reset initiated via the DRR register" }, | |
49 | { 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." }, | |
50 | { 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." }, | |
9724d7ad MV |
51 | { 0x23, "Read Input Frame error" }, |
52 | { 0x24, "JDKEK, TDKEK or TDSK not loaded error" }, | |
53 | { 0x80, "DNR (do not run) error" }, | |
54 | { 0x81, "undefined protocol command" }, | |
55 | { 0x82, "invalid setting in PDB" }, | |
56 | { 0x83, "Anti-replay LATE error" }, | |
57 | { 0x84, "Anti-replay REPLAY error" }, | |
58 | { 0x85, "Sequence number overflow" }, | |
59 | { 0x86, "Sigver invalid signature" }, | |
60 | { 0x87, "DSA Sign Illegal test descriptor" }, | |
da37503d MV |
61 | { 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." }, |
62 | { 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." }, | |
9724d7ad MV |
63 | { 0xC1, "Blob Command error: Undefined mode" }, |
64 | { 0xC2, "Blob Command error: Secure Memory Blob mode error" }, | |
da37503d | 65 | { 0xC4, "Blob Command error: Black Blob key or input size error" }, |
9724d7ad MV |
66 | { 0xC5, "Blob Command error: Invalid key destination" }, |
67 | { 0xC8, "Blob Command error: Trusted/Secure mode error" }, | |
da37503d | 68 | { 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" }, |
9724d7ad MV |
69 | { 0xF1, "3GPP HFN matches or exceeds the Threshold" }, |
70 | }; | |
71 | ||
72 | static const char * const cha_id_list[] = { | |
73 | "", | |
74 | "AES", | |
75 | "DES", | |
76 | "ARC4", | |
77 | "MDHA", | |
78 | "RNG", | |
79 | "SNOW f8", | |
80 | "Kasumi f8/9", | |
81 | "PKHA", | |
82 | "CRCA", | |
83 | "SNOW f9", | |
84 | "ZUCE", | |
85 | "ZUCA", | |
86 | }; | |
87 | ||
88 | static const char * const err_id_list[] = { | |
89 | "No error.", | |
90 | "Mode error.", | |
91 | "Data size error.", | |
92 | "Key size error.", | |
93 | "PKHA A memory size error.", | |
94 | "PKHA B memory size error.", | |
95 | "Data arrived out of sequence error.", | |
96 | "PKHA divide-by-zero error.", | |
97 | "PKHA modulus even error.", | |
98 | "DES key parity error.", | |
99 | "ICV check failed.", | |
100 | "Hardware error.", | |
101 | "Unsupported CCM AAD size.", | |
102 | "Class 1 CHA is not reset", | |
103 | "Invalid CHA combination was selected", | |
104 | "Invalid CHA selected.", | |
105 | }; | |
106 | ||
107 | static const char * const rng_err_id_list[] = { | |
108 | "", | |
109 | "", | |
110 | "", | |
111 | "Instantiate", | |
112 | "Not instantiated", | |
113 | "Test instantiate", | |
114 | "Prediction resistance", | |
115 | "Prediction resistance and test request", | |
116 | "Uninstantiate", | |
117 | "Secure key generation", | |
118 | }; | |
119 | ||
e397ee0f MV |
120 | static void report_ccb_status(struct device *jrdev, const u32 status, |
121 | const char *error) | |
8e8ec596 | 122 | { |
8e8ec596 KP |
123 | u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >> |
124 | JRSTA_CCBERR_CHAID_SHIFT; | |
125 | u8 err_id = status & JRSTA_CCBERR_ERRID_MASK; | |
526243cc MV |
126 | u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >> |
127 | JRSTA_DECOERR_INDEX_SHIFT; | |
1e16322d MV |
128 | char *idx_str; |
129 | const char *cha_str = "unidentified cha_id value 0x"; | |
130 | char cha_err_code[3] = { 0 }; | |
131 | const char *err_str = "unidentified err_id value 0x"; | |
132 | char err_err_code[3] = { 0 }; | |
8a475826 | 133 | |
526243cc | 134 | if (status & JRSTA_DECOERR_JUMP) |
1e16322d | 135 | idx_str = "jump tgt desc idx"; |
526243cc | 136 | else |
1e16322d | 137 | idx_str = "desc idx"; |
526243cc | 138 | |
1e16322d MV |
139 | if (cha_id < ARRAY_SIZE(cha_id_list)) |
140 | cha_str = cha_id_list[cha_id]; | |
141 | else | |
142 | snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id); | |
8e8ec596 | 143 | |
281922a1 KP |
144 | if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG && |
145 | err_id < ARRAY_SIZE(rng_err_id_list) && | |
146 | strlen(rng_err_id_list[err_id])) { | |
147 | /* RNG-only error */ | |
1e16322d MV |
148 | err_str = rng_err_id_list[err_id]; |
149 | } else if (err_id < ARRAY_SIZE(err_id_list)) | |
150 | err_str = err_id_list[err_id]; | |
151 | else | |
152 | snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id); | |
e75880dd | 153 | |
3f80be02 KP |
154 | /* |
155 | * CCB ICV check failures are part of normal operation life; | |
156 | * we leave the upper layers to do what they want with them. | |
157 | */ | |
158 | if (err_id != JRSTA_CCBERR_ERRID_ICVCHK) | |
159 | dev_err(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n", | |
160 | status, error, idx_str, idx, | |
161 | cha_str, cha_err_code, | |
162 | err_str, err_err_code); | |
8e8ec596 KP |
163 | } |
164 | ||
e397ee0f MV |
165 | static void report_jump_status(struct device *jrdev, const u32 status, |
166 | const char *error) | |
8e8ec596 | 167 | { |
e75880dd MV |
168 | dev_err(jrdev, "%08x: %s: %s() not implemented\n", |
169 | status, error, __func__); | |
8e8ec596 KP |
170 | } |
171 | ||
e397ee0f MV |
172 | static void report_deco_status(struct device *jrdev, const u32 status, |
173 | const char *error) | |
8e8ec596 | 174 | { |
4f0fa52a | 175 | u8 err_id = status & JRSTA_DECOERR_ERROR_MASK; |
526243cc MV |
176 | u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >> |
177 | JRSTA_DECOERR_INDEX_SHIFT; | |
4f0fa52a | 178 | char *idx_str; |
e397ee0f | 179 | const char *err_str = "unidentified error value 0x"; |
4f0fa52a | 180 | char err_err_code[3] = { 0 }; |
8e8ec596 KP |
181 | int i; |
182 | ||
526243cc | 183 | if (status & JRSTA_DECOERR_JUMP) |
4f0fa52a | 184 | idx_str = "jump tgt desc idx"; |
526243cc | 185 | else |
4f0fa52a | 186 | idx_str = "desc idx"; |
8e8ec596 | 187 | |
6d00376a | 188 | for (i = 0; i < ARRAY_SIZE(desc_error_list); i++) |
4f0fa52a | 189 | if (desc_error_list[i].value == err_id) |
8e8ec596 KP |
190 | break; |
191 | ||
4f0fa52a MV |
192 | if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text) |
193 | err_str = desc_error_list[i].error_text; | |
194 | else | |
195 | snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id); | |
e75880dd | 196 | |
4f0fa52a MV |
197 | dev_err(jrdev, "%08x: %s: %s %d: %s%s\n", |
198 | status, error, idx_str, idx, err_str, err_err_code); | |
8e8ec596 KP |
199 | } |
200 | ||
e397ee0f MV |
201 | static void report_jr_status(struct device *jrdev, const u32 status, |
202 | const char *error) | |
8e8ec596 | 203 | { |
e75880dd MV |
204 | dev_err(jrdev, "%08x: %s: %s() not implemented\n", |
205 | status, error, __func__); | |
8e8ec596 KP |
206 | } |
207 | ||
e397ee0f MV |
208 | static void report_cond_code_status(struct device *jrdev, const u32 status, |
209 | const char *error) | |
8e8ec596 | 210 | { |
e75880dd MV |
211 | dev_err(jrdev, "%08x: %s: %s() not implemented\n", |
212 | status, error, __func__); | |
8e8ec596 KP |
213 | } |
214 | ||
fa9659cd | 215 | void caam_jr_strstatus(struct device *jrdev, u32 status) |
8e8ec596 | 216 | { |
96aef9a8 | 217 | static const struct stat_src { |
e397ee0f MV |
218 | void (*report_ssed)(struct device *jrdev, const u32 status, |
219 | const char *error); | |
8a475826 | 220 | const char *error; |
49783d0f | 221 | } status_src[16] = { |
8e8ec596 KP |
222 | { NULL, "No error" }, |
223 | { NULL, NULL }, | |
224 | { report_ccb_status, "CCB" }, | |
225 | { report_jump_status, "Jump" }, | |
226 | { report_deco_status, "DECO" }, | |
49783d0f | 227 | { NULL, "Queue Manager Interface" }, |
8e8ec596 KP |
228 | { report_jr_status, "Job Ring" }, |
229 | { report_cond_code_status, "Condition Code" }, | |
49783d0f CS |
230 | { NULL, NULL }, |
231 | { NULL, NULL }, | |
232 | { NULL, NULL }, | |
233 | { NULL, NULL }, | |
234 | { NULL, NULL }, | |
235 | { NULL, NULL }, | |
236 | { NULL, NULL }, | |
237 | { NULL, NULL }, | |
8e8ec596 KP |
238 | }; |
239 | u32 ssrc = status >> JRSTA_SSRC_SHIFT; | |
e397ee0f | 240 | const char *error = status_src[ssrc].error; |
8e8ec596 | 241 | |
867e1ee3 | 242 | /* |
49783d0f CS |
243 | * If there is an error handling function, call it to report the error. |
244 | * Otherwise print the error source name. | |
867e1ee3 | 245 | */ |
49783d0f | 246 | if (status_src[ssrc].report_ssed) |
e397ee0f | 247 | status_src[ssrc].report_ssed(jrdev, status, error); |
49783d0f CS |
248 | else if (error) |
249 | dev_err(jrdev, "%d: %s\n", ssrc, error); | |
250 | else | |
251 | dev_err(jrdev, "%d: unknown error source\n", ssrc); | |
8e8ec596 KP |
252 | } |
253 | EXPORT_SYMBOL(caam_jr_strstatus); |