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618b5dc4 | 1 | # SPDX-License-Identifier: GPL-2.0 |
8d818c10 HG |
2 | config CRYPTO_DEV_FSL_CAAM_COMMON |
3 | tristate | |
4 | ||
1b46c90c HG |
5 | config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC |
6 | tristate | |
7 | ||
8 | config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC | |
9 | tristate | |
10 | ||
8e8ec596 | 11 | config CRYPTO_DEV_FSL_CAAM |
8d818c10 | 12 | tristate "Freescale CAAM-Multicore platform driver backend" |
9e217795 | 13 | depends on FSL_SOC || ARCH_MXC || ARCH_LAYERSCAPE |
c056d910 | 14 | select SOC_BUS |
8d818c10 | 15 | select CRYPTO_DEV_FSL_CAAM_COMMON |
358ba762 | 16 | imply FSL_MC_BUS |
8e8ec596 KP |
17 | help |
18 | Enables the driver module for Freescale's Cryptographic Accelerator | |
19 | and Assurance Module (CAAM), also known as the SEC version 4 (SEC4). | |
313ea293 | 20 | This module creates job ring devices, and configures h/w |
8e8ec596 KP |
21 | to operate as a DPAA component automatically, depending |
22 | on h/w feature availability. | |
23 | ||
24 | To compile this driver as a module, choose M here: the module | |
25 | will be called caam. | |
26 | ||
8d818c10 HG |
27 | if CRYPTO_DEV_FSL_CAAM |
28 | ||
29 | config CRYPTO_DEV_FSL_CAAM_DEBUG | |
30 | bool "Enable debug output in CAAM driver" | |
31 | help | |
32 | Selecting this will enable printing of various debug | |
33 | information in the CAAM driver. | |
34 | ||
1b46c90c | 35 | menuconfig CRYPTO_DEV_FSL_CAAM_JR |
313ea293 | 36 | tristate "Freescale CAAM Job Ring driver backend" |
ee38767f | 37 | select CRYPTO_ENGINE |
313ea293 RG |
38 | default y |
39 | help | |
40 | Enables the driver module for Job Rings which are part of | |
41 | Freescale's Cryptographic Accelerator | |
42 | and Assurance Module (CAAM). This module adds a job ring operation | |
43 | interface. | |
44 | ||
45 | To compile this driver as a module, choose M here: the module | |
46 | will be called caam_jr. | |
47 | ||
8d818c10 HG |
48 | if CRYPTO_DEV_FSL_CAAM_JR |
49 | ||
8e8ec596 KP |
50 | config CRYPTO_DEV_FSL_CAAM_RINGSIZE |
51 | int "Job Ring size" | |
8e8ec596 KP |
52 | range 2 9 |
53 | default "9" | |
54 | help | |
55 | Select size of Job Rings as a power of 2, within the | |
56 | range 2-9 (ring size 4-512). | |
57 | Examples: | |
58 | 2 => 4 | |
59 | 3 => 8 | |
60 | 4 => 16 | |
61 | 5 => 32 | |
62 | 6 => 64 | |
63 | 7 => 128 | |
64 | 8 => 256 | |
65 | 9 => 512 | |
66 | ||
67 | config CRYPTO_DEV_FSL_CAAM_INTC | |
68 | bool "Job Ring interrupt coalescing" | |
8e8ec596 KP |
69 | help |
70 | Enable the Job Ring's interrupt coalescing feature. | |
71 | ||
1a076689 KP |
72 | Note: the driver already provides adequate |
73 | interrupt coalescing in software. | |
74 | ||
8e8ec596 KP |
75 | config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD |
76 | int "Job Ring interrupt coalescing count threshold" | |
77 | depends on CRYPTO_DEV_FSL_CAAM_INTC | |
78 | range 1 255 | |
79 | default 255 | |
80 | help | |
81 | Select number of descriptor completions to queue before | |
82 | raising an interrupt, in the range 1-255. Note that a selection | |
83 | of 1 functionally defeats the coalescing feature, and a selection | |
84 | equal or greater than the job ring size will force timeouts. | |
85 | ||
86 | config CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD | |
87 | int "Job Ring interrupt coalescing timer threshold" | |
88 | depends on CRYPTO_DEV_FSL_CAAM_INTC | |
89 | range 1 65535 | |
90 | default 2048 | |
91 | help | |
92 | Select number of bus clocks/64 to timeout in the case that one or | |
93 | more descriptor completions are queued without reaching the count | |
94 | threshold. Range is 1-65535. | |
95 | ||
96 | config CRYPTO_DEV_FSL_CAAM_CRYPTO_API | |
1b46c90c | 97 | bool "Register algorithm implementations with the Crypto API" |
8e8ec596 | 98 | default y |
1b46c90c | 99 | select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC |
596103cf | 100 | select CRYPTO_AEAD |
8e8ec596 | 101 | select CRYPTO_AUTHENC |
b95bba5d | 102 | select CRYPTO_SKCIPHER |
04007b0e | 103 | select CRYPTO_LIB_DES |
9d9b14db | 104 | select CRYPTO_XTS |
8e8ec596 KP |
105 | help |
106 | Selecting this will offload crypto for users of the | |
107 | scatterlist crypto API (such as the linux native IPSec | |
108 | stack) to the SEC4 via job ring. | |
109 | ||
b189817c | 110 | config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI |
1b46c90c | 111 | bool "Queue Interface as Crypto API backend" |
8d818c10 | 112 | depends on FSL_DPAA && NET |
b189817c | 113 | default y |
1b46c90c | 114 | select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC |
b189817c | 115 | select CRYPTO_AUTHENC |
b95bba5d | 116 | select CRYPTO_SKCIPHER |
836d8f43 | 117 | select CRYPTO_DES |
83e8aa91 | 118 | select CRYPTO_XTS |
b189817c HG |
119 | help |
120 | Selecting this will use CAAM Queue Interface (QI) for sending | |
121 | & receiving crypto jobs to/from CAAM. This gives better performance | |
122 | than job ring interface when the number of cores are more than the | |
123 | number of job rings assigned to the kernel. The number of portals | |
124 | assigned to the kernel should also be more than the number of | |
125 | job rings. | |
126 | ||
045e3678 | 127 | config CRYPTO_DEV_FSL_CAAM_AHASH_API |
1b46c90c | 128 | bool "Register hash algorithm implementations with Crypto API" |
045e3678 | 129 | default y |
1b46c90c | 130 | select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC |
ae8488a5 | 131 | select CRYPTO_HASH |
045e3678 YK |
132 | help |
133 | Selecting this will offload ahash for users of the | |
134 | scatterlist crypto API to the SEC4 via job ring. | |
135 | ||
8c419778 | 136 | config CRYPTO_DEV_FSL_CAAM_PKC_API |
2452cfdf KK |
137 | bool "Register public key cryptography implementations with Crypto API" |
138 | default y | |
139 | select CRYPTO_RSA | |
140 | help | |
141 | Selecting this will allow SEC Public key support for RSA. | |
142 | Supported cryptographic primitives: encryption, decryption, | |
143 | signature and verification. | |
8c419778 | 144 | |
e24f7c9e | 145 | config CRYPTO_DEV_FSL_CAAM_RNG_API |
1b46c90c | 146 | bool "Register caam device for hwrng API" |
e24f7c9e YK |
147 | default y |
148 | select CRYPTO_RNG | |
149 | select HW_RANDOM | |
150 | help | |
151 | Selecting this will register the SEC4 hardware rng to | |
24c7bf08 | 152 | the hw_random API for supplying the kernel entropy pool. |
e24f7c9e | 153 | |
0aa6ac77 MA |
154 | config CRYPTO_DEV_FSL_CAAM_PRNG_API |
155 | bool "Register Pseudo random number generation implementation with Crypto API" | |
156 | default y | |
157 | select CRYPTO_RNG | |
158 | help | |
159 | Selecting this will register the SEC hardware prng to | |
160 | the Crypto API. | |
161 | ||
007c3ff1 AF |
162 | config CRYPTO_DEV_FSL_CAAM_BLOB_GEN |
163 | bool | |
164 | ||
2be0d806 VM |
165 | config CRYPTO_DEV_FSL_CAAM_RNG_TEST |
166 | bool "Test caam rng" | |
167 | select CRYPTO_DEV_FSL_CAAM_RNG_API | |
168 | help | |
169 | Selecting this will enable a self-test to run for the | |
170 | caam RNG. | |
171 | This test is several minutes long and executes | |
172 | just before the RNG is registered with the hw_random API. | |
173 | ||
8d818c10 HG |
174 | endif # CRYPTO_DEV_FSL_CAAM_JR |
175 | ||
176 | endif # CRYPTO_DEV_FSL_CAAM | |
177 | ||
178 | config CRYPTO_DEV_FSL_DPAA2_CAAM | |
179 | tristate "QorIQ DPAA2 CAAM (DPSECI) driver" | |
180 | depends on FSL_MC_DPIO | |
96808c59 | 181 | depends on NETDEVICES |
8d818c10 | 182 | select CRYPTO_DEV_FSL_CAAM_COMMON |
1b46c90c HG |
183 | select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC |
184 | select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC | |
b95bba5d | 185 | select CRYPTO_SKCIPHER |
8d818c10 HG |
186 | select CRYPTO_AUTHENC |
187 | select CRYPTO_AEAD | |
3f16f6c9 | 188 | select CRYPTO_HASH |
836d8f43 | 189 | select CRYPTO_DES |
36e2d7cf | 190 | select CRYPTO_XTS |
d4d8edf8 | 191 | help |
8d818c10 HG |
192 | CAAM driver for QorIQ Data Path Acceleration Architecture 2. |
193 | It handles DPSECI DPAA2 objects that sit on the Management Complex | |
194 | (MC) fsl-mc bus. | |
195 | ||
196 | To compile this as a module, choose M here: the module | |
197 | will be called dpaa2_caam. |