Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
b511431d JE |
2 | |
3 | menuconfig CRYPTO_HW | |
4 | bool "Hardware crypto devices" | |
5 | default y | |
06bfb7eb JE |
6 | ---help--- |
7 | Say Y here to get to see options for hardware crypto devices and | |
8 | processors. This option alone does not add any kernel code. | |
9 | ||
10 | If you say N, all options in this submenu will be skipped and disabled. | |
b511431d JE |
11 | |
12 | if CRYPTO_HW | |
1da177e4 LT |
13 | |
14 | config CRYPTO_DEV_PADLOCK | |
d158325e | 15 | tristate "Support for VIA PadLock ACE" |
2f817418 | 16 | depends on X86 && !UML |
1da177e4 LT |
17 | help |
18 | Some VIA processors come with an integrated crypto engine | |
19 | (so called VIA PadLock ACE, Advanced Cryptography Engine) | |
1191f0a4 ML |
20 | that provides instructions for very fast cryptographic |
21 | operations with supported algorithms. | |
1da177e4 LT |
22 | |
23 | The instructions are used only when the CPU supports them. | |
5644bda5 ML |
24 | Otherwise software encryption is used. |
25 | ||
1da177e4 | 26 | config CRYPTO_DEV_PADLOCK_AES |
1191f0a4 | 27 | tristate "PadLock driver for AES algorithm" |
1da177e4 | 28 | depends on CRYPTO_DEV_PADLOCK |
28ce728a | 29 | select CRYPTO_BLKCIPHER |
8131878d | 30 | select CRYPTO_LIB_AES |
1da177e4 LT |
31 | help |
32 | Use VIA PadLock for AES algorithm. | |
33 | ||
1191f0a4 ML |
34 | Available in VIA C3 and newer CPUs. |
35 | ||
36 | If unsure say M. The compiled module will be | |
4737f097 | 37 | called padlock-aes. |
1191f0a4 | 38 | |
6c833275 ML |
39 | config CRYPTO_DEV_PADLOCK_SHA |
40 | tristate "PadLock driver for SHA1 and SHA256 algorithms" | |
41 | depends on CRYPTO_DEV_PADLOCK | |
bbbee467 | 42 | select CRYPTO_HASH |
6c833275 ML |
43 | select CRYPTO_SHA1 |
44 | select CRYPTO_SHA256 | |
6c833275 ML |
45 | help |
46 | Use VIA PadLock for SHA1/SHA256 algorithms. | |
47 | ||
48 | Available in VIA C7 and newer processors. | |
49 | ||
50 | If unsure say M. The compiled module will be | |
4737f097 | 51 | called padlock-sha. |
6c833275 | 52 | |
9fe757b0 JC |
53 | config CRYPTO_DEV_GEODE |
54 | tristate "Support for the Geode LX AES engine" | |
f6259dea | 55 | depends on X86_32 && PCI |
9fe757b0 JC |
56 | select CRYPTO_ALGAPI |
57 | select CRYPTO_BLKCIPHER | |
9fe757b0 JC |
58 | help |
59 | Say 'Y' here to use the AMD Geode LX processor on-board AES | |
3dde6ad8 | 60 | engine for the CryptoAPI AES algorithm. |
9fe757b0 JC |
61 | |
62 | To compile this driver as a module, choose M here: the module | |
63 | will be called geode-aes. | |
64 | ||
61d48c2c | 65 | config ZCRYPT |
a3358e3d | 66 | tristate "Support for s390 cryptographic adapters" |
61d48c2c | 67 | depends on S390 |
2f7c8bd6 | 68 | select HW_RANDOM |
61d48c2c | 69 | help |
a3358e3d HF |
70 | Select this option if you want to enable support for |
71 | s390 cryptographic adapters like: | |
61d48c2c | 72 | + PCI-X Cryptographic Coprocessor (PCIXCC) |
a3358e3d HF |
73 | + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) |
74 | + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) | |
75 | + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) | |
61d48c2c | 76 | |
00fab235 HF |
77 | config ZCRYPT_MULTIDEVNODES |
78 | bool "Support for multiple zcrypt device nodes" | |
79 | default y | |
80 | depends on S390 | |
81 | depends on ZCRYPT | |
82 | help | |
83 | With this option enabled the zcrypt device driver can | |
84 | provide multiple devices nodes in /dev. Each device | |
85 | node can get customized to limit access and narrow | |
86 | down the use of the available crypto hardware. | |
87 | ||
e80d4af0 HF |
88 | config PKEY |
89 | tristate "Kernel API for protected key handling" | |
90 | depends on S390 | |
91 | depends on ZCRYPT | |
92 | help | |
93 | With this option enabled the pkey kernel module provides an API | |
94 | for creation and handling of protected keys. Other parts of the | |
95 | kernel or userspace applications may use these functions. | |
96 | ||
97 | Select this option if you want to enable the kernel and userspace | |
98 | API for proteced key handling. | |
99 | ||
100 | Please note that creation of protected keys from secure keys | |
101 | requires to have at least one CEX card in coprocessor mode | |
102 | available at runtime. | |
61d48c2c | 103 | |
c4684f98 HF |
104 | config CRYPTO_PAES_S390 |
105 | tristate "PAES cipher algorithms" | |
106 | depends on S390 | |
107 | depends on ZCRYPT | |
108 | depends on PKEY | |
109 | select CRYPTO_ALGAPI | |
110 | select CRYPTO_BLKCIPHER | |
111 | help | |
112 | This is the s390 hardware accelerated implementation of the | |
113 | AES cipher algorithms for use with protected key. | |
114 | ||
115 | Select this option if you want to use the paes cipher | |
116 | for example to use protected key encrypted devices. | |
117 | ||
3f5615e0 JG |
118 | config CRYPTO_SHA1_S390 |
119 | tristate "SHA1 digest algorithm" | |
120 | depends on S390 | |
563f346d | 121 | select CRYPTO_HASH |
3f5615e0 JG |
122 | help |
123 | This is the s390 hardware accelerated implementation of the | |
124 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). | |
125 | ||
d393d9b8 JG |
126 | It is available as of z990. |
127 | ||
3f5615e0 JG |
128 | config CRYPTO_SHA256_S390 |
129 | tristate "SHA256 digest algorithm" | |
130 | depends on S390 | |
563f346d | 131 | select CRYPTO_HASH |
3f5615e0 JG |
132 | help |
133 | This is the s390 hardware accelerated implementation of the | |
134 | SHA256 secure hash standard (DFIPS 180-2). | |
135 | ||
d393d9b8 | 136 | It is available as of z9. |
3f5615e0 | 137 | |
291dc7c0 | 138 | config CRYPTO_SHA512_S390 |
4e2c6d7f | 139 | tristate "SHA384 and SHA512 digest algorithm" |
291dc7c0 | 140 | depends on S390 |
563f346d | 141 | select CRYPTO_HASH |
291dc7c0 JG |
142 | help |
143 | This is the s390 hardware accelerated implementation of the | |
144 | SHA512 secure hash standard. | |
145 | ||
d393d9b8 | 146 | It is available as of z10. |
291dc7c0 | 147 | |
3c2eb6b7 JS |
148 | config CRYPTO_SHA3_256_S390 |
149 | tristate "SHA3_224 and SHA3_256 digest algorithm" | |
150 | depends on S390 | |
151 | select CRYPTO_HASH | |
152 | help | |
153 | This is the s390 hardware accelerated implementation of the | |
154 | SHA3_256 secure hash standard. | |
155 | ||
156 | It is available as of z14. | |
157 | ||
158 | config CRYPTO_SHA3_512_S390 | |
159 | tristate "SHA3_384 and SHA3_512 digest algorithm" | |
160 | depends on S390 | |
161 | select CRYPTO_HASH | |
162 | help | |
163 | This is the s390 hardware accelerated implementation of the | |
164 | SHA3_512 secure hash standard. | |
165 | ||
166 | It is available as of z14. | |
167 | ||
3f5615e0 JG |
168 | config CRYPTO_DES_S390 |
169 | tristate "DES and Triple DES cipher algorithms" | |
170 | depends on S390 | |
171 | select CRYPTO_ALGAPI | |
172 | select CRYPTO_BLKCIPHER | |
04007b0e | 173 | select CRYPTO_LIB_DES |
3f5615e0 | 174 | help |
0200f3ec | 175 | This is the s390 hardware accelerated implementation of the |
3f5615e0 JG |
176 | DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). |
177 | ||
0200f3ec GS |
178 | As of z990 the ECB and CBC mode are hardware accelerated. |
179 | As of z196 the CTR mode is hardware accelerated. | |
180 | ||
3f5615e0 JG |
181 | config CRYPTO_AES_S390 |
182 | tristate "AES cipher algorithms" | |
183 | depends on S390 | |
184 | select CRYPTO_ALGAPI | |
185 | select CRYPTO_BLKCIPHER | |
186 | help | |
187 | This is the s390 hardware accelerated implementation of the | |
99d97222 GS |
188 | AES cipher algorithms (FIPS-197). |
189 | ||
190 | As of z9 the ECB and CBC modes are hardware accelerated | |
191 | for 128 bit keys. | |
192 | As of z10 the ECB and CBC modes are hardware accelerated | |
193 | for all AES key sizes. | |
0200f3ec GS |
194 | As of z196 the CTR mode is hardware accelerated for all AES |
195 | key sizes and XTS mode is hardware accelerated for 256 and | |
99d97222 | 196 | 512 bit keys. |
3f5615e0 JG |
197 | |
198 | config S390_PRNG | |
199 | tristate "Pseudo random number generator device driver" | |
200 | depends on S390 | |
201 | default "m" | |
202 | help | |
203 | Select this option if you want to use the s390 pseudo random number | |
204 | generator. The PRNG is part of the cryptographic processor functions | |
205 | and uses triple-DES to generate secure random numbers like the | |
d393d9b8 JG |
206 | ANSI X9.17 standard. User-space programs access the |
207 | pseudo-random-number device through the char device /dev/prandom. | |
208 | ||
209 | It is available as of z9. | |
3f5615e0 | 210 | |
df1309ce | 211 | config CRYPTO_GHASH_S390 |
8dfa20fc | 212 | tristate "GHASH hash function" |
df1309ce GS |
213 | depends on S390 |
214 | select CRYPTO_HASH | |
215 | help | |
8dfa20fc EB |
216 | This is the s390 hardware accelerated implementation of GHASH, |
217 | the hash function used in GCM (Galois/Counter mode). | |
df1309ce GS |
218 | |
219 | It is available as of z196. | |
220 | ||
f848dbd3 HB |
221 | config CRYPTO_CRC32_S390 |
222 | tristate "CRC-32 algorithms" | |
223 | depends on S390 | |
224 | select CRYPTO_HASH | |
225 | select CRC32 | |
226 | help | |
227 | Select this option if you want to use hardware accelerated | |
228 | implementations of CRC algorithms. With this option, you | |
229 | can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) | |
230 | and CRC-32C (Castagnoli). | |
231 | ||
232 | It is available with IBM z13 or later. | |
233 | ||
f63601fd | 234 | config CRYPTO_DEV_MARVELL_CESA |
27b43fd9 | 235 | tristate "Marvell's Cryptographic Engine driver" |
fe55dfdc | 236 | depends on PLAT_ORION || ARCH_MVEBU |
18d8b96d | 237 | select CRYPTO_LIB_AES |
04007b0e | 238 | select CRYPTO_LIB_DES |
f63601fd BB |
239 | select CRYPTO_BLKCIPHER |
240 | select CRYPTO_HASH | |
241 | select SRAM | |
242 | help | |
243 | This driver allows you to utilize the Cryptographic Engines and | |
27b43fd9 BB |
244 | Security Accelerator (CESA) which can be found on MVEBU and ORION |
245 | platforms. | |
db509a45 | 246 | This driver supports CPU offload through DMA transfers. |
f63601fd | 247 | |
0a625fd2 DM |
248 | config CRYPTO_DEV_NIAGARA2 |
249 | tristate "Niagara2 Stream Processing Unit driver" | |
04007b0e | 250 | select CRYPTO_LIB_DES |
596103cf HX |
251 | select CRYPTO_BLKCIPHER |
252 | select CRYPTO_HASH | |
8054b800 LC |
253 | select CRYPTO_MD5 |
254 | select CRYPTO_SHA1 | |
255 | select CRYPTO_SHA256 | |
0a625fd2 DM |
256 | depends on SPARC64 |
257 | help | |
258 | Each core of a Niagara2 processor contains a Stream | |
259 | Processing Unit, which itself contains several cryptographic | |
260 | sub-units. One set provides the Modular Arithmetic Unit, | |
261 | used for SSL offload. The other set provides the Cipher | |
262 | Group, which can perform encryption, decryption, hashing, | |
263 | checksumming, and raw copies. | |
264 | ||
f7d0561e EP |
265 | config CRYPTO_DEV_HIFN_795X |
266 | tristate "Driver HIFN 795x crypto accelerator chips" | |
04007b0e | 267 | select CRYPTO_LIB_DES |
653ebd9c | 268 | select CRYPTO_BLKCIPHER |
946fef4e | 269 | select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG |
2707b937 | 270 | depends on PCI |
75b76625 | 271 | depends on !ARCH_DMA_ADDR_T_64BIT |
f7d0561e EP |
272 | help |
273 | This option allows you to have support for HIFN 795x crypto adapters. | |
274 | ||
946fef4e HX |
275 | config CRYPTO_DEV_HIFN_795X_RNG |
276 | bool "HIFN 795x random number generator" | |
277 | depends on CRYPTO_DEV_HIFN_795X | |
278 | help | |
279 | Select this option if you want to enable the random number generator | |
280 | on the HIFN 795x crypto adapters. | |
f7d0561e | 281 | |
8636a1f9 | 282 | source "drivers/crypto/caam/Kconfig" |
8e8ec596 | 283 | |
9c4a7965 KP |
284 | config CRYPTO_DEV_TALITOS |
285 | tristate "Talitos Freescale Security Engine (SEC)" | |
596103cf | 286 | select CRYPTO_AEAD |
9c4a7965 | 287 | select CRYPTO_AUTHENC |
596103cf HX |
288 | select CRYPTO_BLKCIPHER |
289 | select CRYPTO_HASH | |
9c4a7965 KP |
290 | select HW_RANDOM |
291 | depends on FSL_SOC | |
292 | help | |
293 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
294 | to offload cryptographic algorithm computation. | |
295 | ||
296 | The Freescale SEC is present on PowerQUICC 'E' processors, such | |
297 | as the MPC8349E and MPC8548E. | |
298 | ||
299 | To compile this driver as a module, choose M here: the module | |
300 | will be called talitos. | |
301 | ||
5b841a65 LC |
302 | config CRYPTO_DEV_TALITOS1 |
303 | bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" | |
304 | depends on CRYPTO_DEV_TALITOS | |
305 | depends on PPC_8xx || PPC_82xx | |
306 | default y | |
307 | help | |
308 | Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 | |
309 | found on MPC82xx or the Freescale Security Engine (SEC Lite) | |
310 | version 1.2 found on MPC8xx | |
311 | ||
312 | config CRYPTO_DEV_TALITOS2 | |
313 | bool "SEC2+ (SEC version 2.0 or upper)" | |
314 | depends on CRYPTO_DEV_TALITOS | |
315 | default y if !PPC_8xx | |
316 | help | |
317 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
318 | version 2 and following as found on MPC83xx, MPC85xx, etc ... | |
319 | ||
81bef015 CH |
320 | config CRYPTO_DEV_IXP4XX |
321 | tristate "Driver for IXP4xx crypto hardware acceleration" | |
9665c52b | 322 | depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE |
04007b0e | 323 | select CRYPTO_LIB_DES |
596103cf | 324 | select CRYPTO_AEAD |
090657e4 | 325 | select CRYPTO_AUTHENC |
81bef015 CH |
326 | select CRYPTO_BLKCIPHER |
327 | help | |
328 | Driver for the IXP4xx NPE crypto engine. | |
329 | ||
049359d6 JH |
330 | config CRYPTO_DEV_PPC4XX |
331 | tristate "Driver AMCC PPC4xx crypto accelerator" | |
332 | depends on PPC && 4xx | |
333 | select CRYPTO_HASH | |
a0aae821 | 334 | select CRYPTO_AEAD |
da3e7a97 | 335 | select CRYPTO_LIB_AES |
a0aae821 | 336 | select CRYPTO_CCM |
98e87e3d | 337 | select CRYPTO_CTR |
a0aae821 | 338 | select CRYPTO_GCM |
049359d6 JH |
339 | select CRYPTO_BLKCIPHER |
340 | help | |
341 | This option allows you to have support for AMCC crypto acceleration. | |
342 | ||
5343e674 CL |
343 | config HW_RANDOM_PPC4XX |
344 | bool "PowerPC 4xx generic true random number generator support" | |
345 | depends on CRYPTO_DEV_PPC4XX && HW_RANDOM | |
346 | default y | |
347 | ---help--- | |
348 | This option provides the kernel-side support for the TRNG hardware | |
349 | found in the security function of some PowerPC 4xx SoCs. | |
350 | ||
74ed87e7 TK |
351 | config CRYPTO_DEV_OMAP |
352 | tristate "Support for OMAP crypto HW accelerators" | |
353 | depends on ARCH_OMAP2PLUS | |
354 | help | |
355 | OMAP processors have various crypto HW accelerators. Select this if | |
356 | you want to use the OMAP modules for any of the crypto algorithms. | |
357 | ||
358 | if CRYPTO_DEV_OMAP | |
359 | ||
8628e7c8 | 360 | config CRYPTO_DEV_OMAP_SHAM |
eaef7e3f LV |
361 | tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" |
362 | depends on ARCH_OMAP2PLUS | |
8628e7c8 DK |
363 | select CRYPTO_SHA1 |
364 | select CRYPTO_MD5 | |
eaef7e3f LV |
365 | select CRYPTO_SHA256 |
366 | select CRYPTO_SHA512 | |
367 | select CRYPTO_HMAC | |
8628e7c8 | 368 | help |
eaef7e3f LV |
369 | OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you |
370 | want to use the OMAP module for MD5/SHA1/SHA2 algorithms. | |
8628e7c8 | 371 | |
537559a5 DK |
372 | config CRYPTO_DEV_OMAP_AES |
373 | tristate "Support for OMAP AES hw engine" | |
1bbf6437 | 374 | depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS |
537559a5 | 375 | select CRYPTO_AES |
596103cf | 376 | select CRYPTO_BLKCIPHER |
0529900a | 377 | select CRYPTO_ENGINE |
9fcb191a LV |
378 | select CRYPTO_CBC |
379 | select CRYPTO_ECB | |
380 | select CRYPTO_CTR | |
ad18cc9d | 381 | select CRYPTO_AEAD |
537559a5 DK |
382 | help |
383 | OMAP processors have AES module accelerator. Select this if you | |
384 | want to use the OMAP module for AES algorithms. | |
385 | ||
701d0f19 | 386 | config CRYPTO_DEV_OMAP_DES |
97ee7ed3 | 387 | tristate "Support for OMAP DES/3DES hw engine" |
701d0f19 | 388 | depends on ARCH_OMAP2PLUS |
04007b0e | 389 | select CRYPTO_LIB_DES |
596103cf | 390 | select CRYPTO_BLKCIPHER |
f1b77aac | 391 | select CRYPTO_ENGINE |
701d0f19 JF |
392 | help |
393 | OMAP processors have DES/3DES module accelerator. Select this if you | |
394 | want to use the OMAP module for DES and 3DES algorithms. Currently | |
97ee7ed3 PM |
395 | the ECB and CBC modes of operation are supported by the driver. Also |
396 | accesses made on unaligned boundaries are supported. | |
701d0f19 | 397 | |
74ed87e7 TK |
398 | endif # CRYPTO_DEV_OMAP |
399 | ||
ce921368 JI |
400 | config CRYPTO_DEV_PICOXCELL |
401 | tristate "Support for picoXcell IPSEC and Layer2 crypto engines" | |
4f44d86d | 402 | depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK |
596103cf | 403 | select CRYPTO_AEAD |
ce921368 JI |
404 | select CRYPTO_AES |
405 | select CRYPTO_AUTHENC | |
596103cf | 406 | select CRYPTO_BLKCIPHER |
04007b0e | 407 | select CRYPTO_LIB_DES |
ce921368 JI |
408 | select CRYPTO_CBC |
409 | select CRYPTO_ECB | |
410 | select CRYPTO_SEQIV | |
411 | help | |
412 | This option enables support for the hardware offload engines in the | |
413 | Picochip picoXcell SoC devices. Select this for IPSEC ESP offload | |
414 | and for 3gpp Layer 2 ciphering support. | |
415 | ||
309b77e0 | 416 | Saying m here will build a module named picoxcell_crypto. |
ce921368 | 417 | |
5de88752 JM |
418 | config CRYPTO_DEV_SAHARA |
419 | tristate "Support for SAHARA crypto accelerator" | |
74d24d83 | 420 | depends on ARCH_MXC && OF |
5de88752 JM |
421 | select CRYPTO_BLKCIPHER |
422 | select CRYPTO_AES | |
423 | select CRYPTO_ECB | |
424 | help | |
425 | This option enables support for the SAHARA HW crypto accelerator | |
426 | found in some Freescale i.MX chips. | |
427 | ||
c46ea13f KK |
428 | config CRYPTO_DEV_EXYNOS_RNG |
429 | tristate "EXYNOS HW pseudo random number generator support" | |
430 | depends on ARCH_EXYNOS || COMPILE_TEST | |
431 | depends on HAS_IOMEM | |
432 | select CRYPTO_RNG | |
433 | ---help--- | |
434 | This driver provides kernel-side support through the | |
435 | cryptographic API for the pseudo random number generator hardware | |
436 | found on Exynos SoCs. | |
437 | ||
438 | To compile this driver as a module, choose M here: the | |
439 | module will be called exynos-rng. | |
440 | ||
441 | If unsure, say Y. | |
442 | ||
a49e490c | 443 | config CRYPTO_DEV_S5P |
e922e96f | 444 | tristate "Support for Samsung S5PV210/Exynos crypto accelerator" |
dc1d9dee | 445 | depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST |
ee1b23d1 | 446 | depends on HAS_IOMEM |
a49e490c | 447 | select CRYPTO_AES |
a49e490c VZ |
448 | select CRYPTO_BLKCIPHER |
449 | help | |
450 | This option allows you to have support for S5P crypto acceleration. | |
e922e96f | 451 | Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES |
a49e490c VZ |
452 | algorithms execution. |
453 | ||
c2afad6c KK |
454 | config CRYPTO_DEV_EXYNOS_HASH |
455 | bool "Support for Samsung Exynos HASH accelerator" | |
456 | depends on CRYPTO_DEV_S5P | |
457 | depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m | |
458 | select CRYPTO_SHA1 | |
459 | select CRYPTO_MD5 | |
460 | select CRYPTO_SHA256 | |
461 | help | |
462 | Select this to offload Exynos from HASH MD5/SHA1/SHA256. | |
463 | This will select software SHA1, MD5 and SHA256 as they are | |
464 | needed for small and zero-size messages. | |
465 | HASH algorithms will be disabled if EXYNOS_RNG | |
466 | is enabled due to hw conflict. | |
467 | ||
aef7b31c | 468 | config CRYPTO_DEV_NX |
7011a122 DS |
469 | bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" |
470 | depends on PPC64 | |
aef7b31c | 471 | help |
7011a122 DS |
472 | This enables support for the NX hardware cryptographic accelerator |
473 | coprocessor that is in IBM PowerPC P7+ or later processors. This | |
474 | does not actually enable any drivers, it only allows you to select | |
475 | which acceleration type (encryption and/or compression) to enable. | |
322cacce SJ |
476 | |
477 | if CRYPTO_DEV_NX | |
478 | source "drivers/crypto/nx/Kconfig" | |
479 | endif | |
aef7b31c | 480 | |
2789c08f AW |
481 | config CRYPTO_DEV_UX500 |
482 | tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" | |
483 | depends on ARCH_U8500 | |
2789c08f AW |
484 | help |
485 | Driver for ST-Ericsson UX500 crypto engine. | |
486 | ||
487 | if CRYPTO_DEV_UX500 | |
488 | source "drivers/crypto/ux500/Kconfig" | |
489 | endif # if CRYPTO_DEV_UX500 | |
490 | ||
89a82ef8 CP |
491 | config CRYPTO_DEV_ATMEL_AUTHENC |
492 | tristate "Support for Atmel IPSEC/SSL hw accelerator" | |
ceb4afb3 | 493 | depends on ARCH_AT91 || COMPILE_TEST |
89a82ef8 CP |
494 | select CRYPTO_AUTHENC |
495 | select CRYPTO_DEV_ATMEL_AES | |
496 | select CRYPTO_DEV_ATMEL_SHA | |
497 | help | |
498 | Some Atmel processors can combine the AES and SHA hw accelerators | |
499 | to enhance support of IPSEC/SSL. | |
500 | Select this if you want to use the Atmel modules for | |
501 | authenc(hmac(shaX),Y(cbc)) algorithms. | |
502 | ||
bd3c7b5c NR |
503 | config CRYPTO_DEV_ATMEL_AES |
504 | tristate "Support for Atmel AES hw accelerator" | |
ceb4afb3 | 505 | depends on ARCH_AT91 || COMPILE_TEST |
bd3c7b5c | 506 | select CRYPTO_AES |
d4419548 | 507 | select CRYPTO_AEAD |
bd3c7b5c | 508 | select CRYPTO_BLKCIPHER |
bd3c7b5c NR |
509 | help |
510 | Some Atmel processors have AES hw accelerator. | |
511 | Select this if you want to use the Atmel module for | |
512 | AES algorithms. | |
513 | ||
514 | To compile this driver as a module, choose M here: the module | |
515 | will be called atmel-aes. | |
516 | ||
13802005 NR |
517 | config CRYPTO_DEV_ATMEL_TDES |
518 | tristate "Support for Atmel DES/TDES hw accelerator" | |
ceb4afb3 | 519 | depends on ARCH_AT91 || COMPILE_TEST |
04007b0e | 520 | select CRYPTO_LIB_DES |
13802005 NR |
521 | select CRYPTO_BLKCIPHER |
522 | help | |
523 | Some Atmel processors have DES/TDES hw accelerator. | |
524 | Select this if you want to use the Atmel module for | |
525 | DES/TDES algorithms. | |
526 | ||
527 | To compile this driver as a module, choose M here: the module | |
528 | will be called atmel-tdes. | |
529 | ||
ebc82efa | 530 | config CRYPTO_DEV_ATMEL_SHA |
d4905b38 | 531 | tristate "Support for Atmel SHA hw accelerator" |
ceb4afb3 | 532 | depends on ARCH_AT91 || COMPILE_TEST |
596103cf | 533 | select CRYPTO_HASH |
ebc82efa | 534 | help |
d4905b38 NR |
535 | Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 |
536 | hw accelerator. | |
ebc82efa | 537 | Select this if you want to use the Atmel module for |
d4905b38 | 538 | SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. |
ebc82efa NR |
539 | |
540 | To compile this driver as a module, choose M here: the module | |
541 | will be called atmel-sha. | |
542 | ||
c34a3201 AB |
543 | config CRYPTO_DEV_ATMEL_I2C |
544 | tristate | |
545 | ||
11105693 TDA |
546 | config CRYPTO_DEV_ATMEL_ECC |
547 | tristate "Support for Microchip / Atmel ECC hw accelerator" | |
11105693 | 548 | depends on I2C |
c34a3201 | 549 | select CRYPTO_DEV_ATMEL_I2C |
11105693 TDA |
550 | select CRYPTO_ECDH |
551 | select CRC16 | |
552 | help | |
553 | Microhip / Atmel ECC hw accelerator. | |
554 | Select this if you want to use the Microchip / Atmel module for | |
555 | ECDH algorithm. | |
556 | ||
557 | To compile this driver as a module, choose M here: the module | |
558 | will be called atmel-ecc. | |
559 | ||
da001fb6 AB |
560 | config CRYPTO_DEV_ATMEL_SHA204A |
561 | tristate "Support for Microchip / Atmel SHA accelerator and RNG" | |
562 | depends on I2C | |
563 | select CRYPTO_DEV_ATMEL_I2C | |
564 | select HW_RANDOM | |
4bb02dbd | 565 | select CRC16 |
da001fb6 AB |
566 | help |
567 | Microhip / Atmel SHA accelerator and RNG. | |
568 | Select this if you want to use the Microchip / Atmel SHA204A | |
569 | module as a random number generator. (Other functions of the | |
570 | chip are currently not exposed by this driver) | |
571 | ||
572 | To compile this driver as a module, choose M here: the module | |
573 | will be called atmel-sha204a. | |
574 | ||
f1147660 | 575 | config CRYPTO_DEV_CCP |
720419f0 | 576 | bool "Support for AMD Secure Processor" |
6c506343 | 577 | depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM |
f1147660 | 578 | help |
720419f0 BS |
579 | The AMD Secure Processor provides support for the Cryptographic Coprocessor |
580 | (CCP) and the Platform Security Processor (PSP) devices. | |
f1147660 TL |
581 | |
582 | if CRYPTO_DEV_CCP | |
583 | source "drivers/crypto/ccp/Kconfig" | |
584 | endif | |
585 | ||
15b59e7c MV |
586 | config CRYPTO_DEV_MXS_DCP |
587 | tristate "Support for Freescale MXS DCP" | |
a2712e6c | 588 | depends on (ARCH_MXS || ARCH_MXC) |
dc97fa02 | 589 | select STMP_DEVICE |
15b59e7c MV |
590 | select CRYPTO_CBC |
591 | select CRYPTO_ECB | |
592 | select CRYPTO_AES | |
593 | select CRYPTO_BLKCIPHER | |
596103cf | 594 | select CRYPTO_HASH |
15b59e7c MV |
595 | help |
596 | The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB | |
597 | co-processor on the die. | |
598 | ||
599 | To compile this driver as a module, choose M here: the module | |
600 | will be called mxs-dcp. | |
601 | ||
cea4001a | 602 | source "drivers/crypto/qat/Kconfig" |
62ad8b5c | 603 | source "drivers/crypto/cavium/cpt/Kconfig" |
14fa93cd | 604 | source "drivers/crypto/cavium/nitrox/Kconfig" |
c672752d | 605 | |
640035a2 MC |
606 | config CRYPTO_DEV_CAVIUM_ZIP |
607 | tristate "Cavium ZIP driver" | |
608 | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) | |
609 | ---help--- | |
610 | Select this option if you want to enable compression/decompression | |
611 | acceleration on Cavium's ARM based SoCs | |
612 | ||
c672752d SV |
613 | config CRYPTO_DEV_QCE |
614 | tristate "Qualcomm crypto engine accelerator" | |
ee1b23d1 GU |
615 | depends on ARCH_QCOM || COMPILE_TEST |
616 | depends on HAS_IOMEM | |
c672752d | 617 | select CRYPTO_AES |
04007b0e | 618 | select CRYPTO_LIB_DES |
c672752d SV |
619 | select CRYPTO_ECB |
620 | select CRYPTO_CBC | |
621 | select CRYPTO_XTS | |
622 | select CRYPTO_CTR | |
c672752d SV |
623 | select CRYPTO_BLKCIPHER |
624 | help | |
625 | This driver supports Qualcomm crypto engine accelerator | |
626 | hardware. To compile this driver as a module, choose M here. The | |
627 | module will be called qcrypto. | |
628 | ||
ceec5f5b VK |
629 | config CRYPTO_DEV_QCOM_RNG |
630 | tristate "Qualcomm Random Number Generator Driver" | |
631 | depends on ARCH_QCOM || COMPILE_TEST | |
632 | select CRYPTO_RNG | |
633 | help | |
634 | This driver provides support for the Random Number | |
635 | Generator hardware found on Qualcomm SoCs. | |
636 | ||
637 | To compile this driver as a module, choose M here. The | |
638 | module will be called qcom-rng. If unsure, say N. | |
639 | ||
d2e3ae6f LB |
640 | config CRYPTO_DEV_VMX |
641 | bool "Support for VMX cryptographic acceleration instructions" | |
f1ab4287 | 642 | depends on PPC64 && VSX |
d2e3ae6f LB |
643 | help |
644 | Support for VMX cryptographic acceleration instructions. | |
645 | ||
646 | source "drivers/crypto/vmx/Kconfig" | |
647 | ||
d358f1ab | 648 | config CRYPTO_DEV_IMGTEC_HASH |
d358f1ab | 649 | tristate "Imagination Technologies hardware hash accelerator" |
8c98ebd7 | 650 | depends on MIPS || COMPILE_TEST |
d358f1ab JH |
651 | select CRYPTO_MD5 |
652 | select CRYPTO_SHA1 | |
d358f1ab JH |
653 | select CRYPTO_SHA256 |
654 | select CRYPTO_HASH | |
655 | help | |
656 | This driver interfaces with the Imagination Technologies | |
657 | hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 | |
658 | hashing algorithms. | |
659 | ||
6298e948 LC |
660 | config CRYPTO_DEV_SUN4I_SS |
661 | tristate "Support for Allwinner Security System cryptographic accelerator" | |
f823ab93 | 662 | depends on ARCH_SUNXI && !64BIT |
6298e948 LC |
663 | select CRYPTO_MD5 |
664 | select CRYPTO_SHA1 | |
665 | select CRYPTO_AES | |
04007b0e | 666 | select CRYPTO_LIB_DES |
6298e948 LC |
667 | select CRYPTO_BLKCIPHER |
668 | help | |
669 | Some Allwinner SoC have a crypto accelerator named | |
670 | Security System. Select this if you want to use it. | |
671 | The Security System handle AES/DES/3DES ciphers in CBC mode | |
672 | and SHA1 and MD5 hash algorithms. | |
673 | ||
674 | To compile this driver as a module, choose M here: the module | |
675 | will be called sun4i-ss. | |
676 | ||
b8ae5c73 CL |
677 | config CRYPTO_DEV_SUN4I_SS_PRNG |
678 | bool "Support for Allwinner Security System PRNG" | |
679 | depends on CRYPTO_DEV_SUN4I_SS | |
680 | select CRYPTO_RNG | |
681 | help | |
682 | Select this option if you want to provide kernel-side support for | |
683 | the Pseudo-Random Number Generator found in the Security System. | |
684 | ||
433cd2c6 ZW |
685 | config CRYPTO_DEV_ROCKCHIP |
686 | tristate "Rockchip's Cryptographic Engine driver" | |
687 | depends on OF && ARCH_ROCKCHIP | |
688 | select CRYPTO_AES | |
04007b0e | 689 | select CRYPTO_LIB_DES |
bfd927ff ZW |
690 | select CRYPTO_MD5 |
691 | select CRYPTO_SHA1 | |
692 | select CRYPTO_SHA256 | |
693 | select CRYPTO_HASH | |
433cd2c6 ZW |
694 | select CRYPTO_BLKCIPHER |
695 | ||
696 | help | |
697 | This driver interfaces with the hardware crypto accelerator. | |
698 | Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. | |
699 | ||
785e5c61 RL |
700 | config CRYPTO_DEV_MEDIATEK |
701 | tristate "MediaTek's EIP97 Cryptographic Engine driver" | |
7dee9f61 | 702 | depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST |
785e5c61 | 703 | select CRYPTO_AES |
d03f7b0d | 704 | select CRYPTO_AEAD |
785e5c61 | 705 | select CRYPTO_BLKCIPHER |
d03f7b0d | 706 | select CRYPTO_CTR |
7dee9f61 AB |
707 | select CRYPTO_SHA1 |
708 | select CRYPTO_SHA256 | |
709 | select CRYPTO_SHA512 | |
785e5c61 RL |
710 | select CRYPTO_HMAC |
711 | help | |
712 | This driver allows you to utilize the hardware crypto accelerator | |
713 | EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... | |
714 | Select this if you want to use it for AES/SHA1/SHA2 algorithms. | |
715 | ||
02038fd6 HS |
716 | source "drivers/crypto/chelsio/Kconfig" |
717 | ||
dbaf0624 G |
718 | source "drivers/crypto/virtio/Kconfig" |
719 | ||
9d12ba86 RR |
720 | config CRYPTO_DEV_BCM_SPU |
721 | tristate "Broadcom symmetric crypto/hash acceleration support" | |
722 | depends on ARCH_BCM_IPROC | |
efc856ed | 723 | depends on MAILBOX |
9d12ba86 | 724 | default m |
ab57b335 | 725 | select CRYPTO_AUTHENC |
04007b0e | 726 | select CRYPTO_LIB_DES |
9d12ba86 RR |
727 | select CRYPTO_MD5 |
728 | select CRYPTO_SHA1 | |
729 | select CRYPTO_SHA256 | |
730 | select CRYPTO_SHA512 | |
731 | help | |
732 | This driver provides support for Broadcom crypto acceleration using the | |
733 | Secure Processing Unit (SPU). The SPU driver registers ablkcipher, | |
734 | ahash, and aead algorithms with the kernel cryptographic API. | |
735 | ||
b51dbe90 FD |
736 | source "drivers/crypto/stm32/Kconfig" |
737 | ||
1b44c5a6 AT |
738 | config CRYPTO_DEV_SAFEXCEL |
739 | tristate "Inside Secure's SafeXcel cryptographic engine driver" | |
0f6e5c82 | 740 | depends on OF || PCI || COMPILE_TEST |
363a90c2 | 741 | select CRYPTO_LIB_AES |
f6beaea3 | 742 | select CRYPTO_AUTHENC |
1b44c5a6 | 743 | select CRYPTO_BLKCIPHER |
04007b0e | 744 | select CRYPTO_LIB_DES |
1b44c5a6 AT |
745 | select CRYPTO_HASH |
746 | select CRYPTO_HMAC | |
293f89cf | 747 | select CRYPTO_MD5 |
1b44c5a6 AT |
748 | select CRYPTO_SHA1 |
749 | select CRYPTO_SHA256 | |
750 | select CRYPTO_SHA512 | |
751 | help | |
0f6e5c82 PL |
752 | This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic |
753 | engines designed by Inside Secure. It currently accelerates DES, 3DES and | |
754 | AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, | |
755 | SHA384 and SHA512 hash algorithms for both basic hash and HMAC. | |
756 | Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. | |
1b44c5a6 | 757 | |
a21eb94f LP |
758 | config CRYPTO_DEV_ARTPEC6 |
759 | tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." | |
760 | depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) | |
a21eb94f LP |
761 | depends on OF |
762 | select CRYPTO_AEAD | |
763 | select CRYPTO_AES | |
764 | select CRYPTO_ALGAPI | |
765 | select CRYPTO_BLKCIPHER | |
766 | select CRYPTO_CTR | |
767 | select CRYPTO_HASH | |
768 | select CRYPTO_SHA1 | |
769 | select CRYPTO_SHA256 | |
a21eb94f LP |
770 | select CRYPTO_SHA512 |
771 | help | |
772 | Enables the driver for the on-chip crypto accelerator | |
773 | of Axis ARTPEC SoCs. | |
774 | ||
775 | To compile this driver as a module, choose M here. | |
776 | ||
4c3f9727 GBY |
777 | config CRYPTO_DEV_CCREE |
778 | tristate "Support for ARM TrustZone CryptoCell family of security processors" | |
779 | depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA | |
780 | default n | |
781 | select CRYPTO_HASH | |
782 | select CRYPTO_BLKCIPHER | |
04007b0e | 783 | select CRYPTO_LIB_DES |
4c3f9727 GBY |
784 | select CRYPTO_AEAD |
785 | select CRYPTO_AUTHENC | |
786 | select CRYPTO_SHA1 | |
787 | select CRYPTO_MD5 | |
788 | select CRYPTO_SHA256 | |
789 | select CRYPTO_SHA512 | |
790 | select CRYPTO_HMAC | |
791 | select CRYPTO_AES | |
792 | select CRYPTO_CBC | |
793 | select CRYPTO_ECB | |
794 | select CRYPTO_CTR | |
795 | select CRYPTO_XTS | |
9b8d51f8 | 796 | select CRYPTO_SM4 |
927574e0 | 797 | select CRYPTO_SM3 |
4c3f9727 | 798 | help |
27b3b22d GBY |
799 | Say 'Y' to enable a driver for the REE interface of the Arm |
800 | TrustZone CryptoCell family of processors. Currently the | |
1c876a90 | 801 | CryptoCell 713, 703, 712, 710 and 630 are supported. |
4c3f9727 GBY |
802 | Choose this if you wish to use hardware acceleration of |
803 | cryptographic operations on the system REE. | |
804 | If unsure say Y. | |
805 | ||
915e4e84 JC |
806 | source "drivers/crypto/hisilicon/Kconfig" |
807 | ||
b511431d | 808 | endif # CRYPTO_HW |