Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
b511431d JE |
2 | |
3 | menuconfig CRYPTO_HW | |
4 | bool "Hardware crypto devices" | |
5 | default y | |
06bfb7eb JE |
6 | ---help--- |
7 | Say Y here to get to see options for hardware crypto devices and | |
8 | processors. This option alone does not add any kernel code. | |
9 | ||
10 | If you say N, all options in this submenu will be skipped and disabled. | |
b511431d JE |
11 | |
12 | if CRYPTO_HW | |
1da177e4 | 13 | |
3914b931 CL |
14 | source "drivers/crypto/allwinner/Kconfig" |
15 | ||
1da177e4 | 16 | config CRYPTO_DEV_PADLOCK |
d158325e | 17 | tristate "Support for VIA PadLock ACE" |
2f817418 | 18 | depends on X86 && !UML |
1da177e4 LT |
19 | help |
20 | Some VIA processors come with an integrated crypto engine | |
21 | (so called VIA PadLock ACE, Advanced Cryptography Engine) | |
1191f0a4 ML |
22 | that provides instructions for very fast cryptographic |
23 | operations with supported algorithms. | |
1da177e4 LT |
24 | |
25 | The instructions are used only when the CPU supports them. | |
5644bda5 ML |
26 | Otherwise software encryption is used. |
27 | ||
1da177e4 | 28 | config CRYPTO_DEV_PADLOCK_AES |
1191f0a4 | 29 | tristate "PadLock driver for AES algorithm" |
1da177e4 | 30 | depends on CRYPTO_DEV_PADLOCK |
b95bba5d | 31 | select CRYPTO_SKCIPHER |
8131878d | 32 | select CRYPTO_LIB_AES |
1da177e4 LT |
33 | help |
34 | Use VIA PadLock for AES algorithm. | |
35 | ||
1191f0a4 ML |
36 | Available in VIA C3 and newer CPUs. |
37 | ||
38 | If unsure say M. The compiled module will be | |
4737f097 | 39 | called padlock-aes. |
1191f0a4 | 40 | |
6c833275 ML |
41 | config CRYPTO_DEV_PADLOCK_SHA |
42 | tristate "PadLock driver for SHA1 and SHA256 algorithms" | |
43 | depends on CRYPTO_DEV_PADLOCK | |
bbbee467 | 44 | select CRYPTO_HASH |
6c833275 ML |
45 | select CRYPTO_SHA1 |
46 | select CRYPTO_SHA256 | |
6c833275 ML |
47 | help |
48 | Use VIA PadLock for SHA1/SHA256 algorithms. | |
49 | ||
50 | Available in VIA C7 and newer processors. | |
51 | ||
52 | If unsure say M. The compiled module will be | |
4737f097 | 53 | called padlock-sha. |
6c833275 | 54 | |
9fe757b0 JC |
55 | config CRYPTO_DEV_GEODE |
56 | tristate "Support for the Geode LX AES engine" | |
f6259dea | 57 | depends on X86_32 && PCI |
9fe757b0 | 58 | select CRYPTO_ALGAPI |
b95bba5d | 59 | select CRYPTO_SKCIPHER |
9fe757b0 JC |
60 | help |
61 | Say 'Y' here to use the AMD Geode LX processor on-board AES | |
3dde6ad8 | 62 | engine for the CryptoAPI AES algorithm. |
9fe757b0 JC |
63 | |
64 | To compile this driver as a module, choose M here: the module | |
65 | will be called geode-aes. | |
66 | ||
61d48c2c | 67 | config ZCRYPT |
a3358e3d | 68 | tristate "Support for s390 cryptographic adapters" |
61d48c2c | 69 | depends on S390 |
2f7c8bd6 | 70 | select HW_RANDOM |
61d48c2c | 71 | help |
a3358e3d HF |
72 | Select this option if you want to enable support for |
73 | s390 cryptographic adapters like: | |
61d48c2c | 74 | + PCI-X Cryptographic Coprocessor (PCIXCC) |
a3358e3d HF |
75 | + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) |
76 | + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) | |
77 | + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) | |
61d48c2c | 78 | |
00fab235 HF |
79 | config ZCRYPT_MULTIDEVNODES |
80 | bool "Support for multiple zcrypt device nodes" | |
81 | default y | |
82 | depends on S390 | |
83 | depends on ZCRYPT | |
84 | help | |
85 | With this option enabled the zcrypt device driver can | |
86 | provide multiple devices nodes in /dev. Each device | |
87 | node can get customized to limit access and narrow | |
88 | down the use of the available crypto hardware. | |
89 | ||
e80d4af0 HF |
90 | config PKEY |
91 | tristate "Kernel API for protected key handling" | |
92 | depends on S390 | |
93 | depends on ZCRYPT | |
94 | help | |
95 | With this option enabled the pkey kernel module provides an API | |
96 | for creation and handling of protected keys. Other parts of the | |
97 | kernel or userspace applications may use these functions. | |
98 | ||
99 | Select this option if you want to enable the kernel and userspace | |
100 | API for proteced key handling. | |
101 | ||
102 | Please note that creation of protected keys from secure keys | |
103 | requires to have at least one CEX card in coprocessor mode | |
104 | available at runtime. | |
61d48c2c | 105 | |
c4684f98 HF |
106 | config CRYPTO_PAES_S390 |
107 | tristate "PAES cipher algorithms" | |
108 | depends on S390 | |
109 | depends on ZCRYPT | |
110 | depends on PKEY | |
111 | select CRYPTO_ALGAPI | |
b95bba5d | 112 | select CRYPTO_SKCIPHER |
c4684f98 HF |
113 | help |
114 | This is the s390 hardware accelerated implementation of the | |
115 | AES cipher algorithms for use with protected key. | |
116 | ||
117 | Select this option if you want to use the paes cipher | |
118 | for example to use protected key encrypted devices. | |
119 | ||
3f5615e0 JG |
120 | config CRYPTO_SHA1_S390 |
121 | tristate "SHA1 digest algorithm" | |
122 | depends on S390 | |
563f346d | 123 | select CRYPTO_HASH |
3f5615e0 JG |
124 | help |
125 | This is the s390 hardware accelerated implementation of the | |
126 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). | |
127 | ||
d393d9b8 JG |
128 | It is available as of z990. |
129 | ||
3f5615e0 JG |
130 | config CRYPTO_SHA256_S390 |
131 | tristate "SHA256 digest algorithm" | |
132 | depends on S390 | |
563f346d | 133 | select CRYPTO_HASH |
3f5615e0 JG |
134 | help |
135 | This is the s390 hardware accelerated implementation of the | |
136 | SHA256 secure hash standard (DFIPS 180-2). | |
137 | ||
d393d9b8 | 138 | It is available as of z9. |
3f5615e0 | 139 | |
291dc7c0 | 140 | config CRYPTO_SHA512_S390 |
4e2c6d7f | 141 | tristate "SHA384 and SHA512 digest algorithm" |
291dc7c0 | 142 | depends on S390 |
563f346d | 143 | select CRYPTO_HASH |
291dc7c0 JG |
144 | help |
145 | This is the s390 hardware accelerated implementation of the | |
146 | SHA512 secure hash standard. | |
147 | ||
d393d9b8 | 148 | It is available as of z10. |
291dc7c0 | 149 | |
3c2eb6b7 JS |
150 | config CRYPTO_SHA3_256_S390 |
151 | tristate "SHA3_224 and SHA3_256 digest algorithm" | |
152 | depends on S390 | |
153 | select CRYPTO_HASH | |
154 | help | |
155 | This is the s390 hardware accelerated implementation of the | |
156 | SHA3_256 secure hash standard. | |
157 | ||
158 | It is available as of z14. | |
159 | ||
160 | config CRYPTO_SHA3_512_S390 | |
161 | tristate "SHA3_384 and SHA3_512 digest algorithm" | |
162 | depends on S390 | |
163 | select CRYPTO_HASH | |
164 | help | |
165 | This is the s390 hardware accelerated implementation of the | |
166 | SHA3_512 secure hash standard. | |
167 | ||
168 | It is available as of z14. | |
169 | ||
3f5615e0 JG |
170 | config CRYPTO_DES_S390 |
171 | tristate "DES and Triple DES cipher algorithms" | |
172 | depends on S390 | |
173 | select CRYPTO_ALGAPI | |
b95bba5d | 174 | select CRYPTO_SKCIPHER |
04007b0e | 175 | select CRYPTO_LIB_DES |
3f5615e0 | 176 | help |
0200f3ec | 177 | This is the s390 hardware accelerated implementation of the |
3f5615e0 JG |
178 | DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). |
179 | ||
0200f3ec GS |
180 | As of z990 the ECB and CBC mode are hardware accelerated. |
181 | As of z196 the CTR mode is hardware accelerated. | |
182 | ||
3f5615e0 JG |
183 | config CRYPTO_AES_S390 |
184 | tristate "AES cipher algorithms" | |
185 | depends on S390 | |
186 | select CRYPTO_ALGAPI | |
b95bba5d | 187 | select CRYPTO_SKCIPHER |
3f5615e0 JG |
188 | help |
189 | This is the s390 hardware accelerated implementation of the | |
99d97222 GS |
190 | AES cipher algorithms (FIPS-197). |
191 | ||
192 | As of z9 the ECB and CBC modes are hardware accelerated | |
193 | for 128 bit keys. | |
194 | As of z10 the ECB and CBC modes are hardware accelerated | |
195 | for all AES key sizes. | |
0200f3ec GS |
196 | As of z196 the CTR mode is hardware accelerated for all AES |
197 | key sizes and XTS mode is hardware accelerated for 256 and | |
99d97222 | 198 | 512 bit keys. |
3f5615e0 JG |
199 | |
200 | config S390_PRNG | |
201 | tristate "Pseudo random number generator device driver" | |
202 | depends on S390 | |
203 | default "m" | |
204 | help | |
205 | Select this option if you want to use the s390 pseudo random number | |
206 | generator. The PRNG is part of the cryptographic processor functions | |
207 | and uses triple-DES to generate secure random numbers like the | |
d393d9b8 JG |
208 | ANSI X9.17 standard. User-space programs access the |
209 | pseudo-random-number device through the char device /dev/prandom. | |
210 | ||
211 | It is available as of z9. | |
3f5615e0 | 212 | |
df1309ce | 213 | config CRYPTO_GHASH_S390 |
8dfa20fc | 214 | tristate "GHASH hash function" |
df1309ce GS |
215 | depends on S390 |
216 | select CRYPTO_HASH | |
217 | help | |
8dfa20fc EB |
218 | This is the s390 hardware accelerated implementation of GHASH, |
219 | the hash function used in GCM (Galois/Counter mode). | |
df1309ce GS |
220 | |
221 | It is available as of z196. | |
222 | ||
f848dbd3 HB |
223 | config CRYPTO_CRC32_S390 |
224 | tristate "CRC-32 algorithms" | |
225 | depends on S390 | |
226 | select CRYPTO_HASH | |
227 | select CRC32 | |
228 | help | |
229 | Select this option if you want to use hardware accelerated | |
230 | implementations of CRC algorithms. With this option, you | |
231 | can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) | |
232 | and CRC-32C (Castagnoli). | |
233 | ||
234 | It is available with IBM z13 or later. | |
235 | ||
f63601fd | 236 | config CRYPTO_DEV_MARVELL_CESA |
27b43fd9 | 237 | tristate "Marvell's Cryptographic Engine driver" |
fe55dfdc | 238 | depends on PLAT_ORION || ARCH_MVEBU |
18d8b96d | 239 | select CRYPTO_LIB_AES |
04007b0e | 240 | select CRYPTO_LIB_DES |
b95bba5d | 241 | select CRYPTO_SKCIPHER |
f63601fd BB |
242 | select CRYPTO_HASH |
243 | select SRAM | |
244 | help | |
245 | This driver allows you to utilize the Cryptographic Engines and | |
27b43fd9 BB |
246 | Security Accelerator (CESA) which can be found on MVEBU and ORION |
247 | platforms. | |
db509a45 | 248 | This driver supports CPU offload through DMA transfers. |
f63601fd | 249 | |
0a625fd2 DM |
250 | config CRYPTO_DEV_NIAGARA2 |
251 | tristate "Niagara2 Stream Processing Unit driver" | |
04007b0e | 252 | select CRYPTO_LIB_DES |
b95bba5d | 253 | select CRYPTO_SKCIPHER |
596103cf | 254 | select CRYPTO_HASH |
8054b800 LC |
255 | select CRYPTO_MD5 |
256 | select CRYPTO_SHA1 | |
257 | select CRYPTO_SHA256 | |
0a625fd2 DM |
258 | depends on SPARC64 |
259 | help | |
260 | Each core of a Niagara2 processor contains a Stream | |
261 | Processing Unit, which itself contains several cryptographic | |
262 | sub-units. One set provides the Modular Arithmetic Unit, | |
263 | used for SSL offload. The other set provides the Cipher | |
264 | Group, which can perform encryption, decryption, hashing, | |
265 | checksumming, and raw copies. | |
266 | ||
f7d0561e EP |
267 | config CRYPTO_DEV_HIFN_795X |
268 | tristate "Driver HIFN 795x crypto accelerator chips" | |
04007b0e | 269 | select CRYPTO_LIB_DES |
b95bba5d | 270 | select CRYPTO_SKCIPHER |
946fef4e | 271 | select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG |
2707b937 | 272 | depends on PCI |
75b76625 | 273 | depends on !ARCH_DMA_ADDR_T_64BIT |
f7d0561e EP |
274 | help |
275 | This option allows you to have support for HIFN 795x crypto adapters. | |
276 | ||
946fef4e HX |
277 | config CRYPTO_DEV_HIFN_795X_RNG |
278 | bool "HIFN 795x random number generator" | |
279 | depends on CRYPTO_DEV_HIFN_795X | |
280 | help | |
281 | Select this option if you want to enable the random number generator | |
282 | on the HIFN 795x crypto adapters. | |
f7d0561e | 283 | |
8636a1f9 | 284 | source "drivers/crypto/caam/Kconfig" |
8e8ec596 | 285 | |
9c4a7965 KP |
286 | config CRYPTO_DEV_TALITOS |
287 | tristate "Talitos Freescale Security Engine (SEC)" | |
596103cf | 288 | select CRYPTO_AEAD |
9c4a7965 | 289 | select CRYPTO_AUTHENC |
b95bba5d | 290 | select CRYPTO_SKCIPHER |
596103cf | 291 | select CRYPTO_HASH |
9c4a7965 KP |
292 | select HW_RANDOM |
293 | depends on FSL_SOC | |
294 | help | |
295 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
296 | to offload cryptographic algorithm computation. | |
297 | ||
298 | The Freescale SEC is present on PowerQUICC 'E' processors, such | |
299 | as the MPC8349E and MPC8548E. | |
300 | ||
301 | To compile this driver as a module, choose M here: the module | |
302 | will be called talitos. | |
303 | ||
5b841a65 LC |
304 | config CRYPTO_DEV_TALITOS1 |
305 | bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" | |
306 | depends on CRYPTO_DEV_TALITOS | |
307 | depends on PPC_8xx || PPC_82xx | |
308 | default y | |
309 | help | |
310 | Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 | |
311 | found on MPC82xx or the Freescale Security Engine (SEC Lite) | |
312 | version 1.2 found on MPC8xx | |
313 | ||
314 | config CRYPTO_DEV_TALITOS2 | |
315 | bool "SEC2+ (SEC version 2.0 or upper)" | |
316 | depends on CRYPTO_DEV_TALITOS | |
317 | default y if !PPC_8xx | |
318 | help | |
319 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
320 | version 2 and following as found on MPC83xx, MPC85xx, etc ... | |
321 | ||
81bef015 CH |
322 | config CRYPTO_DEV_IXP4XX |
323 | tristate "Driver for IXP4xx crypto hardware acceleration" | |
9665c52b | 324 | depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE |
04007b0e | 325 | select CRYPTO_LIB_DES |
596103cf | 326 | select CRYPTO_AEAD |
090657e4 | 327 | select CRYPTO_AUTHENC |
b95bba5d | 328 | select CRYPTO_SKCIPHER |
81bef015 CH |
329 | help |
330 | Driver for the IXP4xx NPE crypto engine. | |
331 | ||
049359d6 JH |
332 | config CRYPTO_DEV_PPC4XX |
333 | tristate "Driver AMCC PPC4xx crypto accelerator" | |
334 | depends on PPC && 4xx | |
335 | select CRYPTO_HASH | |
a0aae821 | 336 | select CRYPTO_AEAD |
298b4c60 | 337 | select CRYPTO_AES |
da3e7a97 | 338 | select CRYPTO_LIB_AES |
a0aae821 | 339 | select CRYPTO_CCM |
98e87e3d | 340 | select CRYPTO_CTR |
a0aae821 | 341 | select CRYPTO_GCM |
b95bba5d | 342 | select CRYPTO_SKCIPHER |
049359d6 JH |
343 | help |
344 | This option allows you to have support for AMCC crypto acceleration. | |
345 | ||
5343e674 CL |
346 | config HW_RANDOM_PPC4XX |
347 | bool "PowerPC 4xx generic true random number generator support" | |
348 | depends on CRYPTO_DEV_PPC4XX && HW_RANDOM | |
349 | default y | |
350 | ---help--- | |
351 | This option provides the kernel-side support for the TRNG hardware | |
352 | found in the security function of some PowerPC 4xx SoCs. | |
353 | ||
74ed87e7 TK |
354 | config CRYPTO_DEV_OMAP |
355 | tristate "Support for OMAP crypto HW accelerators" | |
356 | depends on ARCH_OMAP2PLUS | |
357 | help | |
358 | OMAP processors have various crypto HW accelerators. Select this if | |
359 | you want to use the OMAP modules for any of the crypto algorithms. | |
360 | ||
361 | if CRYPTO_DEV_OMAP | |
362 | ||
8628e7c8 | 363 | config CRYPTO_DEV_OMAP_SHAM |
eaef7e3f LV |
364 | tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" |
365 | depends on ARCH_OMAP2PLUS | |
8628e7c8 DK |
366 | select CRYPTO_SHA1 |
367 | select CRYPTO_MD5 | |
eaef7e3f LV |
368 | select CRYPTO_SHA256 |
369 | select CRYPTO_SHA512 | |
370 | select CRYPTO_HMAC | |
8628e7c8 | 371 | help |
eaef7e3f LV |
372 | OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you |
373 | want to use the OMAP module for MD5/SHA1/SHA2 algorithms. | |
8628e7c8 | 374 | |
537559a5 DK |
375 | config CRYPTO_DEV_OMAP_AES |
376 | tristate "Support for OMAP AES hw engine" | |
1bbf6437 | 377 | depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS |
537559a5 | 378 | select CRYPTO_AES |
b95bba5d | 379 | select CRYPTO_SKCIPHER |
0529900a | 380 | select CRYPTO_ENGINE |
9fcb191a LV |
381 | select CRYPTO_CBC |
382 | select CRYPTO_ECB | |
383 | select CRYPTO_CTR | |
ad18cc9d | 384 | select CRYPTO_AEAD |
537559a5 DK |
385 | help |
386 | OMAP processors have AES module accelerator. Select this if you | |
387 | want to use the OMAP module for AES algorithms. | |
388 | ||
701d0f19 | 389 | config CRYPTO_DEV_OMAP_DES |
97ee7ed3 | 390 | tristate "Support for OMAP DES/3DES hw engine" |
701d0f19 | 391 | depends on ARCH_OMAP2PLUS |
04007b0e | 392 | select CRYPTO_LIB_DES |
b95bba5d | 393 | select CRYPTO_SKCIPHER |
f1b77aac | 394 | select CRYPTO_ENGINE |
701d0f19 JF |
395 | help |
396 | OMAP processors have DES/3DES module accelerator. Select this if you | |
397 | want to use the OMAP module for DES and 3DES algorithms. Currently | |
97ee7ed3 PM |
398 | the ECB and CBC modes of operation are supported by the driver. Also |
399 | accesses made on unaligned boundaries are supported. | |
701d0f19 | 400 | |
74ed87e7 TK |
401 | endif # CRYPTO_DEV_OMAP |
402 | ||
ce921368 JI |
403 | config CRYPTO_DEV_PICOXCELL |
404 | tristate "Support for picoXcell IPSEC and Layer2 crypto engines" | |
4f44d86d | 405 | depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK |
596103cf | 406 | select CRYPTO_AEAD |
ce921368 JI |
407 | select CRYPTO_AES |
408 | select CRYPTO_AUTHENC | |
b95bba5d | 409 | select CRYPTO_SKCIPHER |
04007b0e | 410 | select CRYPTO_LIB_DES |
ce921368 JI |
411 | select CRYPTO_CBC |
412 | select CRYPTO_ECB | |
413 | select CRYPTO_SEQIV | |
414 | help | |
415 | This option enables support for the hardware offload engines in the | |
416 | Picochip picoXcell SoC devices. Select this for IPSEC ESP offload | |
417 | and for 3gpp Layer 2 ciphering support. | |
418 | ||
309b77e0 | 419 | Saying m here will build a module named picoxcell_crypto. |
ce921368 | 420 | |
5de88752 JM |
421 | config CRYPTO_DEV_SAHARA |
422 | tristate "Support for SAHARA crypto accelerator" | |
74d24d83 | 423 | depends on ARCH_MXC && OF |
b95bba5d | 424 | select CRYPTO_SKCIPHER |
5de88752 JM |
425 | select CRYPTO_AES |
426 | select CRYPTO_ECB | |
427 | help | |
428 | This option enables support for the SAHARA HW crypto accelerator | |
429 | found in some Freescale i.MX chips. | |
430 | ||
c46ea13f KK |
431 | config CRYPTO_DEV_EXYNOS_RNG |
432 | tristate "EXYNOS HW pseudo random number generator support" | |
433 | depends on ARCH_EXYNOS || COMPILE_TEST | |
434 | depends on HAS_IOMEM | |
435 | select CRYPTO_RNG | |
436 | ---help--- | |
437 | This driver provides kernel-side support through the | |
438 | cryptographic API for the pseudo random number generator hardware | |
439 | found on Exynos SoCs. | |
440 | ||
441 | To compile this driver as a module, choose M here: the | |
442 | module will be called exynos-rng. | |
443 | ||
444 | If unsure, say Y. | |
445 | ||
a49e490c | 446 | config CRYPTO_DEV_S5P |
e922e96f | 447 | tristate "Support for Samsung S5PV210/Exynos crypto accelerator" |
dc1d9dee | 448 | depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST |
ee1b23d1 | 449 | depends on HAS_IOMEM |
a49e490c | 450 | select CRYPTO_AES |
b95bba5d | 451 | select CRYPTO_SKCIPHER |
a49e490c VZ |
452 | help |
453 | This option allows you to have support for S5P crypto acceleration. | |
e922e96f | 454 | Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES |
a49e490c VZ |
455 | algorithms execution. |
456 | ||
c2afad6c KK |
457 | config CRYPTO_DEV_EXYNOS_HASH |
458 | bool "Support for Samsung Exynos HASH accelerator" | |
459 | depends on CRYPTO_DEV_S5P | |
460 | depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m | |
461 | select CRYPTO_SHA1 | |
462 | select CRYPTO_MD5 | |
463 | select CRYPTO_SHA256 | |
464 | help | |
465 | Select this to offload Exynos from HASH MD5/SHA1/SHA256. | |
466 | This will select software SHA1, MD5 and SHA256 as they are | |
467 | needed for small and zero-size messages. | |
468 | HASH algorithms will be disabled if EXYNOS_RNG | |
469 | is enabled due to hw conflict. | |
470 | ||
aef7b31c | 471 | config CRYPTO_DEV_NX |
7011a122 DS |
472 | bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" |
473 | depends on PPC64 | |
aef7b31c | 474 | help |
7011a122 DS |
475 | This enables support for the NX hardware cryptographic accelerator |
476 | coprocessor that is in IBM PowerPC P7+ or later processors. This | |
477 | does not actually enable any drivers, it only allows you to select | |
478 | which acceleration type (encryption and/or compression) to enable. | |
322cacce SJ |
479 | |
480 | if CRYPTO_DEV_NX | |
481 | source "drivers/crypto/nx/Kconfig" | |
482 | endif | |
aef7b31c | 483 | |
2789c08f AW |
484 | config CRYPTO_DEV_UX500 |
485 | tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" | |
486 | depends on ARCH_U8500 | |
2789c08f AW |
487 | help |
488 | Driver for ST-Ericsson UX500 crypto engine. | |
489 | ||
490 | if CRYPTO_DEV_UX500 | |
491 | source "drivers/crypto/ux500/Kconfig" | |
492 | endif # if CRYPTO_DEV_UX500 | |
493 | ||
89a82ef8 | 494 | config CRYPTO_DEV_ATMEL_AUTHENC |
aee1f9f3 | 495 | bool "Support for Atmel IPSEC/SSL hw accelerator" |
ceb4afb3 | 496 | depends on ARCH_AT91 || COMPILE_TEST |
aee1f9f3 | 497 | depends on CRYPTO_DEV_ATMEL_AES |
89a82ef8 CP |
498 | help |
499 | Some Atmel processors can combine the AES and SHA hw accelerators | |
500 | to enhance support of IPSEC/SSL. | |
501 | Select this if you want to use the Atmel modules for | |
502 | authenc(hmac(shaX),Y(cbc)) algorithms. | |
503 | ||
bd3c7b5c NR |
504 | config CRYPTO_DEV_ATMEL_AES |
505 | tristate "Support for Atmel AES hw accelerator" | |
ceb4afb3 | 506 | depends on ARCH_AT91 || COMPILE_TEST |
bd3c7b5c | 507 | select CRYPTO_AES |
d4419548 | 508 | select CRYPTO_AEAD |
b95bba5d | 509 | select CRYPTO_SKCIPHER |
aee1f9f3 Y |
510 | select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC |
511 | select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC | |
bd3c7b5c NR |
512 | help |
513 | Some Atmel processors have AES hw accelerator. | |
514 | Select this if you want to use the Atmel module for | |
515 | AES algorithms. | |
516 | ||
517 | To compile this driver as a module, choose M here: the module | |
518 | will be called atmel-aes. | |
519 | ||
13802005 NR |
520 | config CRYPTO_DEV_ATMEL_TDES |
521 | tristate "Support for Atmel DES/TDES hw accelerator" | |
ceb4afb3 | 522 | depends on ARCH_AT91 || COMPILE_TEST |
04007b0e | 523 | select CRYPTO_LIB_DES |
b95bba5d | 524 | select CRYPTO_SKCIPHER |
13802005 NR |
525 | help |
526 | Some Atmel processors have DES/TDES hw accelerator. | |
527 | Select this if you want to use the Atmel module for | |
528 | DES/TDES algorithms. | |
529 | ||
530 | To compile this driver as a module, choose M here: the module | |
531 | will be called atmel-tdes. | |
532 | ||
ebc82efa | 533 | config CRYPTO_DEV_ATMEL_SHA |
d4905b38 | 534 | tristate "Support for Atmel SHA hw accelerator" |
ceb4afb3 | 535 | depends on ARCH_AT91 || COMPILE_TEST |
596103cf | 536 | select CRYPTO_HASH |
ebc82efa | 537 | help |
d4905b38 NR |
538 | Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 |
539 | hw accelerator. | |
ebc82efa | 540 | Select this if you want to use the Atmel module for |
d4905b38 | 541 | SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. |
ebc82efa NR |
542 | |
543 | To compile this driver as a module, choose M here: the module | |
544 | will be called atmel-sha. | |
545 | ||
c34a3201 AB |
546 | config CRYPTO_DEV_ATMEL_I2C |
547 | tristate | |
548 | ||
11105693 TDA |
549 | config CRYPTO_DEV_ATMEL_ECC |
550 | tristate "Support for Microchip / Atmel ECC hw accelerator" | |
11105693 | 551 | depends on I2C |
c34a3201 | 552 | select CRYPTO_DEV_ATMEL_I2C |
11105693 TDA |
553 | select CRYPTO_ECDH |
554 | select CRC16 | |
555 | help | |
556 | Microhip / Atmel ECC hw accelerator. | |
557 | Select this if you want to use the Microchip / Atmel module for | |
558 | ECDH algorithm. | |
559 | ||
560 | To compile this driver as a module, choose M here: the module | |
561 | will be called atmel-ecc. | |
562 | ||
da001fb6 AB |
563 | config CRYPTO_DEV_ATMEL_SHA204A |
564 | tristate "Support for Microchip / Atmel SHA accelerator and RNG" | |
565 | depends on I2C | |
566 | select CRYPTO_DEV_ATMEL_I2C | |
567 | select HW_RANDOM | |
4bb02dbd | 568 | select CRC16 |
da001fb6 AB |
569 | help |
570 | Microhip / Atmel SHA accelerator and RNG. | |
571 | Select this if you want to use the Microchip / Atmel SHA204A | |
572 | module as a random number generator. (Other functions of the | |
573 | chip are currently not exposed by this driver) | |
574 | ||
575 | To compile this driver as a module, choose M here: the module | |
576 | will be called atmel-sha204a. | |
577 | ||
f1147660 | 578 | config CRYPTO_DEV_CCP |
720419f0 | 579 | bool "Support for AMD Secure Processor" |
6c506343 | 580 | depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM |
f1147660 | 581 | help |
720419f0 BS |
582 | The AMD Secure Processor provides support for the Cryptographic Coprocessor |
583 | (CCP) and the Platform Security Processor (PSP) devices. | |
f1147660 TL |
584 | |
585 | if CRYPTO_DEV_CCP | |
586 | source "drivers/crypto/ccp/Kconfig" | |
587 | endif | |
588 | ||
15b59e7c MV |
589 | config CRYPTO_DEV_MXS_DCP |
590 | tristate "Support for Freescale MXS DCP" | |
a2712e6c | 591 | depends on (ARCH_MXS || ARCH_MXC) |
dc97fa02 | 592 | select STMP_DEVICE |
15b59e7c MV |
593 | select CRYPTO_CBC |
594 | select CRYPTO_ECB | |
595 | select CRYPTO_AES | |
b95bba5d | 596 | select CRYPTO_SKCIPHER |
596103cf | 597 | select CRYPTO_HASH |
15b59e7c MV |
598 | help |
599 | The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB | |
600 | co-processor on the die. | |
601 | ||
602 | To compile this driver as a module, choose M here: the module | |
603 | will be called mxs-dcp. | |
604 | ||
cea4001a | 605 | source "drivers/crypto/qat/Kconfig" |
62ad8b5c | 606 | source "drivers/crypto/cavium/cpt/Kconfig" |
14fa93cd | 607 | source "drivers/crypto/cavium/nitrox/Kconfig" |
c672752d | 608 | |
640035a2 MC |
609 | config CRYPTO_DEV_CAVIUM_ZIP |
610 | tristate "Cavium ZIP driver" | |
611 | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) | |
612 | ---help--- | |
613 | Select this option if you want to enable compression/decompression | |
614 | acceleration on Cavium's ARM based SoCs | |
615 | ||
c672752d SV |
616 | config CRYPTO_DEV_QCE |
617 | tristate "Qualcomm crypto engine accelerator" | |
ee1b23d1 GU |
618 | depends on ARCH_QCOM || COMPILE_TEST |
619 | depends on HAS_IOMEM | |
c672752d | 620 | select CRYPTO_AES |
04007b0e | 621 | select CRYPTO_LIB_DES |
c672752d SV |
622 | select CRYPTO_ECB |
623 | select CRYPTO_CBC | |
624 | select CRYPTO_XTS | |
625 | select CRYPTO_CTR | |
b95bba5d | 626 | select CRYPTO_SKCIPHER |
c672752d SV |
627 | help |
628 | This driver supports Qualcomm crypto engine accelerator | |
629 | hardware. To compile this driver as a module, choose M here. The | |
630 | module will be called qcrypto. | |
631 | ||
ceec5f5b VK |
632 | config CRYPTO_DEV_QCOM_RNG |
633 | tristate "Qualcomm Random Number Generator Driver" | |
634 | depends on ARCH_QCOM || COMPILE_TEST | |
635 | select CRYPTO_RNG | |
636 | help | |
637 | This driver provides support for the Random Number | |
638 | Generator hardware found on Qualcomm SoCs. | |
639 | ||
640 | To compile this driver as a module, choose M here. The | |
641 | module will be called qcom-rng. If unsure, say N. | |
642 | ||
d2e3ae6f LB |
643 | config CRYPTO_DEV_VMX |
644 | bool "Support for VMX cryptographic acceleration instructions" | |
f1ab4287 | 645 | depends on PPC64 && VSX |
d2e3ae6f LB |
646 | help |
647 | Support for VMX cryptographic acceleration instructions. | |
648 | ||
649 | source "drivers/crypto/vmx/Kconfig" | |
650 | ||
d358f1ab | 651 | config CRYPTO_DEV_IMGTEC_HASH |
d358f1ab | 652 | tristate "Imagination Technologies hardware hash accelerator" |
8c98ebd7 | 653 | depends on MIPS || COMPILE_TEST |
d358f1ab JH |
654 | select CRYPTO_MD5 |
655 | select CRYPTO_SHA1 | |
d358f1ab JH |
656 | select CRYPTO_SHA256 |
657 | select CRYPTO_HASH | |
658 | help | |
659 | This driver interfaces with the Imagination Technologies | |
660 | hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 | |
661 | hashing algorithms. | |
662 | ||
433cd2c6 ZW |
663 | config CRYPTO_DEV_ROCKCHIP |
664 | tristate "Rockchip's Cryptographic Engine driver" | |
665 | depends on OF && ARCH_ROCKCHIP | |
666 | select CRYPTO_AES | |
04007b0e | 667 | select CRYPTO_LIB_DES |
bfd927ff ZW |
668 | select CRYPTO_MD5 |
669 | select CRYPTO_SHA1 | |
670 | select CRYPTO_SHA256 | |
671 | select CRYPTO_HASH | |
b95bba5d | 672 | select CRYPTO_SKCIPHER |
433cd2c6 ZW |
673 | |
674 | help | |
675 | This driver interfaces with the hardware crypto accelerator. | |
676 | Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. | |
677 | ||
785e5c61 RL |
678 | config CRYPTO_DEV_MEDIATEK |
679 | tristate "MediaTek's EIP97 Cryptographic Engine driver" | |
7dee9f61 | 680 | depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST |
785e5c61 | 681 | select CRYPTO_AES |
d03f7b0d | 682 | select CRYPTO_AEAD |
b95bba5d | 683 | select CRYPTO_SKCIPHER |
d03f7b0d | 684 | select CRYPTO_CTR |
7dee9f61 AB |
685 | select CRYPTO_SHA1 |
686 | select CRYPTO_SHA256 | |
687 | select CRYPTO_SHA512 | |
785e5c61 RL |
688 | select CRYPTO_HMAC |
689 | help | |
690 | This driver allows you to utilize the hardware crypto accelerator | |
691 | EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... | |
692 | Select this if you want to use it for AES/SHA1/SHA2 algorithms. | |
693 | ||
02038fd6 HS |
694 | source "drivers/crypto/chelsio/Kconfig" |
695 | ||
dbaf0624 G |
696 | source "drivers/crypto/virtio/Kconfig" |
697 | ||
9d12ba86 RR |
698 | config CRYPTO_DEV_BCM_SPU |
699 | tristate "Broadcom symmetric crypto/hash acceleration support" | |
700 | depends on ARCH_BCM_IPROC | |
efc856ed | 701 | depends on MAILBOX |
9d12ba86 | 702 | default m |
ab57b335 | 703 | select CRYPTO_AUTHENC |
04007b0e | 704 | select CRYPTO_LIB_DES |
9d12ba86 RR |
705 | select CRYPTO_MD5 |
706 | select CRYPTO_SHA1 | |
707 | select CRYPTO_SHA256 | |
708 | select CRYPTO_SHA512 | |
709 | help | |
710 | This driver provides support for Broadcom crypto acceleration using the | |
a9c01cd6 | 711 | Secure Processing Unit (SPU). The SPU driver registers skcipher, |
9d12ba86 RR |
712 | ahash, and aead algorithms with the kernel cryptographic API. |
713 | ||
b51dbe90 FD |
714 | source "drivers/crypto/stm32/Kconfig" |
715 | ||
1b44c5a6 AT |
716 | config CRYPTO_DEV_SAFEXCEL |
717 | tristate "Inside Secure's SafeXcel cryptographic engine driver" | |
0f6e5c82 | 718 | depends on OF || PCI || COMPILE_TEST |
363a90c2 | 719 | select CRYPTO_LIB_AES |
f6beaea3 | 720 | select CRYPTO_AUTHENC |
b95bba5d | 721 | select CRYPTO_SKCIPHER |
04007b0e | 722 | select CRYPTO_LIB_DES |
1b44c5a6 AT |
723 | select CRYPTO_HASH |
724 | select CRYPTO_HMAC | |
293f89cf | 725 | select CRYPTO_MD5 |
1b44c5a6 AT |
726 | select CRYPTO_SHA1 |
727 | select CRYPTO_SHA256 | |
728 | select CRYPTO_SHA512 | |
fc0f82b1 | 729 | select CRYPTO_CHACHA20POLY1305 |
1d448f27 | 730 | select CRYPTO_SHA3 |
1b44c5a6 | 731 | help |
0f6e5c82 PL |
732 | This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic |
733 | engines designed by Inside Secure. It currently accelerates DES, 3DES and | |
734 | AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, | |
735 | SHA384 and SHA512 hash algorithms for both basic hash and HMAC. | |
736 | Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. | |
1b44c5a6 | 737 | |
a21eb94f LP |
738 | config CRYPTO_DEV_ARTPEC6 |
739 | tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." | |
740 | depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) | |
a21eb94f LP |
741 | depends on OF |
742 | select CRYPTO_AEAD | |
743 | select CRYPTO_AES | |
744 | select CRYPTO_ALGAPI | |
b95bba5d | 745 | select CRYPTO_SKCIPHER |
a21eb94f LP |
746 | select CRYPTO_CTR |
747 | select CRYPTO_HASH | |
748 | select CRYPTO_SHA1 | |
749 | select CRYPTO_SHA256 | |
a21eb94f LP |
750 | select CRYPTO_SHA512 |
751 | help | |
752 | Enables the driver for the on-chip crypto accelerator | |
753 | of Axis ARTPEC SoCs. | |
754 | ||
755 | To compile this driver as a module, choose M here. | |
756 | ||
4c3f9727 GBY |
757 | config CRYPTO_DEV_CCREE |
758 | tristate "Support for ARM TrustZone CryptoCell family of security processors" | |
759 | depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA | |
760 | default n | |
761 | select CRYPTO_HASH | |
b95bba5d | 762 | select CRYPTO_SKCIPHER |
04007b0e | 763 | select CRYPTO_LIB_DES |
4c3f9727 GBY |
764 | select CRYPTO_AEAD |
765 | select CRYPTO_AUTHENC | |
766 | select CRYPTO_SHA1 | |
767 | select CRYPTO_MD5 | |
768 | select CRYPTO_SHA256 | |
769 | select CRYPTO_SHA512 | |
770 | select CRYPTO_HMAC | |
771 | select CRYPTO_AES | |
772 | select CRYPTO_CBC | |
773 | select CRYPTO_ECB | |
774 | select CRYPTO_CTR | |
775 | select CRYPTO_XTS | |
9b8d51f8 | 776 | select CRYPTO_SM4 |
927574e0 | 777 | select CRYPTO_SM3 |
4c3f9727 | 778 | help |
27b3b22d GBY |
779 | Say 'Y' to enable a driver for the REE interface of the Arm |
780 | TrustZone CryptoCell family of processors. Currently the | |
1c876a90 | 781 | CryptoCell 713, 703, 712, 710 and 630 are supported. |
4c3f9727 GBY |
782 | Choose this if you wish to use hardware acceleration of |
783 | cryptographic operations on the system REE. | |
784 | If unsure say Y. | |
785 | ||
915e4e84 JC |
786 | source "drivers/crypto/hisilicon/Kconfig" |
787 | ||
48fe583f CL |
788 | source "drivers/crypto/amlogic/Kconfig" |
789 | ||
b511431d | 790 | endif # CRYPTO_HW |