bluetooth: switch to AES library
[linux-block.git] / drivers / crypto / Kconfig
CommitLineData
ec8f24b7 1# SPDX-License-Identifier: GPL-2.0-only
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2
3menuconfig CRYPTO_HW
4 bool "Hardware crypto devices"
5 default y
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6 ---help---
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
9
10 If you say N, all options in this submenu will be skipped and disabled.
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11
12if CRYPTO_HW
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13
14config CRYPTO_DEV_PADLOCK
d158325e 15 tristate "Support for VIA PadLock ACE"
2f817418 16 depends on X86 && !UML
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LT
17 help
18 Some VIA processors come with an integrated crypto engine
19 (so called VIA PadLock ACE, Advanced Cryptography Engine)
1191f0a4
ML
20 that provides instructions for very fast cryptographic
21 operations with supported algorithms.
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LT
22
23 The instructions are used only when the CPU supports them.
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24 Otherwise software encryption is used.
25
1da177e4 26config CRYPTO_DEV_PADLOCK_AES
1191f0a4 27 tristate "PadLock driver for AES algorithm"
1da177e4 28 depends on CRYPTO_DEV_PADLOCK
28ce728a 29 select CRYPTO_BLKCIPHER
8131878d 30 select CRYPTO_LIB_AES
1da177e4
LT
31 help
32 Use VIA PadLock for AES algorithm.
33
1191f0a4
ML
34 Available in VIA C3 and newer CPUs.
35
36 If unsure say M. The compiled module will be
4737f097 37 called padlock-aes.
1191f0a4 38
6c833275
ML
39config CRYPTO_DEV_PADLOCK_SHA
40 tristate "PadLock driver for SHA1 and SHA256 algorithms"
41 depends on CRYPTO_DEV_PADLOCK
bbbee467 42 select CRYPTO_HASH
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ML
43 select CRYPTO_SHA1
44 select CRYPTO_SHA256
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ML
45 help
46 Use VIA PadLock for SHA1/SHA256 algorithms.
47
48 Available in VIA C7 and newer processors.
49
50 If unsure say M. The compiled module will be
4737f097 51 called padlock-sha.
6c833275 52
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53config CRYPTO_DEV_GEODE
54 tristate "Support for the Geode LX AES engine"
f6259dea 55 depends on X86_32 && PCI
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56 select CRYPTO_ALGAPI
57 select CRYPTO_BLKCIPHER
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58 help
59 Say 'Y' here to use the AMD Geode LX processor on-board AES
3dde6ad8 60 engine for the CryptoAPI AES algorithm.
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61
62 To compile this driver as a module, choose M here: the module
63 will be called geode-aes.
64
61d48c2c 65config ZCRYPT
a3358e3d 66 tristate "Support for s390 cryptographic adapters"
61d48c2c 67 depends on S390
2f7c8bd6 68 select HW_RANDOM
61d48c2c 69 help
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HF
70 Select this option if you want to enable support for
71 s390 cryptographic adapters like:
61d48c2c 72 + PCI-X Cryptographic Coprocessor (PCIXCC)
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HF
73 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
74 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
75 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
61d48c2c 76
00fab235
HF
77config ZCRYPT_MULTIDEVNODES
78 bool "Support for multiple zcrypt device nodes"
79 default y
80 depends on S390
81 depends on ZCRYPT
82 help
83 With this option enabled the zcrypt device driver can
84 provide multiple devices nodes in /dev. Each device
85 node can get customized to limit access and narrow
86 down the use of the available crypto hardware.
87
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88config PKEY
89 tristate "Kernel API for protected key handling"
90 depends on S390
91 depends on ZCRYPT
92 help
93 With this option enabled the pkey kernel module provides an API
94 for creation and handling of protected keys. Other parts of the
95 kernel or userspace applications may use these functions.
96
97 Select this option if you want to enable the kernel and userspace
98 API for proteced key handling.
99
100 Please note that creation of protected keys from secure keys
101 requires to have at least one CEX card in coprocessor mode
102 available at runtime.
61d48c2c 103
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HF
104config CRYPTO_PAES_S390
105 tristate "PAES cipher algorithms"
106 depends on S390
107 depends on ZCRYPT
108 depends on PKEY
109 select CRYPTO_ALGAPI
110 select CRYPTO_BLKCIPHER
111 help
112 This is the s390 hardware accelerated implementation of the
113 AES cipher algorithms for use with protected key.
114
115 Select this option if you want to use the paes cipher
116 for example to use protected key encrypted devices.
117
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118config CRYPTO_SHA1_S390
119 tristate "SHA1 digest algorithm"
120 depends on S390
563f346d 121 select CRYPTO_HASH
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122 help
123 This is the s390 hardware accelerated implementation of the
124 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
125
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JG
126 It is available as of z990.
127
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128config CRYPTO_SHA256_S390
129 tristate "SHA256 digest algorithm"
130 depends on S390
563f346d 131 select CRYPTO_HASH
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132 help
133 This is the s390 hardware accelerated implementation of the
134 SHA256 secure hash standard (DFIPS 180-2).
135
d393d9b8 136 It is available as of z9.
3f5615e0 137
291dc7c0 138config CRYPTO_SHA512_S390
4e2c6d7f 139 tristate "SHA384 and SHA512 digest algorithm"
291dc7c0 140 depends on S390
563f346d 141 select CRYPTO_HASH
291dc7c0
JG
142 help
143 This is the s390 hardware accelerated implementation of the
144 SHA512 secure hash standard.
145
d393d9b8 146 It is available as of z10.
291dc7c0 147
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JG
148config CRYPTO_DES_S390
149 tristate "DES and Triple DES cipher algorithms"
150 depends on S390
151 select CRYPTO_ALGAPI
152 select CRYPTO_BLKCIPHER
63291d40 153 select CRYPTO_DES
3f5615e0 154 help
0200f3ec 155 This is the s390 hardware accelerated implementation of the
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156 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
157
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158 As of z990 the ECB and CBC mode are hardware accelerated.
159 As of z196 the CTR mode is hardware accelerated.
160
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161config CRYPTO_AES_S390
162 tristate "AES cipher algorithms"
163 depends on S390
164 select CRYPTO_ALGAPI
165 select CRYPTO_BLKCIPHER
166 help
167 This is the s390 hardware accelerated implementation of the
99d97222
GS
168 AES cipher algorithms (FIPS-197).
169
170 As of z9 the ECB and CBC modes are hardware accelerated
171 for 128 bit keys.
172 As of z10 the ECB and CBC modes are hardware accelerated
173 for all AES key sizes.
0200f3ec
GS
174 As of z196 the CTR mode is hardware accelerated for all AES
175 key sizes and XTS mode is hardware accelerated for 256 and
99d97222 176 512 bit keys.
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JG
177
178config S390_PRNG
179 tristate "Pseudo random number generator device driver"
180 depends on S390
181 default "m"
182 help
183 Select this option if you want to use the s390 pseudo random number
184 generator. The PRNG is part of the cryptographic processor functions
185 and uses triple-DES to generate secure random numbers like the
d393d9b8
JG
186 ANSI X9.17 standard. User-space programs access the
187 pseudo-random-number device through the char device /dev/prandom.
188
189 It is available as of z9.
3f5615e0 190
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191config CRYPTO_GHASH_S390
192 tristate "GHASH digest algorithm"
193 depends on S390
194 select CRYPTO_HASH
195 help
196 This is the s390 hardware accelerated implementation of the
197 GHASH message digest algorithm for GCM (Galois/Counter Mode).
198
199 It is available as of z196.
200
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201config CRYPTO_CRC32_S390
202 tristate "CRC-32 algorithms"
203 depends on S390
204 select CRYPTO_HASH
205 select CRC32
206 help
207 Select this option if you want to use hardware accelerated
208 implementations of CRC algorithms. With this option, you
209 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
210 and CRC-32C (Castagnoli).
211
212 It is available with IBM z13 or later.
213
f63601fd 214config CRYPTO_DEV_MARVELL_CESA
27b43fd9 215 tristate "Marvell's Cryptographic Engine driver"
fe55dfdc 216 depends on PLAT_ORION || ARCH_MVEBU
18d8b96d 217 select CRYPTO_LIB_AES
f63601fd
BB
218 select CRYPTO_DES
219 select CRYPTO_BLKCIPHER
220 select CRYPTO_HASH
221 select SRAM
222 help
223 This driver allows you to utilize the Cryptographic Engines and
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BB
224 Security Accelerator (CESA) which can be found on MVEBU and ORION
225 platforms.
db509a45 226 This driver supports CPU offload through DMA transfers.
f63601fd 227
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228config CRYPTO_DEV_NIAGARA2
229 tristate "Niagara2 Stream Processing Unit driver"
50e78161 230 select CRYPTO_DES
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231 select CRYPTO_BLKCIPHER
232 select CRYPTO_HASH
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LC
233 select CRYPTO_MD5
234 select CRYPTO_SHA1
235 select CRYPTO_SHA256
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236 depends on SPARC64
237 help
238 Each core of a Niagara2 processor contains a Stream
239 Processing Unit, which itself contains several cryptographic
240 sub-units. One set provides the Modular Arithmetic Unit,
241 used for SSL offload. The other set provides the Cipher
242 Group, which can perform encryption, decryption, hashing,
243 checksumming, and raw copies.
244
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245config CRYPTO_DEV_HIFN_795X
246 tristate "Driver HIFN 795x crypto accelerator chips"
c3041f9c 247 select CRYPTO_DES
653ebd9c 248 select CRYPTO_BLKCIPHER
946fef4e 249 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
2707b937 250 depends on PCI
75b76625 251 depends on !ARCH_DMA_ADDR_T_64BIT
f7d0561e
EP
252 help
253 This option allows you to have support for HIFN 795x crypto adapters.
254
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255config CRYPTO_DEV_HIFN_795X_RNG
256 bool "HIFN 795x random number generator"
257 depends on CRYPTO_DEV_HIFN_795X
258 help
259 Select this option if you want to enable the random number generator
260 on the HIFN 795x crypto adapters.
f7d0561e 261
8636a1f9 262source "drivers/crypto/caam/Kconfig"
8e8ec596 263
9c4a7965
KP
264config CRYPTO_DEV_TALITOS
265 tristate "Talitos Freescale Security Engine (SEC)"
596103cf 266 select CRYPTO_AEAD
9c4a7965 267 select CRYPTO_AUTHENC
596103cf
HX
268 select CRYPTO_BLKCIPHER
269 select CRYPTO_HASH
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270 select HW_RANDOM
271 depends on FSL_SOC
272 help
273 Say 'Y' here to use the Freescale Security Engine (SEC)
274 to offload cryptographic algorithm computation.
275
276 The Freescale SEC is present on PowerQUICC 'E' processors, such
277 as the MPC8349E and MPC8548E.
278
279 To compile this driver as a module, choose M here: the module
280 will be called talitos.
281
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LC
282config CRYPTO_DEV_TALITOS1
283 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
284 depends on CRYPTO_DEV_TALITOS
285 depends on PPC_8xx || PPC_82xx
286 default y
287 help
288 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
289 found on MPC82xx or the Freescale Security Engine (SEC Lite)
290 version 1.2 found on MPC8xx
291
292config CRYPTO_DEV_TALITOS2
293 bool "SEC2+ (SEC version 2.0 or upper)"
294 depends on CRYPTO_DEV_TALITOS
295 default y if !PPC_8xx
296 help
297 Say 'Y' here to use the Freescale Security Engine (SEC)
298 version 2 and following as found on MPC83xx, MPC85xx, etc ...
299
81bef015
CH
300config CRYPTO_DEV_IXP4XX
301 tristate "Driver for IXP4xx crypto hardware acceleration"
9665c52b 302 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
81bef015 303 select CRYPTO_DES
596103cf 304 select CRYPTO_AEAD
090657e4 305 select CRYPTO_AUTHENC
81bef015
CH
306 select CRYPTO_BLKCIPHER
307 help
308 Driver for the IXP4xx NPE crypto engine.
309
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310config CRYPTO_DEV_PPC4XX
311 tristate "Driver AMCC PPC4xx crypto accelerator"
312 depends on PPC && 4xx
313 select CRYPTO_HASH
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314 select CRYPTO_AEAD
315 select CRYPTO_AES
316 select CRYPTO_CCM
98e87e3d 317 select CRYPTO_CTR
a0aae821 318 select CRYPTO_GCM
049359d6
JH
319 select CRYPTO_BLKCIPHER
320 help
321 This option allows you to have support for AMCC crypto acceleration.
322
5343e674
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323config HW_RANDOM_PPC4XX
324 bool "PowerPC 4xx generic true random number generator support"
325 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
326 default y
327 ---help---
328 This option provides the kernel-side support for the TRNG hardware
329 found in the security function of some PowerPC 4xx SoCs.
330
74ed87e7
TK
331config CRYPTO_DEV_OMAP
332 tristate "Support for OMAP crypto HW accelerators"
333 depends on ARCH_OMAP2PLUS
334 help
335 OMAP processors have various crypto HW accelerators. Select this if
336 you want to use the OMAP modules for any of the crypto algorithms.
337
338if CRYPTO_DEV_OMAP
339
8628e7c8 340config CRYPTO_DEV_OMAP_SHAM
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LV
341 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
342 depends on ARCH_OMAP2PLUS
8628e7c8
DK
343 select CRYPTO_SHA1
344 select CRYPTO_MD5
eaef7e3f
LV
345 select CRYPTO_SHA256
346 select CRYPTO_SHA512
347 select CRYPTO_HMAC
8628e7c8 348 help
eaef7e3f
LV
349 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
350 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
8628e7c8 351
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352config CRYPTO_DEV_OMAP_AES
353 tristate "Support for OMAP AES hw engine"
1bbf6437 354 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
537559a5 355 select CRYPTO_AES
596103cf 356 select CRYPTO_BLKCIPHER
0529900a 357 select CRYPTO_ENGINE
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LV
358 select CRYPTO_CBC
359 select CRYPTO_ECB
360 select CRYPTO_CTR
ad18cc9d 361 select CRYPTO_AEAD
537559a5
DK
362 help
363 OMAP processors have AES module accelerator. Select this if you
364 want to use the OMAP module for AES algorithms.
365
701d0f19 366config CRYPTO_DEV_OMAP_DES
97ee7ed3 367 tristate "Support for OMAP DES/3DES hw engine"
701d0f19
JF
368 depends on ARCH_OMAP2PLUS
369 select CRYPTO_DES
596103cf 370 select CRYPTO_BLKCIPHER
f1b77aac 371 select CRYPTO_ENGINE
701d0f19
JF
372 help
373 OMAP processors have DES/3DES module accelerator. Select this if you
374 want to use the OMAP module for DES and 3DES algorithms. Currently
97ee7ed3
PM
375 the ECB and CBC modes of operation are supported by the driver. Also
376 accesses made on unaligned boundaries are supported.
701d0f19 377
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TK
378endif # CRYPTO_DEV_OMAP
379
ce921368
JI
380config CRYPTO_DEV_PICOXCELL
381 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
4f44d86d 382 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
596103cf 383 select CRYPTO_AEAD
ce921368
JI
384 select CRYPTO_AES
385 select CRYPTO_AUTHENC
596103cf 386 select CRYPTO_BLKCIPHER
ce921368
JI
387 select CRYPTO_DES
388 select CRYPTO_CBC
389 select CRYPTO_ECB
390 select CRYPTO_SEQIV
391 help
392 This option enables support for the hardware offload engines in the
393 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
394 and for 3gpp Layer 2 ciphering support.
395
396 Saying m here will build a module named pipcoxcell_crypto.
397
5de88752
JM
398config CRYPTO_DEV_SAHARA
399 tristate "Support for SAHARA crypto accelerator"
74d24d83 400 depends on ARCH_MXC && OF
5de88752
JM
401 select CRYPTO_BLKCIPHER
402 select CRYPTO_AES
403 select CRYPTO_ECB
404 help
405 This option enables support for the SAHARA HW crypto accelerator
406 found in some Freescale i.MX chips.
407
c46ea13f
KK
408config CRYPTO_DEV_EXYNOS_RNG
409 tristate "EXYNOS HW pseudo random number generator support"
410 depends on ARCH_EXYNOS || COMPILE_TEST
411 depends on HAS_IOMEM
412 select CRYPTO_RNG
413 ---help---
414 This driver provides kernel-side support through the
415 cryptographic API for the pseudo random number generator hardware
416 found on Exynos SoCs.
417
418 To compile this driver as a module, choose M here: the
419 module will be called exynos-rng.
420
421 If unsure, say Y.
422
a49e490c 423config CRYPTO_DEV_S5P
e922e96f 424 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
dc1d9dee 425 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
ee1b23d1 426 depends on HAS_IOMEM
a49e490c 427 select CRYPTO_AES
a49e490c
VZ
428 select CRYPTO_BLKCIPHER
429 help
430 This option allows you to have support for S5P crypto acceleration.
e922e96f 431 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
a49e490c
VZ
432 algorithms execution.
433
c2afad6c
KK
434config CRYPTO_DEV_EXYNOS_HASH
435 bool "Support for Samsung Exynos HASH accelerator"
436 depends on CRYPTO_DEV_S5P
437 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
438 select CRYPTO_SHA1
439 select CRYPTO_MD5
440 select CRYPTO_SHA256
441 help
442 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
443 This will select software SHA1, MD5 and SHA256 as they are
444 needed for small and zero-size messages.
445 HASH algorithms will be disabled if EXYNOS_RNG
446 is enabled due to hw conflict.
447
aef7b31c 448config CRYPTO_DEV_NX
7011a122
DS
449 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
450 depends on PPC64
aef7b31c 451 help
7011a122
DS
452 This enables support for the NX hardware cryptographic accelerator
453 coprocessor that is in IBM PowerPC P7+ or later processors. This
454 does not actually enable any drivers, it only allows you to select
455 which acceleration type (encryption and/or compression) to enable.
322cacce
SJ
456
457if CRYPTO_DEV_NX
458 source "drivers/crypto/nx/Kconfig"
459endif
aef7b31c 460
2789c08f
AW
461config CRYPTO_DEV_UX500
462 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
463 depends on ARCH_U8500
2789c08f
AW
464 help
465 Driver for ST-Ericsson UX500 crypto engine.
466
467if CRYPTO_DEV_UX500
468 source "drivers/crypto/ux500/Kconfig"
469endif # if CRYPTO_DEV_UX500
470
89a82ef8
CP
471config CRYPTO_DEV_ATMEL_AUTHENC
472 tristate "Support for Atmel IPSEC/SSL hw accelerator"
ceb4afb3 473 depends on ARCH_AT91 || COMPILE_TEST
89a82ef8
CP
474 select CRYPTO_AUTHENC
475 select CRYPTO_DEV_ATMEL_AES
476 select CRYPTO_DEV_ATMEL_SHA
477 help
478 Some Atmel processors can combine the AES and SHA hw accelerators
479 to enhance support of IPSEC/SSL.
480 Select this if you want to use the Atmel modules for
481 authenc(hmac(shaX),Y(cbc)) algorithms.
482
bd3c7b5c
NR
483config CRYPTO_DEV_ATMEL_AES
484 tristate "Support for Atmel AES hw accelerator"
ceb4afb3 485 depends on ARCH_AT91 || COMPILE_TEST
bd3c7b5c 486 select CRYPTO_AES
d4419548 487 select CRYPTO_AEAD
bd3c7b5c 488 select CRYPTO_BLKCIPHER
bd3c7b5c
NR
489 help
490 Some Atmel processors have AES hw accelerator.
491 Select this if you want to use the Atmel module for
492 AES algorithms.
493
494 To compile this driver as a module, choose M here: the module
495 will be called atmel-aes.
496
13802005
NR
497config CRYPTO_DEV_ATMEL_TDES
498 tristate "Support for Atmel DES/TDES hw accelerator"
ceb4afb3 499 depends on ARCH_AT91 || COMPILE_TEST
13802005 500 select CRYPTO_DES
13802005
NR
501 select CRYPTO_BLKCIPHER
502 help
503 Some Atmel processors have DES/TDES hw accelerator.
504 Select this if you want to use the Atmel module for
505 DES/TDES algorithms.
506
507 To compile this driver as a module, choose M here: the module
508 will be called atmel-tdes.
509
ebc82efa 510config CRYPTO_DEV_ATMEL_SHA
d4905b38 511 tristate "Support for Atmel SHA hw accelerator"
ceb4afb3 512 depends on ARCH_AT91 || COMPILE_TEST
596103cf 513 select CRYPTO_HASH
ebc82efa 514 help
d4905b38
NR
515 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
516 hw accelerator.
ebc82efa 517 Select this if you want to use the Atmel module for
d4905b38 518 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
ebc82efa
NR
519
520 To compile this driver as a module, choose M here: the module
521 will be called atmel-sha.
522
c34a3201
AB
523config CRYPTO_DEV_ATMEL_I2C
524 tristate
525
11105693
TDA
526config CRYPTO_DEV_ATMEL_ECC
527 tristate "Support for Microchip / Atmel ECC hw accelerator"
11105693 528 depends on I2C
c34a3201 529 select CRYPTO_DEV_ATMEL_I2C
11105693
TDA
530 select CRYPTO_ECDH
531 select CRC16
532 help
533 Microhip / Atmel ECC hw accelerator.
534 Select this if you want to use the Microchip / Atmel module for
535 ECDH algorithm.
536
537 To compile this driver as a module, choose M here: the module
538 will be called atmel-ecc.
539
da001fb6
AB
540config CRYPTO_DEV_ATMEL_SHA204A
541 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
542 depends on I2C
543 select CRYPTO_DEV_ATMEL_I2C
544 select HW_RANDOM
4bb02dbd 545 select CRC16
da001fb6
AB
546 help
547 Microhip / Atmel SHA accelerator and RNG.
548 Select this if you want to use the Microchip / Atmel SHA204A
549 module as a random number generator. (Other functions of the
550 chip are currently not exposed by this driver)
551
552 To compile this driver as a module, choose M here: the module
553 will be called atmel-sha204a.
554
f1147660 555config CRYPTO_DEV_CCP
720419f0 556 bool "Support for AMD Secure Processor"
6c506343 557 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
f1147660 558 help
720419f0
BS
559 The AMD Secure Processor provides support for the Cryptographic Coprocessor
560 (CCP) and the Platform Security Processor (PSP) devices.
f1147660
TL
561
562if CRYPTO_DEV_CCP
563 source "drivers/crypto/ccp/Kconfig"
564endif
565
15b59e7c
MV
566config CRYPTO_DEV_MXS_DCP
567 tristate "Support for Freescale MXS DCP"
a2712e6c 568 depends on (ARCH_MXS || ARCH_MXC)
dc97fa02 569 select STMP_DEVICE
15b59e7c
MV
570 select CRYPTO_CBC
571 select CRYPTO_ECB
572 select CRYPTO_AES
573 select CRYPTO_BLKCIPHER
596103cf 574 select CRYPTO_HASH
15b59e7c
MV
575 help
576 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
577 co-processor on the die.
578
579 To compile this driver as a module, choose M here: the module
580 will be called mxs-dcp.
581
cea4001a 582source "drivers/crypto/qat/Kconfig"
62ad8b5c 583source "drivers/crypto/cavium/cpt/Kconfig"
14fa93cd 584source "drivers/crypto/cavium/nitrox/Kconfig"
c672752d 585
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MC
586config CRYPTO_DEV_CAVIUM_ZIP
587 tristate "Cavium ZIP driver"
588 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
589 ---help---
590 Select this option if you want to enable compression/decompression
591 acceleration on Cavium's ARM based SoCs
592
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593config CRYPTO_DEV_QCE
594 tristate "Qualcomm crypto engine accelerator"
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595 depends on ARCH_QCOM || COMPILE_TEST
596 depends on HAS_IOMEM
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597 select CRYPTO_AES
598 select CRYPTO_DES
599 select CRYPTO_ECB
600 select CRYPTO_CBC
601 select CRYPTO_XTS
602 select CRYPTO_CTR
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603 select CRYPTO_BLKCIPHER
604 help
605 This driver supports Qualcomm crypto engine accelerator
606 hardware. To compile this driver as a module, choose M here. The
607 module will be called qcrypto.
608
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VK
609config CRYPTO_DEV_QCOM_RNG
610 tristate "Qualcomm Random Number Generator Driver"
611 depends on ARCH_QCOM || COMPILE_TEST
612 select CRYPTO_RNG
613 help
614 This driver provides support for the Random Number
615 Generator hardware found on Qualcomm SoCs.
616
617 To compile this driver as a module, choose M here. The
618 module will be called qcom-rng. If unsure, say N.
619
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620config CRYPTO_DEV_VMX
621 bool "Support for VMX cryptographic acceleration instructions"
f1ab4287 622 depends on PPC64 && VSX
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623 help
624 Support for VMX cryptographic acceleration instructions.
625
626source "drivers/crypto/vmx/Kconfig"
627
d358f1ab 628config CRYPTO_DEV_IMGTEC_HASH
d358f1ab 629 tristate "Imagination Technologies hardware hash accelerator"
8c98ebd7 630 depends on MIPS || COMPILE_TEST
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JH
631 select CRYPTO_MD5
632 select CRYPTO_SHA1
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JH
633 select CRYPTO_SHA256
634 select CRYPTO_HASH
635 help
636 This driver interfaces with the Imagination Technologies
637 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
638 hashing algorithms.
639
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LC
640config CRYPTO_DEV_SUN4I_SS
641 tristate "Support for Allwinner Security System cryptographic accelerator"
f823ab93 642 depends on ARCH_SUNXI && !64BIT
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LC
643 select CRYPTO_MD5
644 select CRYPTO_SHA1
645 select CRYPTO_AES
646 select CRYPTO_DES
647 select CRYPTO_BLKCIPHER
648 help
649 Some Allwinner SoC have a crypto accelerator named
650 Security System. Select this if you want to use it.
651 The Security System handle AES/DES/3DES ciphers in CBC mode
652 and SHA1 and MD5 hash algorithms.
653
654 To compile this driver as a module, choose M here: the module
655 will be called sun4i-ss.
656
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CL
657config CRYPTO_DEV_SUN4I_SS_PRNG
658 bool "Support for Allwinner Security System PRNG"
659 depends on CRYPTO_DEV_SUN4I_SS
660 select CRYPTO_RNG
661 help
662 Select this option if you want to provide kernel-side support for
663 the Pseudo-Random Number Generator found in the Security System.
664
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ZW
665config CRYPTO_DEV_ROCKCHIP
666 tristate "Rockchip's Cryptographic Engine driver"
667 depends on OF && ARCH_ROCKCHIP
668 select CRYPTO_AES
669 select CRYPTO_DES
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ZW
670 select CRYPTO_MD5
671 select CRYPTO_SHA1
672 select CRYPTO_SHA256
673 select CRYPTO_HASH
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ZW
674 select CRYPTO_BLKCIPHER
675
676 help
677 This driver interfaces with the hardware crypto accelerator.
678 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
679
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RL
680config CRYPTO_DEV_MEDIATEK
681 tristate "MediaTek's EIP97 Cryptographic Engine driver"
7dee9f61 682 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
785e5c61 683 select CRYPTO_AES
d03f7b0d 684 select CRYPTO_AEAD
785e5c61 685 select CRYPTO_BLKCIPHER
d03f7b0d 686 select CRYPTO_CTR
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AB
687 select CRYPTO_SHA1
688 select CRYPTO_SHA256
689 select CRYPTO_SHA512
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RL
690 select CRYPTO_HMAC
691 help
692 This driver allows you to utilize the hardware crypto accelerator
693 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
694 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
695
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HS
696source "drivers/crypto/chelsio/Kconfig"
697
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G
698source "drivers/crypto/virtio/Kconfig"
699
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700config CRYPTO_DEV_BCM_SPU
701 tristate "Broadcom symmetric crypto/hash acceleration support"
702 depends on ARCH_BCM_IPROC
efc856ed 703 depends on MAILBOX
9d12ba86 704 default m
ab57b335 705 select CRYPTO_AUTHENC
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RR
706 select CRYPTO_DES
707 select CRYPTO_MD5
708 select CRYPTO_SHA1
709 select CRYPTO_SHA256
710 select CRYPTO_SHA512
711 help
712 This driver provides support for Broadcom crypto acceleration using the
713 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
714 ahash, and aead algorithms with the kernel cryptographic API.
715
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FD
716source "drivers/crypto/stm32/Kconfig"
717
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AT
718config CRYPTO_DEV_SAFEXCEL
719 tristate "Inside Secure's SafeXcel cryptographic engine driver"
ee1b23d1 720 depends on OF
1b44c5a6 721 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
363a90c2 722 select CRYPTO_LIB_AES
f6beaea3 723 select CRYPTO_AUTHENC
1b44c5a6 724 select CRYPTO_BLKCIPHER
a7dea8c0 725 select CRYPTO_DES
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AT
726 select CRYPTO_HASH
727 select CRYPTO_HMAC
293f89cf 728 select CRYPTO_MD5
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AT
729 select CRYPTO_SHA1
730 select CRYPTO_SHA256
731 select CRYPTO_SHA512
732 help
733 This driver interfaces with the SafeXcel EIP-197 cryptographic engine
734 designed by Inside Secure. Select this if you want to use CBC/ECB
735 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
736 algorithms.
737
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LP
738config CRYPTO_DEV_ARTPEC6
739 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
740 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
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LP
741 depends on OF
742 select CRYPTO_AEAD
743 select CRYPTO_AES
744 select CRYPTO_ALGAPI
745 select CRYPTO_BLKCIPHER
746 select CRYPTO_CTR
747 select CRYPTO_HASH
748 select CRYPTO_SHA1
749 select CRYPTO_SHA256
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LP
750 select CRYPTO_SHA512
751 help
752 Enables the driver for the on-chip crypto accelerator
753 of Axis ARTPEC SoCs.
754
755 To compile this driver as a module, choose M here.
756
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GBY
757config CRYPTO_DEV_CCREE
758 tristate "Support for ARM TrustZone CryptoCell family of security processors"
759 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
760 default n
761 select CRYPTO_HASH
762 select CRYPTO_BLKCIPHER
763 select CRYPTO_DES
764 select CRYPTO_AEAD
765 select CRYPTO_AUTHENC
766 select CRYPTO_SHA1
767 select CRYPTO_MD5
768 select CRYPTO_SHA256
769 select CRYPTO_SHA512
770 select CRYPTO_HMAC
771 select CRYPTO_AES
772 select CRYPTO_CBC
773 select CRYPTO_ECB
774 select CRYPTO_CTR
775 select CRYPTO_XTS
9b8d51f8 776 select CRYPTO_SM4
927574e0 777 select CRYPTO_SM3
4c3f9727 778 help
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GBY
779 Say 'Y' to enable a driver for the REE interface of the Arm
780 TrustZone CryptoCell family of processors. Currently the
1c876a90 781 CryptoCell 713, 703, 712, 710 and 630 are supported.
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GBY
782 Choose this if you wish to use hardware acceleration of
783 cryptographic operations on the system REE.
784 If unsure say Y.
785
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JC
786source "drivers/crypto/hisilicon/Kconfig"
787
b511431d 788endif # CRYPTO_HW