Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[linux-2.6-block.git] / drivers / crypto / Kconfig
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1
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
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5 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
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10
11if CRYPTO_HW
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12
13config CRYPTO_DEV_PADLOCK
d158325e 14 tristate "Support for VIA PadLock ACE"
2f817418 15 depends on X86 && !UML
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16 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
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19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
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21
22 The instructions are used only when the CPU supports them.
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23 Otherwise software encryption is used.
24
1da177e4 25config CRYPTO_DEV_PADLOCK_AES
1191f0a4 26 tristate "PadLock driver for AES algorithm"
1da177e4 27 depends on CRYPTO_DEV_PADLOCK
28ce728a 28 select CRYPTO_BLKCIPHER
7dc748e4 29 select CRYPTO_AES
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30 help
31 Use VIA PadLock for AES algorithm.
32
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33 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
4737f097 36 called padlock-aes.
1191f0a4 37
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38config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
bbbee467 41 select CRYPTO_HASH
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42 select CRYPTO_SHA1
43 select CRYPTO_SHA256
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44 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
4737f097 50 called padlock-sha.
6c833275 51
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52config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
f6259dea 54 depends on X86_32 && PCI
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55 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
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57 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
3dde6ad8 59 engine for the CryptoAPI AES algorithm.
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60
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
61d48c2c 64config ZCRYPT
a3358e3d 65 tristate "Support for s390 cryptographic adapters"
61d48c2c 66 depends on S390
2f7c8bd6 67 select HW_RANDOM
61d48c2c 68 help
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69 Select this option if you want to enable support for
70 s390 cryptographic adapters like:
61d48c2c 71 + PCI-X Cryptographic Coprocessor (PCIXCC)
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72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
61d48c2c 75
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76config PKEY
77 tristate "Kernel API for protected key handling"
78 depends on S390
79 depends on ZCRYPT
80 help
81 With this option enabled the pkey kernel module provides an API
82 for creation and handling of protected keys. Other parts of the
83 kernel or userspace applications may use these functions.
84
85 Select this option if you want to enable the kernel and userspace
86 API for proteced key handling.
87
88 Please note that creation of protected keys from secure keys
89 requires to have at least one CEX card in coprocessor mode
90 available at runtime.
61d48c2c 91
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92config CRYPTO_PAES_S390
93 tristate "PAES cipher algorithms"
94 depends on S390
95 depends on ZCRYPT
96 depends on PKEY
97 select CRYPTO_ALGAPI
98 select CRYPTO_BLKCIPHER
99 help
100 This is the s390 hardware accelerated implementation of the
101 AES cipher algorithms for use with protected key.
102
103 Select this option if you want to use the paes cipher
104 for example to use protected key encrypted devices.
105
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106config CRYPTO_SHA1_S390
107 tristate "SHA1 digest algorithm"
108 depends on S390
563f346d 109 select CRYPTO_HASH
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110 help
111 This is the s390 hardware accelerated implementation of the
112 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
113
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114 It is available as of z990.
115
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116config CRYPTO_SHA256_S390
117 tristate "SHA256 digest algorithm"
118 depends on S390
563f346d 119 select CRYPTO_HASH
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120 help
121 This is the s390 hardware accelerated implementation of the
122 SHA256 secure hash standard (DFIPS 180-2).
123
d393d9b8 124 It is available as of z9.
3f5615e0 125
291dc7c0 126config CRYPTO_SHA512_S390
4e2c6d7f 127 tristate "SHA384 and SHA512 digest algorithm"
291dc7c0 128 depends on S390
563f346d 129 select CRYPTO_HASH
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130 help
131 This is the s390 hardware accelerated implementation of the
132 SHA512 secure hash standard.
133
d393d9b8 134 It is available as of z10.
291dc7c0 135
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136config CRYPTO_DES_S390
137 tristate "DES and Triple DES cipher algorithms"
138 depends on S390
139 select CRYPTO_ALGAPI
140 select CRYPTO_BLKCIPHER
63291d40 141 select CRYPTO_DES
3f5615e0 142 help
0200f3ec 143 This is the s390 hardware accelerated implementation of the
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144 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
145
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146 As of z990 the ECB and CBC mode are hardware accelerated.
147 As of z196 the CTR mode is hardware accelerated.
148
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149config CRYPTO_AES_S390
150 tristate "AES cipher algorithms"
151 depends on S390
152 select CRYPTO_ALGAPI
153 select CRYPTO_BLKCIPHER
154 help
155 This is the s390 hardware accelerated implementation of the
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156 AES cipher algorithms (FIPS-197).
157
158 As of z9 the ECB and CBC modes are hardware accelerated
159 for 128 bit keys.
160 As of z10 the ECB and CBC modes are hardware accelerated
161 for all AES key sizes.
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162 As of z196 the CTR mode is hardware accelerated for all AES
163 key sizes and XTS mode is hardware accelerated for 256 and
99d97222 164 512 bit keys.
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165
166config S390_PRNG
167 tristate "Pseudo random number generator device driver"
168 depends on S390
169 default "m"
170 help
171 Select this option if you want to use the s390 pseudo random number
172 generator. The PRNG is part of the cryptographic processor functions
173 and uses triple-DES to generate secure random numbers like the
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174 ANSI X9.17 standard. User-space programs access the
175 pseudo-random-number device through the char device /dev/prandom.
176
177 It is available as of z9.
3f5615e0 178
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179config CRYPTO_GHASH_S390
180 tristate "GHASH digest algorithm"
181 depends on S390
182 select CRYPTO_HASH
183 help
184 This is the s390 hardware accelerated implementation of the
185 GHASH message digest algorithm for GCM (Galois/Counter Mode).
186
187 It is available as of z196.
188
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189config CRYPTO_CRC32_S390
190 tristate "CRC-32 algorithms"
191 depends on S390
192 select CRYPTO_HASH
193 select CRC32
194 help
195 Select this option if you want to use hardware accelerated
196 implementations of CRC algorithms. With this option, you
197 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
198 and CRC-32C (Castagnoli).
199
200 It is available with IBM z13 or later.
201
f63601fd 202config CRYPTO_DEV_MARVELL_CESA
27b43fd9 203 tristate "Marvell's Cryptographic Engine driver"
fe55dfdc 204 depends on PLAT_ORION || ARCH_MVEBU
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205 select CRYPTO_AES
206 select CRYPTO_DES
207 select CRYPTO_BLKCIPHER
208 select CRYPTO_HASH
209 select SRAM
210 help
211 This driver allows you to utilize the Cryptographic Engines and
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212 Security Accelerator (CESA) which can be found on MVEBU and ORION
213 platforms.
db509a45 214 This driver supports CPU offload through DMA transfers.
f63601fd 215
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216config CRYPTO_DEV_NIAGARA2
217 tristate "Niagara2 Stream Processing Unit driver"
50e78161 218 select CRYPTO_DES
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219 select CRYPTO_BLKCIPHER
220 select CRYPTO_HASH
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221 select CRYPTO_MD5
222 select CRYPTO_SHA1
223 select CRYPTO_SHA256
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224 depends on SPARC64
225 help
226 Each core of a Niagara2 processor contains a Stream
227 Processing Unit, which itself contains several cryptographic
228 sub-units. One set provides the Modular Arithmetic Unit,
229 used for SSL offload. The other set provides the Cipher
230 Group, which can perform encryption, decryption, hashing,
231 checksumming, and raw copies.
232
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233config CRYPTO_DEV_HIFN_795X
234 tristate "Driver HIFN 795x crypto accelerator chips"
c3041f9c 235 select CRYPTO_DES
653ebd9c 236 select CRYPTO_BLKCIPHER
946fef4e 237 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
2707b937 238 depends on PCI
75b76625 239 depends on !ARCH_DMA_ADDR_T_64BIT
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240 help
241 This option allows you to have support for HIFN 795x crypto adapters.
242
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243config CRYPTO_DEV_HIFN_795X_RNG
244 bool "HIFN 795x random number generator"
245 depends on CRYPTO_DEV_HIFN_795X
246 help
247 Select this option if you want to enable the random number generator
248 on the HIFN 795x crypto adapters.
f7d0561e 249
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250source drivers/crypto/caam/Kconfig
251
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252config CRYPTO_DEV_TALITOS
253 tristate "Talitos Freescale Security Engine (SEC)"
596103cf 254 select CRYPTO_AEAD
9c4a7965 255 select CRYPTO_AUTHENC
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256 select CRYPTO_BLKCIPHER
257 select CRYPTO_HASH
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258 select HW_RANDOM
259 depends on FSL_SOC
260 help
261 Say 'Y' here to use the Freescale Security Engine (SEC)
262 to offload cryptographic algorithm computation.
263
264 The Freescale SEC is present on PowerQUICC 'E' processors, such
265 as the MPC8349E and MPC8548E.
266
267 To compile this driver as a module, choose M here: the module
268 will be called talitos.
269
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270config CRYPTO_DEV_TALITOS1
271 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
272 depends on CRYPTO_DEV_TALITOS
273 depends on PPC_8xx || PPC_82xx
274 default y
275 help
276 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
277 found on MPC82xx or the Freescale Security Engine (SEC Lite)
278 version 1.2 found on MPC8xx
279
280config CRYPTO_DEV_TALITOS2
281 bool "SEC2+ (SEC version 2.0 or upper)"
282 depends on CRYPTO_DEV_TALITOS
283 default y if !PPC_8xx
284 help
285 Say 'Y' here to use the Freescale Security Engine (SEC)
286 version 2 and following as found on MPC83xx, MPC85xx, etc ...
287
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288config CRYPTO_DEV_IXP4XX
289 tristate "Driver for IXP4xx crypto hardware acceleration"
9665c52b 290 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
81bef015 291 select CRYPTO_DES
596103cf 292 select CRYPTO_AEAD
090657e4 293 select CRYPTO_AUTHENC
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294 select CRYPTO_BLKCIPHER
295 help
296 Driver for the IXP4xx NPE crypto engine.
297
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298config CRYPTO_DEV_PPC4XX
299 tristate "Driver AMCC PPC4xx crypto accelerator"
300 depends on PPC && 4xx
301 select CRYPTO_HASH
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302 select CRYPTO_AEAD
303 select CRYPTO_AES
304 select CRYPTO_CCM
98e87e3d 305 select CRYPTO_CTR
a0aae821 306 select CRYPTO_GCM
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307 select CRYPTO_BLKCIPHER
308 help
309 This option allows you to have support for AMCC crypto acceleration.
310
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311config HW_RANDOM_PPC4XX
312 bool "PowerPC 4xx generic true random number generator support"
313 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
314 default y
315 ---help---
316 This option provides the kernel-side support for the TRNG hardware
317 found in the security function of some PowerPC 4xx SoCs.
318
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319config CRYPTO_DEV_OMAP
320 tristate "Support for OMAP crypto HW accelerators"
321 depends on ARCH_OMAP2PLUS
322 help
323 OMAP processors have various crypto HW accelerators. Select this if
324 you want to use the OMAP modules for any of the crypto algorithms.
325
326if CRYPTO_DEV_OMAP
327
8628e7c8 328config CRYPTO_DEV_OMAP_SHAM
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329 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
330 depends on ARCH_OMAP2PLUS
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331 select CRYPTO_SHA1
332 select CRYPTO_MD5
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333 select CRYPTO_SHA256
334 select CRYPTO_SHA512
335 select CRYPTO_HMAC
8628e7c8 336 help
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337 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
338 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
8628e7c8 339
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340config CRYPTO_DEV_OMAP_AES
341 tristate "Support for OMAP AES hw engine"
1bbf6437 342 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
537559a5 343 select CRYPTO_AES
596103cf 344 select CRYPTO_BLKCIPHER
0529900a 345 select CRYPTO_ENGINE
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346 select CRYPTO_CBC
347 select CRYPTO_ECB
348 select CRYPTO_CTR
ad18cc9d 349 select CRYPTO_AEAD
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350 help
351 OMAP processors have AES module accelerator. Select this if you
352 want to use the OMAP module for AES algorithms.
353
701d0f19 354config CRYPTO_DEV_OMAP_DES
97ee7ed3 355 tristate "Support for OMAP DES/3DES hw engine"
701d0f19
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356 depends on ARCH_OMAP2PLUS
357 select CRYPTO_DES
596103cf 358 select CRYPTO_BLKCIPHER
f1b77aac 359 select CRYPTO_ENGINE
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360 help
361 OMAP processors have DES/3DES module accelerator. Select this if you
362 want to use the OMAP module for DES and 3DES algorithms. Currently
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363 the ECB and CBC modes of operation are supported by the driver. Also
364 accesses made on unaligned boundaries are supported.
701d0f19 365
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366endif # CRYPTO_DEV_OMAP
367
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368config CRYPTO_DEV_PICOXCELL
369 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
4f44d86d 370 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
596103cf 371 select CRYPTO_AEAD
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372 select CRYPTO_AES
373 select CRYPTO_AUTHENC
596103cf 374 select CRYPTO_BLKCIPHER
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375 select CRYPTO_DES
376 select CRYPTO_CBC
377 select CRYPTO_ECB
378 select CRYPTO_SEQIV
379 help
380 This option enables support for the hardware offload engines in the
381 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
382 and for 3gpp Layer 2 ciphering support.
383
384 Saying m here will build a module named pipcoxcell_crypto.
385
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386config CRYPTO_DEV_SAHARA
387 tristate "Support for SAHARA crypto accelerator"
74d24d83 388 depends on ARCH_MXC && OF
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389 select CRYPTO_BLKCIPHER
390 select CRYPTO_AES
391 select CRYPTO_ECB
392 help
393 This option enables support for the SAHARA HW crypto accelerator
394 found in some Freescale i.MX chips.
395
d293b640
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396config CRYPTO_DEV_MXC_SCC
397 tristate "Support for Freescale Security Controller (SCC)"
398 depends on ARCH_MXC && OF
399 select CRYPTO_BLKCIPHER
400 select CRYPTO_DES
401 help
402 This option enables support for the Security Controller (SCC)
403 found in Freescale i.MX25 chips.
404
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405config CRYPTO_DEV_EXYNOS_RNG
406 tristate "EXYNOS HW pseudo random number generator support"
407 depends on ARCH_EXYNOS || COMPILE_TEST
408 depends on HAS_IOMEM
409 select CRYPTO_RNG
410 ---help---
411 This driver provides kernel-side support through the
412 cryptographic API for the pseudo random number generator hardware
413 found on Exynos SoCs.
414
415 To compile this driver as a module, choose M here: the
416 module will be called exynos-rng.
417
418 If unsure, say Y.
419
a49e490c 420config CRYPTO_DEV_S5P
e922e96f 421 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
dc1d9dee 422 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
ee1b23d1 423 depends on HAS_IOMEM
a49e490c 424 select CRYPTO_AES
a49e490c
VZ
425 select CRYPTO_BLKCIPHER
426 help
427 This option allows you to have support for S5P crypto acceleration.
e922e96f 428 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
a49e490c
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429 algorithms execution.
430
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431config CRYPTO_DEV_EXYNOS_HASH
432 bool "Support for Samsung Exynos HASH accelerator"
433 depends on CRYPTO_DEV_S5P
434 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
435 select CRYPTO_SHA1
436 select CRYPTO_MD5
437 select CRYPTO_SHA256
438 help
439 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
440 This will select software SHA1, MD5 and SHA256 as they are
441 needed for small and zero-size messages.
442 HASH algorithms will be disabled if EXYNOS_RNG
443 is enabled due to hw conflict.
444
aef7b31c 445config CRYPTO_DEV_NX
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446 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
447 depends on PPC64
aef7b31c 448 help
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449 This enables support for the NX hardware cryptographic accelerator
450 coprocessor that is in IBM PowerPC P7+ or later processors. This
451 does not actually enable any drivers, it only allows you to select
452 which acceleration type (encryption and/or compression) to enable.
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453
454if CRYPTO_DEV_NX
455 source "drivers/crypto/nx/Kconfig"
456endif
aef7b31c 457
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458config CRYPTO_DEV_UX500
459 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
460 depends on ARCH_U8500
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461 help
462 Driver for ST-Ericsson UX500 crypto engine.
463
464if CRYPTO_DEV_UX500
465 source "drivers/crypto/ux500/Kconfig"
466endif # if CRYPTO_DEV_UX500
467
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468config CRYPTO_DEV_ATMEL_AUTHENC
469 tristate "Support for Atmel IPSEC/SSL hw accelerator"
ceb4afb3 470 depends on ARCH_AT91 || COMPILE_TEST
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471 select CRYPTO_AUTHENC
472 select CRYPTO_DEV_ATMEL_AES
473 select CRYPTO_DEV_ATMEL_SHA
474 help
475 Some Atmel processors can combine the AES and SHA hw accelerators
476 to enhance support of IPSEC/SSL.
477 Select this if you want to use the Atmel modules for
478 authenc(hmac(shaX),Y(cbc)) algorithms.
479
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480config CRYPTO_DEV_ATMEL_AES
481 tristate "Support for Atmel AES hw accelerator"
ceb4afb3 482 depends on ARCH_AT91 || COMPILE_TEST
bd3c7b5c 483 select CRYPTO_AES
d4419548 484 select CRYPTO_AEAD
bd3c7b5c 485 select CRYPTO_BLKCIPHER
bd3c7b5c
NR
486 help
487 Some Atmel processors have AES hw accelerator.
488 Select this if you want to use the Atmel module for
489 AES algorithms.
490
491 To compile this driver as a module, choose M here: the module
492 will be called atmel-aes.
493
13802005
NR
494config CRYPTO_DEV_ATMEL_TDES
495 tristate "Support for Atmel DES/TDES hw accelerator"
ceb4afb3 496 depends on ARCH_AT91 || COMPILE_TEST
13802005 497 select CRYPTO_DES
13802005
NR
498 select CRYPTO_BLKCIPHER
499 help
500 Some Atmel processors have DES/TDES hw accelerator.
501 Select this if you want to use the Atmel module for
502 DES/TDES algorithms.
503
504 To compile this driver as a module, choose M here: the module
505 will be called atmel-tdes.
506
ebc82efa 507config CRYPTO_DEV_ATMEL_SHA
d4905b38 508 tristate "Support for Atmel SHA hw accelerator"
ceb4afb3 509 depends on ARCH_AT91 || COMPILE_TEST
596103cf 510 select CRYPTO_HASH
ebc82efa 511 help
d4905b38
NR
512 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
513 hw accelerator.
ebc82efa 514 Select this if you want to use the Atmel module for
d4905b38 515 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
ebc82efa
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516
517 To compile this driver as a module, choose M here: the module
518 will be called atmel-sha.
519
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TDA
520config CRYPTO_DEV_ATMEL_ECC
521 tristate "Support for Microchip / Atmel ECC hw accelerator"
522 depends on ARCH_AT91 || COMPILE_TEST
523 depends on I2C
524 select CRYPTO_ECDH
525 select CRC16
526 help
527 Microhip / Atmel ECC hw accelerator.
528 Select this if you want to use the Microchip / Atmel module for
529 ECDH algorithm.
530
531 To compile this driver as a module, choose M here: the module
532 will be called atmel-ecc.
533
f1147660 534config CRYPTO_DEV_CCP
720419f0 535 bool "Support for AMD Secure Processor"
6c506343 536 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
f1147660 537 help
720419f0
BS
538 The AMD Secure Processor provides support for the Cryptographic Coprocessor
539 (CCP) and the Platform Security Processor (PSP) devices.
f1147660
TL
540
541if CRYPTO_DEV_CCP
542 source "drivers/crypto/ccp/Kconfig"
543endif
544
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MV
545config CRYPTO_DEV_MXS_DCP
546 tristate "Support for Freescale MXS DCP"
a2712e6c 547 depends on (ARCH_MXS || ARCH_MXC)
dc97fa02 548 select STMP_DEVICE
15b59e7c
MV
549 select CRYPTO_CBC
550 select CRYPTO_ECB
551 select CRYPTO_AES
552 select CRYPTO_BLKCIPHER
596103cf 553 select CRYPTO_HASH
15b59e7c
MV
554 help
555 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
556 co-processor on the die.
557
558 To compile this driver as a module, choose M here: the module
559 will be called mxs-dcp.
560
cea4001a 561source "drivers/crypto/qat/Kconfig"
62ad8b5c 562source "drivers/crypto/cavium/cpt/Kconfig"
14fa93cd 563source "drivers/crypto/cavium/nitrox/Kconfig"
c672752d 564
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MC
565config CRYPTO_DEV_CAVIUM_ZIP
566 tristate "Cavium ZIP driver"
567 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
568 ---help---
569 Select this option if you want to enable compression/decompression
570 acceleration on Cavium's ARM based SoCs
571
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572config CRYPTO_DEV_QCE
573 tristate "Qualcomm crypto engine accelerator"
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GU
574 depends on ARCH_QCOM || COMPILE_TEST
575 depends on HAS_IOMEM
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SV
576 select CRYPTO_AES
577 select CRYPTO_DES
578 select CRYPTO_ECB
579 select CRYPTO_CBC
580 select CRYPTO_XTS
581 select CRYPTO_CTR
c672752d
SV
582 select CRYPTO_BLKCIPHER
583 help
584 This driver supports Qualcomm crypto engine accelerator
585 hardware. To compile this driver as a module, choose M here. The
586 module will be called qcrypto.
587
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588config CRYPTO_DEV_QCOM_RNG
589 tristate "Qualcomm Random Number Generator Driver"
590 depends on ARCH_QCOM || COMPILE_TEST
591 select CRYPTO_RNG
592 help
593 This driver provides support for the Random Number
594 Generator hardware found on Qualcomm SoCs.
595
596 To compile this driver as a module, choose M here. The
597 module will be called qcom-rng. If unsure, say N.
598
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599config CRYPTO_DEV_VMX
600 bool "Support for VMX cryptographic acceleration instructions"
f1ab4287 601 depends on PPC64 && VSX
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602 help
603 Support for VMX cryptographic acceleration instructions.
604
605source "drivers/crypto/vmx/Kconfig"
606
d358f1ab 607config CRYPTO_DEV_IMGTEC_HASH
d358f1ab 608 tristate "Imagination Technologies hardware hash accelerator"
8c98ebd7 609 depends on MIPS || COMPILE_TEST
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610 select CRYPTO_MD5
611 select CRYPTO_SHA1
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612 select CRYPTO_SHA256
613 select CRYPTO_HASH
614 help
615 This driver interfaces with the Imagination Technologies
616 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
617 hashing algorithms.
618
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619config CRYPTO_DEV_SUN4I_SS
620 tristate "Support for Allwinner Security System cryptographic accelerator"
f823ab93 621 depends on ARCH_SUNXI && !64BIT
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622 select CRYPTO_MD5
623 select CRYPTO_SHA1
624 select CRYPTO_AES
625 select CRYPTO_DES
626 select CRYPTO_BLKCIPHER
627 help
628 Some Allwinner SoC have a crypto accelerator named
629 Security System. Select this if you want to use it.
630 The Security System handle AES/DES/3DES ciphers in CBC mode
631 and SHA1 and MD5 hash algorithms.
632
633 To compile this driver as a module, choose M here: the module
634 will be called sun4i-ss.
635
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636config CRYPTO_DEV_SUN4I_SS_PRNG
637 bool "Support for Allwinner Security System PRNG"
638 depends on CRYPTO_DEV_SUN4I_SS
639 select CRYPTO_RNG
640 help
641 Select this option if you want to provide kernel-side support for
642 the Pseudo-Random Number Generator found in the Security System.
643
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644config CRYPTO_DEV_ROCKCHIP
645 tristate "Rockchip's Cryptographic Engine driver"
646 depends on OF && ARCH_ROCKCHIP
647 select CRYPTO_AES
648 select CRYPTO_DES
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649 select CRYPTO_MD5
650 select CRYPTO_SHA1
651 select CRYPTO_SHA256
652 select CRYPTO_HASH
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ZW
653 select CRYPTO_BLKCIPHER
654
655 help
656 This driver interfaces with the hardware crypto accelerator.
657 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
658
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659config CRYPTO_DEV_MEDIATEK
660 tristate "MediaTek's EIP97 Cryptographic Engine driver"
7dee9f61 661 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
785e5c61 662 select CRYPTO_AES
d03f7b0d 663 select CRYPTO_AEAD
785e5c61 664 select CRYPTO_BLKCIPHER
d03f7b0d 665 select CRYPTO_CTR
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666 select CRYPTO_SHA1
667 select CRYPTO_SHA256
668 select CRYPTO_SHA512
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669 select CRYPTO_HMAC
670 help
671 This driver allows you to utilize the hardware crypto accelerator
672 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
673 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
674
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675source "drivers/crypto/chelsio/Kconfig"
676
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677source "drivers/crypto/virtio/Kconfig"
678
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679config CRYPTO_DEV_BCM_SPU
680 tristate "Broadcom symmetric crypto/hash acceleration support"
681 depends on ARCH_BCM_IPROC
efc856ed 682 depends on MAILBOX
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RR
683 default m
684 select CRYPTO_DES
685 select CRYPTO_MD5
686 select CRYPTO_SHA1
687 select CRYPTO_SHA256
688 select CRYPTO_SHA512
689 help
690 This driver provides support for Broadcom crypto acceleration using the
691 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
692 ahash, and aead algorithms with the kernel cryptographic API.
693
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694source "drivers/crypto/stm32/Kconfig"
695
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696config CRYPTO_DEV_SAFEXCEL
697 tristate "Inside Secure's SafeXcel cryptographic engine driver"
ee1b23d1 698 depends on OF
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699 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
700 select CRYPTO_AES
f6beaea3 701 select CRYPTO_AUTHENC
1b44c5a6 702 select CRYPTO_BLKCIPHER
a7dea8c0 703 select CRYPTO_DES
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AT
704 select CRYPTO_HASH
705 select CRYPTO_HMAC
293f89cf 706 select CRYPTO_MD5
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707 select CRYPTO_SHA1
708 select CRYPTO_SHA256
709 select CRYPTO_SHA512
710 help
711 This driver interfaces with the SafeXcel EIP-197 cryptographic engine
712 designed by Inside Secure. Select this if you want to use CBC/ECB
713 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
714 algorithms.
715
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716config CRYPTO_DEV_ARTPEC6
717 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
718 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
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719 depends on OF
720 select CRYPTO_AEAD
721 select CRYPTO_AES
722 select CRYPTO_ALGAPI
723 select CRYPTO_BLKCIPHER
724 select CRYPTO_CTR
725 select CRYPTO_HASH
726 select CRYPTO_SHA1
727 select CRYPTO_SHA256
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728 select CRYPTO_SHA512
729 help
730 Enables the driver for the on-chip crypto accelerator
731 of Axis ARTPEC SoCs.
732
733 To compile this driver as a module, choose M here.
734
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GBY
735config CRYPTO_DEV_CCREE
736 tristate "Support for ARM TrustZone CryptoCell family of security processors"
737 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
738 default n
739 select CRYPTO_HASH
740 select CRYPTO_BLKCIPHER
741 select CRYPTO_DES
742 select CRYPTO_AEAD
743 select CRYPTO_AUTHENC
744 select CRYPTO_SHA1
745 select CRYPTO_MD5
746 select CRYPTO_SHA256
747 select CRYPTO_SHA512
748 select CRYPTO_HMAC
749 select CRYPTO_AES
750 select CRYPTO_CBC
751 select CRYPTO_ECB
752 select CRYPTO_CTR
753 select CRYPTO_XTS
754 help
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GBY
755 Say 'Y' to enable a driver for the REE interface of the Arm
756 TrustZone CryptoCell family of processors. Currently the
757 CryptoCell 712, 710 and 630 are supported.
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GBY
758 Choose this if you wish to use hardware acceleration of
759 cryptographic operations on the system REE.
760 If unsure say Y.
761
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JC
762source "drivers/crypto/hisilicon/Kconfig"
763
b511431d 764endif # CRYPTO_HW