Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
b511431d JE |
2 | |
3 | menuconfig CRYPTO_HW | |
4 | bool "Hardware crypto devices" | |
5 | default y | |
a7f7f624 | 6 | help |
06bfb7eb JE |
7 | Say Y here to get to see options for hardware crypto devices and |
8 | processors. This option alone does not add any kernel code. | |
9 | ||
10 | If you say N, all options in this submenu will be skipped and disabled. | |
b511431d JE |
11 | |
12 | if CRYPTO_HW | |
1da177e4 | 13 | |
3914b931 CL |
14 | source "drivers/crypto/allwinner/Kconfig" |
15 | ||
1da177e4 | 16 | config CRYPTO_DEV_PADLOCK |
d158325e | 17 | tristate "Support for VIA PadLock ACE" |
2f817418 | 18 | depends on X86 && !UML |
1da177e4 LT |
19 | help |
20 | Some VIA processors come with an integrated crypto engine | |
21 | (so called VIA PadLock ACE, Advanced Cryptography Engine) | |
1191f0a4 ML |
22 | that provides instructions for very fast cryptographic |
23 | operations with supported algorithms. | |
1da177e4 LT |
24 | |
25 | The instructions are used only when the CPU supports them. | |
5644bda5 ML |
26 | Otherwise software encryption is used. |
27 | ||
1da177e4 | 28 | config CRYPTO_DEV_PADLOCK_AES |
1191f0a4 | 29 | tristate "PadLock driver for AES algorithm" |
1da177e4 | 30 | depends on CRYPTO_DEV_PADLOCK |
b95bba5d | 31 | select CRYPTO_SKCIPHER |
8131878d | 32 | select CRYPTO_LIB_AES |
1da177e4 LT |
33 | help |
34 | Use VIA PadLock for AES algorithm. | |
35 | ||
1191f0a4 ML |
36 | Available in VIA C3 and newer CPUs. |
37 | ||
38 | If unsure say M. The compiled module will be | |
4737f097 | 39 | called padlock-aes. |
1191f0a4 | 40 | |
6c833275 ML |
41 | config CRYPTO_DEV_PADLOCK_SHA |
42 | tristate "PadLock driver for SHA1 and SHA256 algorithms" | |
43 | depends on CRYPTO_DEV_PADLOCK | |
bbbee467 | 44 | select CRYPTO_HASH |
6c833275 ML |
45 | select CRYPTO_SHA1 |
46 | select CRYPTO_SHA256 | |
6c833275 ML |
47 | help |
48 | Use VIA PadLock for SHA1/SHA256 algorithms. | |
49 | ||
50 | Available in VIA C7 and newer processors. | |
51 | ||
52 | If unsure say M. The compiled module will be | |
4737f097 | 53 | called padlock-sha. |
6c833275 | 54 | |
9fe757b0 JC |
55 | config CRYPTO_DEV_GEODE |
56 | tristate "Support for the Geode LX AES engine" | |
f6259dea | 57 | depends on X86_32 && PCI |
9fe757b0 | 58 | select CRYPTO_ALGAPI |
b95bba5d | 59 | select CRYPTO_SKCIPHER |
9fe757b0 JC |
60 | help |
61 | Say 'Y' here to use the AMD Geode LX processor on-board AES | |
3dde6ad8 | 62 | engine for the CryptoAPI AES algorithm. |
9fe757b0 JC |
63 | |
64 | To compile this driver as a module, choose M here: the module | |
65 | will be called geode-aes. | |
66 | ||
61d48c2c | 67 | config ZCRYPT |
a3358e3d | 68 | tristate "Support for s390 cryptographic adapters" |
61d48c2c | 69 | depends on S390 |
2f7c8bd6 | 70 | select HW_RANDOM |
61d48c2c | 71 | help |
a3358e3d HF |
72 | Select this option if you want to enable support for |
73 | s390 cryptographic adapters like: | |
0ae88ccf HF |
74 | + Crypto Express 2 up to 7 Coprocessor (CEXxC) |
75 | + Crypto Express 2 up to 7 Accelerator (CEXxA) | |
76 | + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP) | |
77 | ||
78 | config ZCRYPT_DEBUG | |
79 | bool "Enable debug features for s390 cryptographic adapters" | |
80 | default n | |
81 | depends on DEBUG_KERNEL | |
82 | depends on ZCRYPT | |
83 | help | |
84 | Say 'Y' here to enable some additional debug features on the | |
85 | s390 cryptographic adapters driver. | |
86 | ||
87 | There will be some more sysfs attributes displayed for ap cards | |
88 | and queues and some flags on crypto requests are interpreted as | |
89 | debugging messages to force error injection. | |
90 | ||
91 | Do not enable on production level kernel build. | |
92 | ||
93 | If unsure, say N. | |
61d48c2c | 94 | |
00fab235 HF |
95 | config ZCRYPT_MULTIDEVNODES |
96 | bool "Support for multiple zcrypt device nodes" | |
97 | default y | |
98 | depends on S390 | |
99 | depends on ZCRYPT | |
100 | help | |
101 | With this option enabled the zcrypt device driver can | |
102 | provide multiple devices nodes in /dev. Each device | |
103 | node can get customized to limit access and narrow | |
104 | down the use of the available crypto hardware. | |
105 | ||
e80d4af0 HF |
106 | config PKEY |
107 | tristate "Kernel API for protected key handling" | |
108 | depends on S390 | |
109 | depends on ZCRYPT | |
110 | help | |
111 | With this option enabled the pkey kernel module provides an API | |
112 | for creation and handling of protected keys. Other parts of the | |
113 | kernel or userspace applications may use these functions. | |
114 | ||
115 | Select this option if you want to enable the kernel and userspace | |
116 | API for proteced key handling. | |
117 | ||
118 | Please note that creation of protected keys from secure keys | |
119 | requires to have at least one CEX card in coprocessor mode | |
120 | available at runtime. | |
61d48c2c | 121 | |
c4684f98 HF |
122 | config CRYPTO_PAES_S390 |
123 | tristate "PAES cipher algorithms" | |
124 | depends on S390 | |
125 | depends on ZCRYPT | |
126 | depends on PKEY | |
127 | select CRYPTO_ALGAPI | |
b95bba5d | 128 | select CRYPTO_SKCIPHER |
c4684f98 HF |
129 | help |
130 | This is the s390 hardware accelerated implementation of the | |
131 | AES cipher algorithms for use with protected key. | |
132 | ||
133 | Select this option if you want to use the paes cipher | |
134 | for example to use protected key encrypted devices. | |
135 | ||
3f5615e0 JG |
136 | config S390_PRNG |
137 | tristate "Pseudo random number generator device driver" | |
138 | depends on S390 | |
139 | default "m" | |
140 | help | |
141 | Select this option if you want to use the s390 pseudo random number | |
142 | generator. The PRNG is part of the cryptographic processor functions | |
143 | and uses triple-DES to generate secure random numbers like the | |
d393d9b8 JG |
144 | ANSI X9.17 standard. User-space programs access the |
145 | pseudo-random-number device through the char device /dev/prandom. | |
146 | ||
147 | It is available as of z9. | |
3f5615e0 | 148 | |
0a625fd2 | 149 | config CRYPTO_DEV_NIAGARA2 |
2452cfdf KK |
150 | tristate "Niagara2 Stream Processing Unit driver" |
151 | select CRYPTO_LIB_DES | |
152 | select CRYPTO_SKCIPHER | |
153 | select CRYPTO_HASH | |
154 | select CRYPTO_MD5 | |
155 | select CRYPTO_SHA1 | |
156 | select CRYPTO_SHA256 | |
157 | depends on SPARC64 | |
158 | help | |
0a625fd2 DM |
159 | Each core of a Niagara2 processor contains a Stream |
160 | Processing Unit, which itself contains several cryptographic | |
161 | sub-units. One set provides the Modular Arithmetic Unit, | |
162 | used for SSL offload. The other set provides the Cipher | |
163 | Group, which can perform encryption, decryption, hashing, | |
164 | checksumming, and raw copies. | |
165 | ||
46c5338d | 166 | config CRYPTO_DEV_SL3516 |
df941fdd | 167 | tristate "Storlink SL3516 crypto offloader" |
e29dd5c8 GU |
168 | depends on ARCH_GEMINI || COMPILE_TEST |
169 | depends on HAS_IOMEM && PM | |
46c5338d CL |
170 | select CRYPTO_SKCIPHER |
171 | select CRYPTO_ENGINE | |
172 | select CRYPTO_ECB | |
173 | select CRYPTO_AES | |
174 | select HW_RANDOM | |
175 | help | |
176 | This option allows you to have support for SL3516 crypto offloader. | |
177 | ||
178 | config CRYPTO_DEV_SL3516_DEBUG | |
179 | bool "Enable SL3516 stats" | |
180 | depends on CRYPTO_DEV_SL3516 | |
181 | depends on DEBUG_FS | |
182 | help | |
183 | Say y to enable SL3516 debug stats. | |
184 | This will create /sys/kernel/debug/sl3516/stats for displaying | |
185 | the number of requests per algorithm and other internal stats. | |
186 | ||
f7d0561e EP |
187 | config CRYPTO_DEV_HIFN_795X |
188 | tristate "Driver HIFN 795x crypto accelerator chips" | |
04007b0e | 189 | select CRYPTO_LIB_DES |
b95bba5d | 190 | select CRYPTO_SKCIPHER |
946fef4e | 191 | select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG |
2707b937 | 192 | depends on PCI |
75b76625 | 193 | depends on !ARCH_DMA_ADDR_T_64BIT |
f7d0561e EP |
194 | help |
195 | This option allows you to have support for HIFN 795x crypto adapters. | |
196 | ||
946fef4e HX |
197 | config CRYPTO_DEV_HIFN_795X_RNG |
198 | bool "HIFN 795x random number generator" | |
199 | depends on CRYPTO_DEV_HIFN_795X | |
200 | help | |
201 | Select this option if you want to enable the random number generator | |
202 | on the HIFN 795x crypto adapters. | |
f7d0561e | 203 | |
8636a1f9 | 204 | source "drivers/crypto/caam/Kconfig" |
8e8ec596 | 205 | |
9c4a7965 KP |
206 | config CRYPTO_DEV_TALITOS |
207 | tristate "Talitos Freescale Security Engine (SEC)" | |
596103cf | 208 | select CRYPTO_AEAD |
9c4a7965 | 209 | select CRYPTO_AUTHENC |
b95bba5d | 210 | select CRYPTO_SKCIPHER |
596103cf | 211 | select CRYPTO_HASH |
dbc2e87b | 212 | select CRYPTO_LIB_DES |
9c4a7965 KP |
213 | select HW_RANDOM |
214 | depends on FSL_SOC | |
215 | help | |
216 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
217 | to offload cryptographic algorithm computation. | |
218 | ||
219 | The Freescale SEC is present on PowerQUICC 'E' processors, such | |
220 | as the MPC8349E and MPC8548E. | |
221 | ||
222 | To compile this driver as a module, choose M here: the module | |
223 | will be called talitos. | |
224 | ||
5b841a65 LC |
225 | config CRYPTO_DEV_TALITOS1 |
226 | bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" | |
227 | depends on CRYPTO_DEV_TALITOS | |
228 | depends on PPC_8xx || PPC_82xx | |
229 | default y | |
230 | help | |
231 | Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 | |
232 | found on MPC82xx or the Freescale Security Engine (SEC Lite) | |
233 | version 1.2 found on MPC8xx | |
234 | ||
235 | config CRYPTO_DEV_TALITOS2 | |
236 | bool "SEC2+ (SEC version 2.0 or upper)" | |
237 | depends on CRYPTO_DEV_TALITOS | |
238 | default y if !PPC_8xx | |
239 | help | |
240 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
241 | version 2 and following as found on MPC83xx, MPC85xx, etc ... | |
242 | ||
049359d6 JH |
243 | config CRYPTO_DEV_PPC4XX |
244 | tristate "Driver AMCC PPC4xx crypto accelerator" | |
245 | depends on PPC && 4xx | |
246 | select CRYPTO_HASH | |
a0aae821 | 247 | select CRYPTO_AEAD |
298b4c60 | 248 | select CRYPTO_AES |
da3e7a97 | 249 | select CRYPTO_LIB_AES |
a0aae821 | 250 | select CRYPTO_CCM |
98e87e3d | 251 | select CRYPTO_CTR |
a0aae821 | 252 | select CRYPTO_GCM |
b95bba5d | 253 | select CRYPTO_SKCIPHER |
049359d6 JH |
254 | help |
255 | This option allows you to have support for AMCC crypto acceleration. | |
256 | ||
5343e674 CL |
257 | config HW_RANDOM_PPC4XX |
258 | bool "PowerPC 4xx generic true random number generator support" | |
63b8ee4f | 259 | depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y |
5343e674 | 260 | default y |
a7f7f624 | 261 | help |
5343e674 CL |
262 | This option provides the kernel-side support for the TRNG hardware |
263 | found in the security function of some PowerPC 4xx SoCs. | |
264 | ||
74ed87e7 TK |
265 | config CRYPTO_DEV_OMAP |
266 | tristate "Support for OMAP crypto HW accelerators" | |
267 | depends on ARCH_OMAP2PLUS | |
268 | help | |
269 | OMAP processors have various crypto HW accelerators. Select this if | |
2452cfdf | 270 | you want to use the OMAP modules for any of the crypto algorithms. |
74ed87e7 TK |
271 | |
272 | if CRYPTO_DEV_OMAP | |
273 | ||
8628e7c8 | 274 | config CRYPTO_DEV_OMAP_SHAM |
eaef7e3f LV |
275 | tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" |
276 | depends on ARCH_OMAP2PLUS | |
38281194 | 277 | select CRYPTO_ENGINE |
8628e7c8 DK |
278 | select CRYPTO_SHA1 |
279 | select CRYPTO_MD5 | |
eaef7e3f LV |
280 | select CRYPTO_SHA256 |
281 | select CRYPTO_SHA512 | |
282 | select CRYPTO_HMAC | |
8628e7c8 | 283 | help |
eaef7e3f LV |
284 | OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you |
285 | want to use the OMAP module for MD5/SHA1/SHA2 algorithms. | |
8628e7c8 | 286 | |
537559a5 DK |
287 | config CRYPTO_DEV_OMAP_AES |
288 | tristate "Support for OMAP AES hw engine" | |
1bbf6437 | 289 | depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS |
537559a5 | 290 | select CRYPTO_AES |
b95bba5d | 291 | select CRYPTO_SKCIPHER |
0529900a | 292 | select CRYPTO_ENGINE |
9fcb191a LV |
293 | select CRYPTO_CBC |
294 | select CRYPTO_ECB | |
295 | select CRYPTO_CTR | |
ad18cc9d | 296 | select CRYPTO_AEAD |
537559a5 DK |
297 | help |
298 | OMAP processors have AES module accelerator. Select this if you | |
299 | want to use the OMAP module for AES algorithms. | |
300 | ||
701d0f19 | 301 | config CRYPTO_DEV_OMAP_DES |
97ee7ed3 | 302 | tristate "Support for OMAP DES/3DES hw engine" |
701d0f19 | 303 | depends on ARCH_OMAP2PLUS |
04007b0e | 304 | select CRYPTO_LIB_DES |
b95bba5d | 305 | select CRYPTO_SKCIPHER |
f1b77aac | 306 | select CRYPTO_ENGINE |
701d0f19 JF |
307 | help |
308 | OMAP processors have DES/3DES module accelerator. Select this if you | |
309 | want to use the OMAP module for DES and 3DES algorithms. Currently | |
97ee7ed3 PM |
310 | the ECB and CBC modes of operation are supported by the driver. Also |
311 | accesses made on unaligned boundaries are supported. | |
701d0f19 | 312 | |
74ed87e7 TK |
313 | endif # CRYPTO_DEV_OMAP |
314 | ||
5de88752 JM |
315 | config CRYPTO_DEV_SAHARA |
316 | tristate "Support for SAHARA crypto accelerator" | |
74d24d83 | 317 | depends on ARCH_MXC && OF |
b95bba5d | 318 | select CRYPTO_SKCIPHER |
5de88752 JM |
319 | select CRYPTO_AES |
320 | select CRYPTO_ECB | |
321 | help | |
322 | This option enables support for the SAHARA HW crypto accelerator | |
323 | found in some Freescale i.MX chips. | |
324 | ||
c46ea13f | 325 | config CRYPTO_DEV_EXYNOS_RNG |
b279997f | 326 | tristate "Exynos HW pseudo random number generator support" |
c46ea13f KK |
327 | depends on ARCH_EXYNOS || COMPILE_TEST |
328 | depends on HAS_IOMEM | |
329 | select CRYPTO_RNG | |
a7f7f624 | 330 | help |
c46ea13f KK |
331 | This driver provides kernel-side support through the |
332 | cryptographic API for the pseudo random number generator hardware | |
333 | found on Exynos SoCs. | |
334 | ||
335 | To compile this driver as a module, choose M here: the | |
336 | module will be called exynos-rng. | |
337 | ||
338 | If unsure, say Y. | |
339 | ||
a49e490c | 340 | config CRYPTO_DEV_S5P |
e922e96f | 341 | tristate "Support for Samsung S5PV210/Exynos crypto accelerator" |
dc1d9dee | 342 | depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST |
ee1b23d1 | 343 | depends on HAS_IOMEM |
a49e490c | 344 | select CRYPTO_AES |
b95bba5d | 345 | select CRYPTO_SKCIPHER |
a49e490c VZ |
346 | help |
347 | This option allows you to have support for S5P crypto acceleration. | |
e922e96f | 348 | Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES |
a49e490c VZ |
349 | algorithms execution. |
350 | ||
c2afad6c KK |
351 | config CRYPTO_DEV_EXYNOS_HASH |
352 | bool "Support for Samsung Exynos HASH accelerator" | |
353 | depends on CRYPTO_DEV_S5P | |
354 | depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m | |
355 | select CRYPTO_SHA1 | |
356 | select CRYPTO_MD5 | |
357 | select CRYPTO_SHA256 | |
358 | help | |
359 | Select this to offload Exynos from HASH MD5/SHA1/SHA256. | |
360 | This will select software SHA1, MD5 and SHA256 as they are | |
361 | needed for small and zero-size messages. | |
362 | HASH algorithms will be disabled if EXYNOS_RNG | |
363 | is enabled due to hw conflict. | |
364 | ||
aef7b31c | 365 | config CRYPTO_DEV_NX |
7011a122 DS |
366 | bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" |
367 | depends on PPC64 | |
aef7b31c | 368 | help |
7011a122 DS |
369 | This enables support for the NX hardware cryptographic accelerator |
370 | coprocessor that is in IBM PowerPC P7+ or later processors. This | |
371 | does not actually enable any drivers, it only allows you to select | |
372 | which acceleration type (encryption and/or compression) to enable. | |
322cacce SJ |
373 | |
374 | if CRYPTO_DEV_NX | |
375 | source "drivers/crypto/nx/Kconfig" | |
376 | endif | |
aef7b31c | 377 | |
89a82ef8 | 378 | config CRYPTO_DEV_ATMEL_AUTHENC |
aee1f9f3 | 379 | bool "Support for Atmel IPSEC/SSL hw accelerator" |
ceb4afb3 | 380 | depends on ARCH_AT91 || COMPILE_TEST |
aee1f9f3 | 381 | depends on CRYPTO_DEV_ATMEL_AES |
89a82ef8 CP |
382 | help |
383 | Some Atmel processors can combine the AES and SHA hw accelerators | |
384 | to enhance support of IPSEC/SSL. | |
385 | Select this if you want to use the Atmel modules for | |
386 | authenc(hmac(shaX),Y(cbc)) algorithms. | |
387 | ||
bd3c7b5c NR |
388 | config CRYPTO_DEV_ATMEL_AES |
389 | tristate "Support for Atmel AES hw accelerator" | |
ceb4afb3 | 390 | depends on ARCH_AT91 || COMPILE_TEST |
bd3c7b5c | 391 | select CRYPTO_AES |
d4419548 | 392 | select CRYPTO_AEAD |
b95bba5d | 393 | select CRYPTO_SKCIPHER |
aee1f9f3 Y |
394 | select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC |
395 | select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC | |
bd3c7b5c NR |
396 | help |
397 | Some Atmel processors have AES hw accelerator. | |
398 | Select this if you want to use the Atmel module for | |
399 | AES algorithms. | |
400 | ||
401 | To compile this driver as a module, choose M here: the module | |
402 | will be called atmel-aes. | |
403 | ||
13802005 NR |
404 | config CRYPTO_DEV_ATMEL_TDES |
405 | tristate "Support for Atmel DES/TDES hw accelerator" | |
ceb4afb3 | 406 | depends on ARCH_AT91 || COMPILE_TEST |
04007b0e | 407 | select CRYPTO_LIB_DES |
b95bba5d | 408 | select CRYPTO_SKCIPHER |
13802005 NR |
409 | help |
410 | Some Atmel processors have DES/TDES hw accelerator. | |
411 | Select this if you want to use the Atmel module for | |
412 | DES/TDES algorithms. | |
413 | ||
414 | To compile this driver as a module, choose M here: the module | |
415 | will be called atmel-tdes. | |
416 | ||
ebc82efa | 417 | config CRYPTO_DEV_ATMEL_SHA |
d4905b38 | 418 | tristate "Support for Atmel SHA hw accelerator" |
ceb4afb3 | 419 | depends on ARCH_AT91 || COMPILE_TEST |
596103cf | 420 | select CRYPTO_HASH |
ebc82efa | 421 | help |
d4905b38 NR |
422 | Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 |
423 | hw accelerator. | |
ebc82efa | 424 | Select this if you want to use the Atmel module for |
d4905b38 | 425 | SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. |
ebc82efa NR |
426 | |
427 | To compile this driver as a module, choose M here: the module | |
428 | will be called atmel-sha. | |
429 | ||
c34a3201 AB |
430 | config CRYPTO_DEV_ATMEL_I2C |
431 | tristate | |
d33a23b0 | 432 | select BITREVERSE |
c34a3201 | 433 | |
11105693 TDA |
434 | config CRYPTO_DEV_ATMEL_ECC |
435 | tristate "Support for Microchip / Atmel ECC hw accelerator" | |
11105693 | 436 | depends on I2C |
c34a3201 | 437 | select CRYPTO_DEV_ATMEL_I2C |
11105693 TDA |
438 | select CRYPTO_ECDH |
439 | select CRC16 | |
440 | help | |
441 | Microhip / Atmel ECC hw accelerator. | |
442 | Select this if you want to use the Microchip / Atmel module for | |
443 | ECDH algorithm. | |
444 | ||
445 | To compile this driver as a module, choose M here: the module | |
446 | will be called atmel-ecc. | |
447 | ||
da001fb6 AB |
448 | config CRYPTO_DEV_ATMEL_SHA204A |
449 | tristate "Support for Microchip / Atmel SHA accelerator and RNG" | |
450 | depends on I2C | |
451 | select CRYPTO_DEV_ATMEL_I2C | |
452 | select HW_RANDOM | |
4bb02dbd | 453 | select CRC16 |
da001fb6 AB |
454 | help |
455 | Microhip / Atmel SHA accelerator and RNG. | |
456 | Select this if you want to use the Microchip / Atmel SHA204A | |
457 | module as a random number generator. (Other functions of the | |
458 | chip are currently not exposed by this driver) | |
459 | ||
460 | To compile this driver as a module, choose M here: the module | |
461 | will be called atmel-sha204a. | |
462 | ||
f1147660 | 463 | config CRYPTO_DEV_CCP |
720419f0 | 464 | bool "Support for AMD Secure Processor" |
6c506343 | 465 | depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM |
f1147660 | 466 | help |
720419f0 BS |
467 | The AMD Secure Processor provides support for the Cryptographic Coprocessor |
468 | (CCP) and the Platform Security Processor (PSP) devices. | |
f1147660 TL |
469 | |
470 | if CRYPTO_DEV_CCP | |
471 | source "drivers/crypto/ccp/Kconfig" | |
472 | endif | |
473 | ||
15b59e7c MV |
474 | config CRYPTO_DEV_MXS_DCP |
475 | tristate "Support for Freescale MXS DCP" | |
a2712e6c | 476 | depends on (ARCH_MXS || ARCH_MXC) |
dc97fa02 | 477 | select STMP_DEVICE |
15b59e7c MV |
478 | select CRYPTO_CBC |
479 | select CRYPTO_ECB | |
480 | select CRYPTO_AES | |
b95bba5d | 481 | select CRYPTO_SKCIPHER |
596103cf | 482 | select CRYPTO_HASH |
15b59e7c MV |
483 | help |
484 | The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB | |
485 | co-processor on the die. | |
486 | ||
487 | To compile this driver as a module, choose M here: the module | |
488 | will be called mxs-dcp. | |
489 | ||
62ad8b5c | 490 | source "drivers/crypto/cavium/cpt/Kconfig" |
14fa93cd | 491 | source "drivers/crypto/cavium/nitrox/Kconfig" |
655ff1a1 | 492 | source "drivers/crypto/marvell/Kconfig" |
fbf31dd5 | 493 | source "drivers/crypto/intel/Kconfig" |
c672752d | 494 | |
640035a2 MC |
495 | config CRYPTO_DEV_CAVIUM_ZIP |
496 | tristate "Cavium ZIP driver" | |
497 | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) | |
a7f7f624 | 498 | help |
640035a2 MC |
499 | Select this option if you want to enable compression/decompression |
500 | acceleration on Cavium's ARM based SoCs | |
501 | ||
c672752d SV |
502 | config CRYPTO_DEV_QCE |
503 | tristate "Qualcomm crypto engine accelerator" | |
ee1b23d1 GU |
504 | depends on ARCH_QCOM || COMPILE_TEST |
505 | depends on HAS_IOMEM | |
59e056cd EQ |
506 | help |
507 | This driver supports Qualcomm crypto engine accelerator | |
508 | hardware. To compile this driver as a module, choose M here. The | |
509 | module will be called qcrypto. | |
510 | ||
511 | config CRYPTO_DEV_QCE_SKCIPHER | |
512 | bool | |
513 | depends on CRYPTO_DEV_QCE | |
c672752d | 514 | select CRYPTO_AES |
04007b0e | 515 | select CRYPTO_LIB_DES |
c672752d SV |
516 | select CRYPTO_ECB |
517 | select CRYPTO_CBC | |
518 | select CRYPTO_XTS | |
519 | select CRYPTO_CTR | |
b95bba5d | 520 | select CRYPTO_SKCIPHER |
59e056cd EQ |
521 | |
522 | config CRYPTO_DEV_QCE_SHA | |
523 | bool | |
524 | depends on CRYPTO_DEV_QCE | |
8ac1b9cc SM |
525 | select CRYPTO_SHA1 |
526 | select CRYPTO_SHA256 | |
59e056cd | 527 | |
9363efb4 TG |
528 | config CRYPTO_DEV_QCE_AEAD |
529 | bool | |
530 | depends on CRYPTO_DEV_QCE | |
531 | select CRYPTO_AUTHENC | |
532 | select CRYPTO_LIB_DES | |
533 | ||
59e056cd EQ |
534 | choice |
535 | prompt "Algorithms enabled for QCE acceleration" | |
536 | default CRYPTO_DEV_QCE_ENABLE_ALL | |
537 | depends on CRYPTO_DEV_QCE | |
538 | help | |
2e0e386a | 539 | This option allows to choose whether to build support for all algorithms |
59e056cd EQ |
540 | (default), hashes-only, or skciphers-only. |
541 | ||
542 | The QCE engine does not appear to scale as well as the CPU to handle | |
543 | multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the | |
544 | QCE handles only 2 requests in parallel. | |
545 | ||
546 | Ipsec throughput seems to improve when disabling either family of | |
547 | algorithms, sharing the load with the CPU. Enabling skciphers-only | |
548 | appears to work best. | |
549 | ||
550 | config CRYPTO_DEV_QCE_ENABLE_ALL | |
551 | bool "All supported algorithms" | |
552 | select CRYPTO_DEV_QCE_SKCIPHER | |
553 | select CRYPTO_DEV_QCE_SHA | |
9363efb4 | 554 | select CRYPTO_DEV_QCE_AEAD |
59e056cd EQ |
555 | help |
556 | Enable all supported algorithms: | |
557 | - AES (CBC, CTR, ECB, XTS) | |
558 | - 3DES (CBC, ECB) | |
559 | - DES (CBC, ECB) | |
560 | - SHA1, HMAC-SHA1 | |
561 | - SHA256, HMAC-SHA256 | |
562 | ||
563 | config CRYPTO_DEV_QCE_ENABLE_SKCIPHER | |
564 | bool "Symmetric-key ciphers only" | |
565 | select CRYPTO_DEV_QCE_SKCIPHER | |
566 | help | |
567 | Enable symmetric-key ciphers only: | |
568 | - AES (CBC, CTR, ECB, XTS) | |
569 | - 3DES (ECB, CBC) | |
570 | - DES (ECB, CBC) | |
571 | ||
572 | config CRYPTO_DEV_QCE_ENABLE_SHA | |
573 | bool "Hash/HMAC only" | |
574 | select CRYPTO_DEV_QCE_SHA | |
575 | help | |
576 | Enable hashes/HMAC algorithms only: | |
577 | - SHA1, HMAC-SHA1 | |
578 | - SHA256, HMAC-SHA256 | |
579 | ||
9363efb4 TG |
580 | config CRYPTO_DEV_QCE_ENABLE_AEAD |
581 | bool "AEAD algorithms only" | |
582 | select CRYPTO_DEV_QCE_AEAD | |
583 | help | |
584 | Enable AEAD algorithms only: | |
585 | - authenc() | |
586 | - ccm(aes) | |
587 | - rfc4309(ccm(aes)) | |
59e056cd | 588 | endchoice |
c672752d | 589 | |
ce163ba0 EQ |
590 | config CRYPTO_DEV_QCE_SW_MAX_LEN |
591 | int "Default maximum request size to use software for AES" | |
592 | depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER | |
593 | default 512 | |
594 | help | |
595 | This sets the default maximum request size to perform AES requests | |
596 | using software instead of the crypto engine. It can be changed by | |
597 | setting the aes_sw_max_len parameter. | |
598 | ||
599 | Small blocks are processed faster in software than hardware. | |
600 | Considering the 256-bit ciphers, software is 2-3 times faster than | |
601 | qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. | |
602 | With 128-bit keys, the break-even point would be around 1024-bytes. | |
603 | ||
604 | The default is set a little lower, to 512 bytes, to balance the | |
605 | cost in CPU usage. The minimum recommended setting is 16-bytes | |
606 | (1 AES block), since AES-GCM will fail if you set it lower. | |
607 | Setting this to zero will send all requests to the hardware. | |
608 | ||
609 | Note that 192-bit keys are not supported by the hardware and are | |
610 | always processed by the software fallback, and all DES requests | |
611 | are done by the hardware. | |
612 | ||
ceec5f5b VK |
613 | config CRYPTO_DEV_QCOM_RNG |
614 | tristate "Qualcomm Random Number Generator Driver" | |
615 | depends on ARCH_QCOM || COMPILE_TEST | |
616 | select CRYPTO_RNG | |
617 | help | |
618 | This driver provides support for the Random Number | |
619 | Generator hardware found on Qualcomm SoCs. | |
620 | ||
621 | To compile this driver as a module, choose M here. The | |
2452cfdf | 622 | module will be called qcom-rng. If unsure, say N. |
ceec5f5b | 623 | |
d2e3ae6f LB |
624 | config CRYPTO_DEV_VMX |
625 | bool "Support for VMX cryptographic acceleration instructions" | |
f1ab4287 | 626 | depends on PPC64 && VSX |
d2e3ae6f LB |
627 | help |
628 | Support for VMX cryptographic acceleration instructions. | |
629 | ||
630 | source "drivers/crypto/vmx/Kconfig" | |
631 | ||
d358f1ab | 632 | config CRYPTO_DEV_IMGTEC_HASH |
d358f1ab | 633 | tristate "Imagination Technologies hardware hash accelerator" |
8c98ebd7 | 634 | depends on MIPS || COMPILE_TEST |
d358f1ab JH |
635 | select CRYPTO_MD5 |
636 | select CRYPTO_SHA1 | |
d358f1ab JH |
637 | select CRYPTO_SHA256 |
638 | select CRYPTO_HASH | |
639 | help | |
640 | This driver interfaces with the Imagination Technologies | |
641 | hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 | |
642 | hashing algorithms. | |
643 | ||
433cd2c6 ZW |
644 | config CRYPTO_DEV_ROCKCHIP |
645 | tristate "Rockchip's Cryptographic Engine driver" | |
646 | depends on OF && ARCH_ROCKCHIP | |
68ef8af0 CL |
647 | depends on PM |
648 | select CRYPTO_ECB | |
649 | select CRYPTO_CBC | |
650 | select CRYPTO_DES | |
433cd2c6 | 651 | select CRYPTO_AES |
57d67c6e | 652 | select CRYPTO_ENGINE |
04007b0e | 653 | select CRYPTO_LIB_DES |
bfd927ff ZW |
654 | select CRYPTO_MD5 |
655 | select CRYPTO_SHA1 | |
656 | select CRYPTO_SHA256 | |
657 | select CRYPTO_HASH | |
b95bba5d | 658 | select CRYPTO_SKCIPHER |
433cd2c6 ZW |
659 | |
660 | help | |
661 | This driver interfaces with the hardware crypto accelerator. | |
662 | Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. | |
663 | ||
48d904d4 CL |
664 | config CRYPTO_DEV_ROCKCHIP_DEBUG |
665 | bool "Enable Rockchip crypto stats" | |
666 | depends on CRYPTO_DEV_ROCKCHIP | |
667 | depends on DEBUG_FS | |
668 | help | |
669 | Say y to enable Rockchip crypto debug stats. | |
670 | This will create /sys/kernel/debug/rk3288_crypto/stats for displaying | |
671 | the number of requests per algorithm and other internal stats. | |
672 | ||
673 | ||
4d96f7d4 KA |
674 | config CRYPTO_DEV_ZYNQMP_AES |
675 | tristate "Support for Xilinx ZynqMP AES hw accelerator" | |
676 | depends on ZYNQMP_FIRMWARE || COMPILE_TEST | |
677 | select CRYPTO_AES | |
678 | select CRYPTO_ENGINE | |
679 | select CRYPTO_AEAD | |
680 | help | |
681 | Xilinx ZynqMP has AES-GCM engine used for symmetric key | |
682 | encryption and decryption. This driver interfaces with AES hw | |
683 | accelerator. Select this if you want to use the ZynqMP module | |
684 | for AES algorithms. | |
685 | ||
7ecc3e34 | 686 | config CRYPTO_DEV_ZYNQMP_SHA3 |
0e03b8fd HX |
687 | tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator" |
688 | depends on ZYNQMP_FIRMWARE || COMPILE_TEST | |
7ecc3e34 H |
689 | select CRYPTO_SHA3 |
690 | help | |
691 | Xilinx ZynqMP has SHA3 engine used for secure hash calculation. | |
692 | This driver interfaces with SHA3 hardware engine. | |
693 | Select this if you want to use the ZynqMP module | |
694 | for SHA3 hash computation. | |
695 | ||
02038fd6 HS |
696 | source "drivers/crypto/chelsio/Kconfig" |
697 | ||
dbaf0624 G |
698 | source "drivers/crypto/virtio/Kconfig" |
699 | ||
9d12ba86 RR |
700 | config CRYPTO_DEV_BCM_SPU |
701 | tristate "Broadcom symmetric crypto/hash acceleration support" | |
702 | depends on ARCH_BCM_IPROC | |
efc856ed | 703 | depends on MAILBOX |
9d12ba86 | 704 | default m |
ab57b335 | 705 | select CRYPTO_AUTHENC |
04007b0e | 706 | select CRYPTO_LIB_DES |
9d12ba86 RR |
707 | select CRYPTO_MD5 |
708 | select CRYPTO_SHA1 | |
709 | select CRYPTO_SHA256 | |
710 | select CRYPTO_SHA512 | |
711 | help | |
712 | This driver provides support for Broadcom crypto acceleration using the | |
a9c01cd6 | 713 | Secure Processing Unit (SPU). The SPU driver registers skcipher, |
9d12ba86 RR |
714 | ahash, and aead algorithms with the kernel cryptographic API. |
715 | ||
b51dbe90 FD |
716 | source "drivers/crypto/stm32/Kconfig" |
717 | ||
1b44c5a6 AT |
718 | config CRYPTO_DEV_SAFEXCEL |
719 | tristate "Inside Secure's SafeXcel cryptographic engine driver" | |
6dc0e310 | 720 | depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM |
363a90c2 | 721 | select CRYPTO_LIB_AES |
f6beaea3 | 722 | select CRYPTO_AUTHENC |
b95bba5d | 723 | select CRYPTO_SKCIPHER |
04007b0e | 724 | select CRYPTO_LIB_DES |
1b44c5a6 AT |
725 | select CRYPTO_HASH |
726 | select CRYPTO_HMAC | |
293f89cf | 727 | select CRYPTO_MD5 |
1b44c5a6 AT |
728 | select CRYPTO_SHA1 |
729 | select CRYPTO_SHA256 | |
730 | select CRYPTO_SHA512 | |
fc0f82b1 | 731 | select CRYPTO_CHACHA20POLY1305 |
1d448f27 | 732 | select CRYPTO_SHA3 |
1b44c5a6 | 733 | help |
0f6e5c82 PL |
734 | This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic |
735 | engines designed by Inside Secure. It currently accelerates DES, 3DES and | |
736 | AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, | |
737 | SHA384 and SHA512 hash algorithms for both basic hash and HMAC. | |
738 | Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. | |
1b44c5a6 | 739 | |
a21eb94f LP |
740 | config CRYPTO_DEV_ARTPEC6 |
741 | tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." | |
742 | depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) | |
a21eb94f LP |
743 | depends on OF |
744 | select CRYPTO_AEAD | |
745 | select CRYPTO_AES | |
746 | select CRYPTO_ALGAPI | |
b95bba5d | 747 | select CRYPTO_SKCIPHER |
a21eb94f LP |
748 | select CRYPTO_CTR |
749 | select CRYPTO_HASH | |
750 | select CRYPTO_SHA1 | |
751 | select CRYPTO_SHA256 | |
a21eb94f LP |
752 | select CRYPTO_SHA512 |
753 | help | |
754 | Enables the driver for the on-chip crypto accelerator | |
755 | of Axis ARTPEC SoCs. | |
756 | ||
757 | To compile this driver as a module, choose M here. | |
758 | ||
4c3f9727 GBY |
759 | config CRYPTO_DEV_CCREE |
760 | tristate "Support for ARM TrustZone CryptoCell family of security processors" | |
761 | depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA | |
ed490503 | 762 | depends on HAS_IOMEM |
4c3f9727 | 763 | select CRYPTO_HASH |
b95bba5d | 764 | select CRYPTO_SKCIPHER |
04007b0e | 765 | select CRYPTO_LIB_DES |
4c3f9727 GBY |
766 | select CRYPTO_AEAD |
767 | select CRYPTO_AUTHENC | |
768 | select CRYPTO_SHA1 | |
769 | select CRYPTO_MD5 | |
770 | select CRYPTO_SHA256 | |
771 | select CRYPTO_SHA512 | |
772 | select CRYPTO_HMAC | |
773 | select CRYPTO_AES | |
774 | select CRYPTO_CBC | |
775 | select CRYPTO_ECB | |
776 | select CRYPTO_CTR | |
777 | select CRYPTO_XTS | |
2ae6feb1 TZ |
778 | select CRYPTO_SM4_GENERIC |
779 | select CRYPTO_SM3_GENERIC | |
4c3f9727 | 780 | help |
27b3b22d GBY |
781 | Say 'Y' to enable a driver for the REE interface of the Arm |
782 | TrustZone CryptoCell family of processors. Currently the | |
1c876a90 | 783 | CryptoCell 713, 703, 712, 710 and 630 are supported. |
4c3f9727 GBY |
784 | Choose this if you wish to use hardware acceleration of |
785 | cryptographic operations on the system REE. | |
786 | If unsure say Y. | |
787 | ||
915e4e84 JC |
788 | source "drivers/crypto/hisilicon/Kconfig" |
789 | ||
48fe583f CL |
790 | source "drivers/crypto/amlogic/Kconfig" |
791 | ||
7694b6ca K |
792 | config CRYPTO_DEV_SA2UL |
793 | tristate "Support for TI security accelerator" | |
794 | depends on ARCH_K3 || COMPILE_TEST | |
7694b6ca | 795 | select CRYPTO_AES |
7694b6ca | 796 | select CRYPTO_ALGAPI |
61f033ba | 797 | select CRYPTO_AUTHENC |
8832023e | 798 | select CRYPTO_DES |
bfe8fe93 RD |
799 | select CRYPTO_SHA1 |
800 | select CRYPTO_SHA256 | |
801 | select CRYPTO_SHA512 | |
7694b6ca K |
802 | select HW_RANDOM |
803 | select SG_SPLIT | |
804 | help | |
805 | K3 devices include a security accelerator engine that may be | |
806 | used for crypto offload. Select this if you want to use hardware | |
807 | acceleration for cryptographic algorithms on these devices. | |
808 | ||
108713a7 | 809 | source "drivers/crypto/aspeed/Kconfig" |
88574332 | 810 | |
b511431d | 811 | endif # CRYPTO_HW |